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ARM64: dts: meson-axg: enable the eMMC controller
The IP of eMMC controller in AXG is similiar to Meson-GX series. Here we add the initial support of the HS200 mode with clock running at 166MHz (to be safe), since we found some eMMC chip fail to run at 200MHz due to tunning phase error. Signed-off-by: Nan Li <nan.li@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> [khilman: drop incorrect SDIO pwrseq property] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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2 changed files with 135 additions and 0 deletions
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@ -15,6 +15,39 @@ aliases {
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serial0 = &uart_AO;
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serial0 = &uart_AO;
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serial1 = &uart_A;
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serial1 = &uart_A;
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};
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};
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vddio_boot: regulator-vddio_boot {
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compatible = "regulator-fixed";
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regulator-name = "VDDIO_BOOT";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vddao_3v3: regulator-vddao_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VDDAO_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vddio_ao18: regulator-vddio_ao18 {
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compatible = "regulator-fixed";
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regulator-name = "VDDIO_AO18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: regulator-vcc_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VCC_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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emmc_pwrseq: emmc-pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ðmac {
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ðmac {
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@ -47,3 +80,23 @@ &i2c1 {
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pinctrl-0 = <&i2c1_z_pins>;
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pinctrl-0 = <&i2c1_z_pins>;
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pinctrl-names = "default";
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pinctrl-names = "default";
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};
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};
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/* emmc storage */
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&sd_emmc_c {
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status = "okay";
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pinctrl-0 = <&emmc_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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bus-width = <8>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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max-frequency = <180000000>;
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non-removable;
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disable-wp;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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vmmc-supply = <&vcc_3v3>;
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vqmmc-supply = <&vddio_boot>;
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};
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@ -7,6 +7,7 @@
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/axg-clkc.h>
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#include <dt-bindings/clock/axg-clkc.h>
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#include <dt-bindings/gpio/meson-axg-gpio.h>
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/ {
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/ {
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compatible = "amlogic,meson-axg";
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compatible = "amlogic,meson-axg";
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@ -113,6 +114,36 @@ soc {
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#size-cells = <2>;
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#size-cells = <2>;
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ranges;
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ranges;
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apb: apb@ffe00000 {
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compatible = "simple-bus";
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reg = <0x0 0xffe00000 0x0 0x200000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
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sd_emmc_b: sd@5000 {
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compatible = "amlogic,meson-axg-mmc";
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reg = <0x0 0x5000 0x0 0x2000>;
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interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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clocks = <&clkc CLKID_SD_EMMC_B>,
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<&clkc CLKID_SD_EMMC_B_CLK0>,
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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};
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sd_emmc_c: mmc@7000 {
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compatible = "amlogic,meson-axg-mmc";
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reg = <0x0 0x7000 0x0 0x2000>;
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interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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clocks = <&clkc CLKID_SD_EMMC_C>,
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<&clkc CLKID_SD_EMMC_C_CLK0>,
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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};
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};
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cbus: bus@ffd00000 {
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cbus: bus@ffd00000 {
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compatible = "simple-bus";
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compatible = "simple-bus";
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reg = <0x0 0xffd00000 0x0 0x25000>;
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reg = <0x0 0xffd00000 0x0 0x25000>;
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@ -313,6 +344,57 @@ gpio: bank@480 {
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gpio-ranges = <&pinctrl_periphs 0 0 86>;
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gpio-ranges = <&pinctrl_periphs 0 0 86>;
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};
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};
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emmc_pins: emmc {
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mux {
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groups = "emmc_nand_d0",
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"emmc_nand_d1",
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"emmc_nand_d2",
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"emmc_nand_d3",
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"emmc_nand_d4",
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"emmc_nand_d5",
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"emmc_nand_d6",
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"emmc_nand_d7",
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"emmc_clk",
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"emmc_cmd",
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"emmc_ds";
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function = "emmc";
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};
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};
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emmc_clk_gate_pins: emmc_clk_gate {
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mux {
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groups = "BOOT_8";
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function = "gpio_periphs";
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};
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cfg-pull-down {
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pins = "BOOT_8";
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bias-pull-down;
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};
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};
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sdio_pins: sdio {
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mux {
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groups = "sdio_d0",
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"sdio_d1",
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"sdio_d2",
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"sdio_d3",
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"sdio_cmd",
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"sdio_clk";
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function = "sdio";
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};
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};
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sdio_clk_gate_pins: sdio_clk_gate {
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mux {
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groups = "GPIOX_4";
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function = "gpio_periphs";
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};
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cfg-pull-down {
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pins = "GPIOX_4";
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bias-pull-down;
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};
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};
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eth_rmii_x_pins: eth-x-rmii {
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eth_rmii_x_pins: eth-x-rmii {
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mux {
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mux {
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groups = "eth_mdio_x",
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groups = "eth_mdio_x",
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