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[libata sata_mv] SATA probe, DMA boundary fixes
- DMA boundary was being handled incorrectly. Copied the code from ata_fill_sg(), since Marvell has the same DMA boundary needs. (we can't use ata_fill_sg directly since we have different hardware descriptors) - cleaned up the SATA phy reset code, to deal with various errata
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parent
64f043d807
commit
22374677d1
1 changed files with 70 additions and 18 deletions
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@ -321,6 +321,7 @@ static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val);
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static u32 mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in);
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static void mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val);
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static void mv_phy_reset(struct ata_port *ap);
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static void __mv_phy_reset(struct ata_port *ap, int can_sleep);
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static void mv_host_stop(struct ata_host_set *host_set);
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static int mv_port_start(struct ata_port *ap);
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static void mv_port_stop(struct ata_port *ap);
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@ -362,7 +363,7 @@ static struct scsi_host_template mv_sht = {
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.eh_strategy_handler = ata_scsi_error,
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.can_queue = MV_USE_Q_DEPTH,
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.this_id = ATA_SHT_THIS_ID,
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.sg_tablesize = MV_MAX_SG_CT,
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.sg_tablesize = MV_MAX_SG_CT / 2,
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.max_sectors = ATA_MAX_SECTORS,
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.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
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.emulated = ATA_SHT_EMULATED,
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@ -893,20 +894,30 @@ static void mv_fill_sg(struct ata_queued_cmd *qc)
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struct scatterlist *sg;
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ata_for_each_sg(sg, qc) {
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u32 sg_len;
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dma_addr_t addr;
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u32 sg_len, len, offset;
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addr = sg_dma_address(sg);
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sg_len = sg_dma_len(sg);
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pp->sg_tbl[i].addr = cpu_to_le32(addr & 0xffffffff);
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pp->sg_tbl[i].addr_hi = cpu_to_le32((addr >> 16) >> 16);
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assert(0 == (sg_len & ~MV_DMA_BOUNDARY));
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pp->sg_tbl[i].flags_size = cpu_to_le32(sg_len);
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if (ata_sg_is_last(sg, qc))
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pp->sg_tbl[i].flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
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while (sg_len) {
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offset = addr & MV_DMA_BOUNDARY;
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len = sg_len;
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if ((offset + sg_len) > 0x10000)
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len = 0x10000 - offset;
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i++;
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pp->sg_tbl[i].addr = cpu_to_le32(addr & 0xffffffff);
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pp->sg_tbl[i].addr_hi = cpu_to_le32((addr >> 16) >> 16);
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pp->sg_tbl[i].flags_size = cpu_to_le32(len);
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sg_len -= len;
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addr += len;
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if (!sg_len && ata_sg_is_last(sg, qc))
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pp->sg_tbl[i].flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
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i++;
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}
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}
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}
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@ -1693,11 +1704,19 @@ static void mv_stop_and_reset(struct ata_port *ap)
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mv_channel_reset(hpriv, mmio, ap->port_no);
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mv_phy_reset(ap);
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__mv_phy_reset(ap, 0);
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}
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static inline void __msleep(unsigned int msec, int can_sleep)
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{
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if (can_sleep)
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msleep(msec);
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else
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mdelay(msec);
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}
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/**
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* mv_phy_reset - Perform eDMA reset followed by COMRESET
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* __mv_phy_reset - Perform eDMA reset followed by COMRESET
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* @ap: ATA channel to manipulate
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*
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* Part of this is taken from __sata_phy_reset and modified to
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@ -1707,13 +1726,16 @@ static void mv_stop_and_reset(struct ata_port *ap)
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* Inherited from caller. This is coded to safe to call at
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* interrupt level, i.e. it does not sleep.
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*/
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static void mv_phy_reset(struct ata_port *ap)
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static void __mv_phy_reset(struct ata_port *ap, int can_sleep)
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{
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struct mv_port_priv *pp = ap->private_data;
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struct mv_host_priv *hpriv = ap->host_set->private_data;
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void __iomem *port_mmio = mv_ap_base(ap);
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struct ata_taskfile tf;
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struct ata_device *dev = &ap->device[0];
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unsigned long timeout;
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int retry = 5;
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u32 sstatus;
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VPRINTK("ENTER, port %u, mmio 0x%p\n", ap->port_no, port_mmio);
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@ -1721,18 +1743,28 @@ static void mv_phy_reset(struct ata_port *ap)
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"SCtrl 0x%08x\n", mv_scr_read(ap, SCR_STATUS),
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mv_scr_read(ap, SCR_ERROR), mv_scr_read(ap, SCR_CONTROL));
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/* proceed to init communications via the scr_control reg */
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/* Issue COMRESET via SControl */
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comreset_retry:
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scr_write_flush(ap, SCR_CONTROL, 0x301);
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mdelay(1);
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__msleep(1, can_sleep);
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scr_write_flush(ap, SCR_CONTROL, 0x300);
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timeout = jiffies + (HZ * 1);
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__msleep(20, can_sleep);
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timeout = jiffies + msecs_to_jiffies(200);
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do {
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mdelay(10);
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if ((scr_read(ap, SCR_STATUS) & 0xf) != 1)
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sstatus = scr_read(ap, SCR_STATUS) & 0x3;
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if ((sstatus == 3) || (sstatus == 0))
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break;
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__msleep(1, can_sleep);
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} while (time_before(jiffies, timeout));
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mv_scr_write(ap, SCR_ERROR, mv_scr_read(ap, SCR_ERROR));
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/* work around errata */
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if (IS_60XX(hpriv) &&
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(sstatus != 0x0) && (sstatus != 0x113) && (sstatus != 0x123) &&
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(retry-- > 0))
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goto comreset_retry;
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DPRINTK("S-regs after PHY wake: SStat 0x%08x SErr 0x%08x "
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"SCtrl 0x%08x\n", mv_scr_read(ap, SCR_STATUS),
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@ -1748,6 +1780,21 @@ static void mv_phy_reset(struct ata_port *ap)
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}
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ap->cbl = ATA_CBL_SATA;
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/* even after SStatus reflects that device is ready,
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* it seems to take a while for link to be fully
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* established (and thus Status no longer 0x80/0x7F),
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* so we poll a bit for that, here.
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*/
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retry = 20;
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while (1) {
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u8 drv_stat = ata_check_status(ap);
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if ((drv_stat != 0x80) && (drv_stat != 0x7f))
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break;
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__msleep(500, can_sleep);
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if (retry-- <= 0)
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break;
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}
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tf.lbah = readb((void __iomem *) ap->ioaddr.lbah_addr);
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tf.lbam = readb((void __iomem *) ap->ioaddr.lbam_addr);
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tf.lbal = readb((void __iomem *) ap->ioaddr.lbal_addr);
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@ -1766,6 +1813,11 @@ static void mv_phy_reset(struct ata_port *ap)
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VPRINTK("EXIT\n");
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}
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static void mv_phy_reset(struct ata_port *ap)
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{
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__mv_phy_reset(ap, 1);
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}
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/**
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* mv_eng_timeout - Routine called by libata when SCSI times out I/O
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* @ap: ATA channel to manipulate
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