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hwmon: (pmbus) Convert command register definitions to enum
This will simplify adding new virtual commands. Tested-by: Michael Jones <mike@proclivis.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Guenter Roeck
parent
649ca820da
commit
2238835c5c
1 changed files with 130 additions and 128 deletions
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@ -27,106 +27,107 @@
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/*
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* Registers
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*/
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#define PMBUS_PAGE 0x00
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#define PMBUS_OPERATION 0x01
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#define PMBUS_ON_OFF_CONFIG 0x02
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#define PMBUS_CLEAR_FAULTS 0x03
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#define PMBUS_PHASE 0x04
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enum pmbus_regs {
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PMBUS_PAGE = 0x00,
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PMBUS_OPERATION = 0x01,
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PMBUS_ON_OFF_CONFIG = 0x02,
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PMBUS_CLEAR_FAULTS = 0x03,
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PMBUS_PHASE = 0x04,
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#define PMBUS_CAPABILITY 0x19
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#define PMBUS_QUERY 0x1A
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PMBUS_CAPABILITY = 0x19,
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PMBUS_QUERY = 0x1A,
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#define PMBUS_VOUT_MODE 0x20
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#define PMBUS_VOUT_COMMAND 0x21
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#define PMBUS_VOUT_TRIM 0x22
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#define PMBUS_VOUT_CAL_OFFSET 0x23
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#define PMBUS_VOUT_MAX 0x24
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#define PMBUS_VOUT_MARGIN_HIGH 0x25
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#define PMBUS_VOUT_MARGIN_LOW 0x26
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#define PMBUS_VOUT_TRANSITION_RATE 0x27
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#define PMBUS_VOUT_DROOP 0x28
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#define PMBUS_VOUT_SCALE_LOOP 0x29
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#define PMBUS_VOUT_SCALE_MONITOR 0x2A
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PMBUS_VOUT_MODE = 0x20,
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PMBUS_VOUT_COMMAND = 0x21,
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PMBUS_VOUT_TRIM = 0x22,
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PMBUS_VOUT_CAL_OFFSET = 0x23,
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PMBUS_VOUT_MAX = 0x24,
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PMBUS_VOUT_MARGIN_HIGH = 0x25,
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PMBUS_VOUT_MARGIN_LOW = 0x26,
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PMBUS_VOUT_TRANSITION_RATE = 0x27,
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PMBUS_VOUT_DROOP = 0x28,
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PMBUS_VOUT_SCALE_LOOP = 0x29,
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PMBUS_VOUT_SCALE_MONITOR = 0x2A,
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#define PMBUS_COEFFICIENTS 0x30
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#define PMBUS_POUT_MAX 0x31
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PMBUS_COEFFICIENTS = 0x30,
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PMBUS_POUT_MAX = 0x31,
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#define PMBUS_FAN_CONFIG_12 0x3A
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#define PMBUS_FAN_COMMAND_1 0x3B
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#define PMBUS_FAN_COMMAND_2 0x3C
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#define PMBUS_FAN_CONFIG_34 0x3D
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#define PMBUS_FAN_COMMAND_3 0x3E
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#define PMBUS_FAN_COMMAND_4 0x3F
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PMBUS_FAN_CONFIG_12 = 0x3A,
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PMBUS_FAN_COMMAND_1 = 0x3B,
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PMBUS_FAN_COMMAND_2 = 0x3C,
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PMBUS_FAN_CONFIG_34 = 0x3D,
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PMBUS_FAN_COMMAND_3 = 0x3E,
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PMBUS_FAN_COMMAND_4 = 0x3F,
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#define PMBUS_VOUT_OV_FAULT_LIMIT 0x40
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#define PMBUS_VOUT_OV_FAULT_RESPONSE 0x41
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#define PMBUS_VOUT_OV_WARN_LIMIT 0x42
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#define PMBUS_VOUT_UV_WARN_LIMIT 0x43
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#define PMBUS_VOUT_UV_FAULT_LIMIT 0x44
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#define PMBUS_VOUT_UV_FAULT_RESPONSE 0x45
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#define PMBUS_IOUT_OC_FAULT_LIMIT 0x46
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#define PMBUS_IOUT_OC_FAULT_RESPONSE 0x47
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#define PMBUS_IOUT_OC_LV_FAULT_LIMIT 0x48
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#define PMBUS_IOUT_OC_LV_FAULT_RESPONSE 0x49
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#define PMBUS_IOUT_OC_WARN_LIMIT 0x4A
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#define PMBUS_IOUT_UC_FAULT_LIMIT 0x4B
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#define PMBUS_IOUT_UC_FAULT_RESPONSE 0x4C
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PMBUS_VOUT_OV_FAULT_LIMIT = 0x40,
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PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41,
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PMBUS_VOUT_OV_WARN_LIMIT = 0x42,
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PMBUS_VOUT_UV_WARN_LIMIT = 0x43,
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PMBUS_VOUT_UV_FAULT_LIMIT = 0x44,
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PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45,
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PMBUS_IOUT_OC_FAULT_LIMIT = 0x46,
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PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47,
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PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48,
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PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49,
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PMBUS_IOUT_OC_WARN_LIMIT = 0x4A,
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PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B,
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PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C,
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#define PMBUS_OT_FAULT_LIMIT 0x4F
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#define PMBUS_OT_FAULT_RESPONSE 0x50
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#define PMBUS_OT_WARN_LIMIT 0x51
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#define PMBUS_UT_WARN_LIMIT 0x52
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#define PMBUS_UT_FAULT_LIMIT 0x53
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#define PMBUS_UT_FAULT_RESPONSE 0x54
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#define PMBUS_VIN_OV_FAULT_LIMIT 0x55
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#define PMBUS_VIN_OV_FAULT_RESPONSE 0x56
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#define PMBUS_VIN_OV_WARN_LIMIT 0x57
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#define PMBUS_VIN_UV_WARN_LIMIT 0x58
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#define PMBUS_VIN_UV_FAULT_LIMIT 0x59
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PMBUS_OT_FAULT_LIMIT = 0x4F,
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PMBUS_OT_FAULT_RESPONSE = 0x50,
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PMBUS_OT_WARN_LIMIT = 0x51,
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PMBUS_UT_WARN_LIMIT = 0x52,
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PMBUS_UT_FAULT_LIMIT = 0x53,
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PMBUS_UT_FAULT_RESPONSE = 0x54,
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PMBUS_VIN_OV_FAULT_LIMIT = 0x55,
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PMBUS_VIN_OV_FAULT_RESPONSE = 0x56,
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PMBUS_VIN_OV_WARN_LIMIT = 0x57,
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PMBUS_VIN_UV_WARN_LIMIT = 0x58,
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PMBUS_VIN_UV_FAULT_LIMIT = 0x59,
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#define PMBUS_IIN_OC_FAULT_LIMIT 0x5B
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#define PMBUS_IIN_OC_WARN_LIMIT 0x5D
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PMBUS_IIN_OC_FAULT_LIMIT = 0x5B,
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PMBUS_IIN_OC_WARN_LIMIT = 0x5D,
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#define PMBUS_POUT_OP_FAULT_LIMIT 0x68
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#define PMBUS_POUT_OP_WARN_LIMIT 0x6A
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#define PMBUS_PIN_OP_WARN_LIMIT 0x6B
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PMBUS_POUT_OP_FAULT_LIMIT = 0x68,
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PMBUS_POUT_OP_WARN_LIMIT = 0x6A,
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PMBUS_PIN_OP_WARN_LIMIT = 0x6B,
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#define PMBUS_STATUS_BYTE 0x78
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#define PMBUS_STATUS_WORD 0x79
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#define PMBUS_STATUS_VOUT 0x7A
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#define PMBUS_STATUS_IOUT 0x7B
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#define PMBUS_STATUS_INPUT 0x7C
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#define PMBUS_STATUS_TEMPERATURE 0x7D
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#define PMBUS_STATUS_CML 0x7E
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#define PMBUS_STATUS_OTHER 0x7F
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#define PMBUS_STATUS_MFR_SPECIFIC 0x80
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#define PMBUS_STATUS_FAN_12 0x81
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#define PMBUS_STATUS_FAN_34 0x82
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PMBUS_STATUS_BYTE = 0x78,
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PMBUS_STATUS_WORD = 0x79,
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PMBUS_STATUS_VOUT = 0x7A,
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PMBUS_STATUS_IOUT = 0x7B,
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PMBUS_STATUS_INPUT = 0x7C,
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PMBUS_STATUS_TEMPERATURE = 0x7D,
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PMBUS_STATUS_CML = 0x7E,
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PMBUS_STATUS_OTHER = 0x7F,
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PMBUS_STATUS_MFR_SPECIFIC = 0x80,
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PMBUS_STATUS_FAN_12 = 0x81,
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PMBUS_STATUS_FAN_34 = 0x82,
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#define PMBUS_READ_VIN 0x88
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#define PMBUS_READ_IIN 0x89
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#define PMBUS_READ_VCAP 0x8A
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#define PMBUS_READ_VOUT 0x8B
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#define PMBUS_READ_IOUT 0x8C
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#define PMBUS_READ_TEMPERATURE_1 0x8D
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#define PMBUS_READ_TEMPERATURE_2 0x8E
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#define PMBUS_READ_TEMPERATURE_3 0x8F
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#define PMBUS_READ_FAN_SPEED_1 0x90
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#define PMBUS_READ_FAN_SPEED_2 0x91
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#define PMBUS_READ_FAN_SPEED_3 0x92
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#define PMBUS_READ_FAN_SPEED_4 0x93
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#define PMBUS_READ_DUTY_CYCLE 0x94
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#define PMBUS_READ_FREQUENCY 0x95
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#define PMBUS_READ_POUT 0x96
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#define PMBUS_READ_PIN 0x97
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PMBUS_READ_VIN = 0x88,
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PMBUS_READ_IIN = 0x89,
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PMBUS_READ_VCAP = 0x8A,
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PMBUS_READ_VOUT = 0x8B,
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PMBUS_READ_IOUT = 0x8C,
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PMBUS_READ_TEMPERATURE_1 = 0x8D,
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PMBUS_READ_TEMPERATURE_2 = 0x8E,
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PMBUS_READ_TEMPERATURE_3 = 0x8F,
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PMBUS_READ_FAN_SPEED_1 = 0x90,
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PMBUS_READ_FAN_SPEED_2 = 0x91,
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PMBUS_READ_FAN_SPEED_3 = 0x92,
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PMBUS_READ_FAN_SPEED_4 = 0x93,
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PMBUS_READ_DUTY_CYCLE = 0x94,
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PMBUS_READ_FREQUENCY = 0x95,
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PMBUS_READ_POUT = 0x96,
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PMBUS_READ_PIN = 0x97,
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#define PMBUS_REVISION 0x98
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#define PMBUS_MFR_ID 0x99
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#define PMBUS_MFR_MODEL 0x9A
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#define PMBUS_MFR_REVISION 0x9B
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#define PMBUS_MFR_LOCATION 0x9C
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#define PMBUS_MFR_DATE 0x9D
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#define PMBUS_MFR_SERIAL 0x9E
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PMBUS_REVISION = 0x98,
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PMBUS_MFR_ID = 0x99,
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PMBUS_MFR_MODEL = 0x9A,
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PMBUS_MFR_REVISION = 0x9B,
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PMBUS_MFR_LOCATION = 0x9C,
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PMBUS_MFR_DATE = 0x9D,
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PMBUS_MFR_SERIAL = 0x9E,
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/*
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* Virtual registers.
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@ -148,46 +149,47 @@
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* the calling PMBus core code will abort if the chip driver returns an error
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* code when reading or writing virtual registers.
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*/
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#define PMBUS_VIRT_BASE 0x100
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#define PMBUS_VIRT_READ_TEMP_AVG (PMBUS_VIRT_BASE + 0)
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#define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 1)
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#define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 2)
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#define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 3)
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#define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 4)
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#define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 5)
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#define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 6)
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#define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 7)
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#define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 8)
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#define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 9)
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#define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 10)
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#define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 11)
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#define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 12)
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#define PMBUS_VIRT_READ_PIN_MIN (PMBUS_VIRT_BASE + 13)
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#define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 14)
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#define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 15)
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#define PMBUS_VIRT_READ_POUT_AVG (PMBUS_VIRT_BASE + 16)
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#define PMBUS_VIRT_READ_POUT_MIN (PMBUS_VIRT_BASE + 17)
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#define PMBUS_VIRT_READ_POUT_MAX (PMBUS_VIRT_BASE + 18)
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#define PMBUS_VIRT_RESET_POUT_HISTORY (PMBUS_VIRT_BASE + 19)
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#define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 20)
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#define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 21)
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#define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 22)
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#define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 23)
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#define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 24)
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#define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 25)
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#define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 26)
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#define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 27)
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#define PMBUS_VIRT_READ_TEMP2_AVG (PMBUS_VIRT_BASE + 28)
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#define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 29)
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#define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 30)
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#define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 31)
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PMBUS_VIRT_BASE = 0x100,
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PMBUS_VIRT_READ_TEMP_AVG,
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PMBUS_VIRT_READ_TEMP_MIN,
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PMBUS_VIRT_READ_TEMP_MAX,
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PMBUS_VIRT_RESET_TEMP_HISTORY,
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PMBUS_VIRT_READ_VIN_AVG,
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PMBUS_VIRT_READ_VIN_MIN,
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PMBUS_VIRT_READ_VIN_MAX,
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PMBUS_VIRT_RESET_VIN_HISTORY,
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PMBUS_VIRT_READ_IIN_AVG,
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PMBUS_VIRT_READ_IIN_MIN,
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PMBUS_VIRT_READ_IIN_MAX,
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PMBUS_VIRT_RESET_IIN_HISTORY,
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PMBUS_VIRT_READ_PIN_AVG,
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PMBUS_VIRT_READ_PIN_MIN,
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PMBUS_VIRT_READ_PIN_MAX,
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PMBUS_VIRT_RESET_PIN_HISTORY,
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PMBUS_VIRT_READ_POUT_AVG,
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PMBUS_VIRT_READ_POUT_MIN,
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PMBUS_VIRT_READ_POUT_MAX,
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PMBUS_VIRT_RESET_POUT_HISTORY,
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PMBUS_VIRT_READ_VOUT_AVG,
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PMBUS_VIRT_READ_VOUT_MIN,
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PMBUS_VIRT_READ_VOUT_MAX,
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PMBUS_VIRT_RESET_VOUT_HISTORY,
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PMBUS_VIRT_READ_IOUT_AVG,
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PMBUS_VIRT_READ_IOUT_MIN,
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PMBUS_VIRT_READ_IOUT_MAX,
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PMBUS_VIRT_RESET_IOUT_HISTORY,
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PMBUS_VIRT_READ_TEMP2_AVG,
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PMBUS_VIRT_READ_TEMP2_MIN,
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PMBUS_VIRT_READ_TEMP2_MAX,
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PMBUS_VIRT_RESET_TEMP2_HISTORY,
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#define PMBUS_VIRT_READ_VMON (PMBUS_VIRT_BASE + 32)
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#define PMBUS_VIRT_VMON_UV_WARN_LIMIT (PMBUS_VIRT_BASE + 33)
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#define PMBUS_VIRT_VMON_OV_WARN_LIMIT (PMBUS_VIRT_BASE + 34)
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#define PMBUS_VIRT_VMON_UV_FAULT_LIMIT (PMBUS_VIRT_BASE + 35)
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#define PMBUS_VIRT_VMON_OV_FAULT_LIMIT (PMBUS_VIRT_BASE + 36)
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#define PMBUS_VIRT_STATUS_VMON (PMBUS_VIRT_BASE + 37)
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PMBUS_VIRT_READ_VMON,
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PMBUS_VIRT_VMON_UV_WARN_LIMIT,
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PMBUS_VIRT_VMON_OV_WARN_LIMIT,
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PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
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PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
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PMBUS_VIRT_STATUS_VMON,
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};
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/*
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* OPERATION
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