drm/amdkfd: Fix leftover errors and warnings
A bunch of errors and warnings are leftover KFD over the years, attempt to fix the errors and most warnings reported by checkpatch tool. Still a few warnings remain which may be false positives so ignore them for now. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -37,7 +37,7 @@
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#include <linux/ptrace.h>
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#include <linux/dma-buf.h>
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#include <linux/fdtable.h>
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#include <asm/processor.h>
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#include <linux/processor.h>
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#include "kfd_priv.h"
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#include "kfd_device_queue_manager.h"
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#include "kfd_svm.h"
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@ -1133,11 +1133,12 @@ err_pdd:
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return ret;
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}
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static bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev) {
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static bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev)
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{
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return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2) ||
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(KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) &&
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dev->adev->sdma.instance[0].fw_version >= 18) ||
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KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0);
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(KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) &&
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dev->adev->sdma.instance[0].fw_version >= 18) ||
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KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0);
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}
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static int kfd_ioctl_map_memory_to_gpu(struct file *filep,
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@ -1382,7 +1382,7 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
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num_of_cache_types = ARRAY_SIZE(vegam_cache_info);
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break;
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default:
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switch(KFD_GC_VERSION(kdev)) {
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switch (KFD_GC_VERSION(kdev)) {
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case IP_VERSION(9, 0, 1):
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pcache_info = vega10_cache_info;
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num_of_cache_types = ARRAY_SIZE(vega10_cache_info);
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@ -233,7 +233,7 @@ struct crat_subtype_ccompute {
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#define CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT (1 << 2)
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#define CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT (1 << 3)
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#define CRAT_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA (1 << 4)
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#define CRAT_IOLINK_FLAGS_BI_DIRECTIONAL (1 << 31)
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#define CRAT_IOLINK_FLAGS_BI_DIRECTIONAL (1 << 31)
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#define CRAT_IOLINK_FLAGS_RESERVED_MASK 0x7fffffe0
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/*
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@ -36,7 +36,7 @@ static int kfd_debugfs_open(struct inode *inode, struct file *file)
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}
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static int kfd_debugfs_hang_hws_read(struct seq_file *m, void *data)
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{
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seq_printf(m, "echo gpu_id > hang_hws\n");
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seq_puts(m, "echo gpu_id > hang_hws\n");
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return 0;
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}
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@ -439,7 +439,8 @@ static int kfd_gws_init(struct kfd_dev *kfd)
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return ret;
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}
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static void kfd_smi_init(struct kfd_dev *dev) {
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static void kfd_smi_init(struct kfd_dev *dev)
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{
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INIT_LIST_HEAD(&dev->smi_clients);
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spin_lock_init(&dev->smi_lock);
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}
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@ -572,7 +573,7 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
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svm_migrate_init(kfd->adev);
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if(kgd2kfd_resume_iommu(kfd))
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if (kgd2kfd_resume_iommu(kfd))
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goto device_iommu_error;
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if (kfd_resume(kfd))
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@ -677,9 +677,9 @@ static int update_queue(struct device_queue_manager *dqm, struct queue *q,
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}
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retval = mqd_mgr->destroy_mqd(mqd_mgr, q->mqd,
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(dqm->dev->cwsr_enabled?
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KFD_PREEMPT_TYPE_WAVEFRONT_SAVE:
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KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN),
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(dqm->dev->cwsr_enabled ?
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KFD_PREEMPT_TYPE_WAVEFRONT_SAVE :
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KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN),
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KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
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if (retval) {
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pr_err("destroy mqd failed\n");
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@ -772,9 +772,9 @@ static int evict_process_queues_nocpsch(struct device_queue_manager *dqm,
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continue;
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retval = mqd_mgr->destroy_mqd(mqd_mgr, q->mqd,
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(dqm->dev->cwsr_enabled?
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KFD_PREEMPT_TYPE_WAVEFRONT_SAVE:
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KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN),
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(dqm->dev->cwsr_enabled ?
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KFD_PREEMPT_TYPE_WAVEFRONT_SAVE :
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KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN),
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KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
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if (retval && !ret)
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/* Return the first error, but keep going to
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@ -2235,8 +2235,7 @@ int dqm_debugfs_hqds(struct seq_file *m, void *data)
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int r = 0;
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if (!dqm->sched_running) {
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seq_printf(m, " Device is stopped\n");
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seq_puts(m, " Device is stopped\n");
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return 0;
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}
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@ -92,7 +92,7 @@ union GRBM_GFX_INDEX_BITS {
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*
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* @initialize: Initializes the pipelines and memory module for that device.
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*
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* @start: Initializes the resources/modules the the device needs for queues
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* @start: Initializes the resources/modules the device needs for queues
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* execution. This function is called on device initialization and after the
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* system woke up after suspension.
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*
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@ -113,7 +113,7 @@ union GRBM_GFX_INDEX_BITS {
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*
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* @evict_process_queues: Evict all active queues of a process
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*
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* @restore_process_queues: Restore all evicted queues queues of a process
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* @restore_process_queues: Restore all evicted queues of a process
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*
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* @get_wave_state: Retrieves context save state and optionally copies the
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* control stack, if kept in the MQD, to the given userspace address.
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@ -303,9 +303,7 @@ static inline void dqm_unlock(struct device_queue_manager *dqm)
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static inline int read_sdma_queue_counter(uint64_t __user *q_rptr, uint64_t *val)
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{
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/*
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* SDMA activity counter is stored at queue's RPTR + 0x8 location.
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*/
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/* SDMA activity counter is stored at queue's RPTR + 0x8 location. */
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return get_user(*val, q_rptr + 1);
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}
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#endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */
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@ -62,15 +62,6 @@ static int update_qpd_v10(struct device_queue_manager *dqm,
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(SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
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SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) |
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(3 << SH_MEM_CONFIG__INITIAL_INST_PREFETCH__SHIFT);
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#if 0
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/* TODO:
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* This shouldn't be an issue with Navi10. Verify.
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*/
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if (vega10_noretry)
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qpd->sh_mem_config |=
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1 << SH_MEM_CONFIG__RETRY_DISABLE__SHIFT;
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#endif
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qpd->sh_mem_ape1_limit = 0;
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qpd->sh_mem_ape1_base = 0;
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}
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@ -35,7 +35,7 @@
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#include "kfd_priv.h"
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#include <linux/mm.h>
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#include <linux/mman.h>
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#include <asm/processor.h>
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#include <linux/processor.h>
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/*
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* The primary memory I/O features being added for revisions of gfxip
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@ -120,7 +120,8 @@ static void event_interrupt_poison_consumption(struct kfd_dev *dev,
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kfd_signal_poison_consumed_event(dev, pasid);
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/* resetting queue passes, do page retirement without gpu reset
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resetting queue fails, fallback to gpu reset solution */
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* resetting queue fails, fallback to gpu reset solution
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*/
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if (!ret)
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amdgpu_amdkfd_ras_poison_consumption_handler(dev->adev, false);
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else
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@ -363,7 +363,7 @@ svm_migrate_copy_to_vram(struct amdgpu_device *adev, struct svm_range *prange,
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if (r)
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goto out_free_vram_pages;
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amdgpu_res_next(&cursor, (j + 1) * PAGE_SIZE);
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j= 0;
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j = 0;
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} else {
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j++;
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}
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@ -101,6 +101,7 @@ void mqd_symmetrically_map_cu_mask(struct mqd_manager *mm,
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struct kfd_cu_info cu_info;
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uint32_t cu_per_sh[KFD_MAX_NUM_SE][KFD_MAX_NUM_SH_PER_SE] = {0};
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int i, se, sh, cu;
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amdgpu_amdkfd_get_cu_info(mm->dev->adev, &cu_info);
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if (cu_mask_count > cu_info.cu_active_number)
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@ -206,7 +206,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
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/* GC 10 removed WPP_CLAMP from PQ Control */
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m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK |
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2 << CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT |
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1 << CP_HQD_PQ_CONTROL__QUEUE_FULL_EN__SHIFT ;
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1 << CP_HQD_PQ_CONTROL__QUEUE_FULL_EN__SHIFT;
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m->cp_hqd_pq_doorbell_control |=
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1 << CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT;
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}
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@ -329,6 +329,7 @@ static void init_mqd_hiq(struct mqd_manager *mm, void **mqd,
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struct queue_properties *q)
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{
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struct vi_mqd *m;
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init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q);
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m = get_mqd(*mqd);
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@ -102,8 +102,8 @@ struct pm4_mes_set_resources {
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struct pm4_mes_runlist {
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union {
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union PM4_MES_TYPE_3_HEADER header; /* header */
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uint32_t ordinal1;
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union PM4_MES_TYPE_3_HEADER header; /* header */
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uint32_t ordinal1;
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};
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union {
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@ -794,7 +794,7 @@ struct svm_range_list {
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atomic_t drain_pagefaults;
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struct delayed_work restore_work;
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DECLARE_BITMAP(bitmap_supported, MAX_GPU_INSTANCE);
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struct task_struct *faulting_task;
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struct task_struct *faulting_task;
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};
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/* Process data */
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@ -915,7 +915,7 @@ bool kfd_dev_is_large_bar(struct kfd_dev *dev);
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int kfd_process_create_wq(void);
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void kfd_process_destroy_wq(void);
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struct kfd_process *kfd_create_process(struct file *filep);
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struct kfd_process *kfd_get_process(const struct task_struct *);
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struct kfd_process *kfd_get_process(const struct task_struct *task);
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struct kfd_process *kfd_lookup_process_by_pasid(u32 pasid);
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struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm);
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@ -1442,9 +1442,9 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
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}
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/*
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* Overwrite ATS capability according to needs_iommu_device to fix
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* potential missing corresponding bit in CRAT of BIOS.
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*/
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* Overwrite ATS capability according to needs_iommu_device to fix
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* potential missing corresponding bit in CRAT of BIOS.
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*/
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if (dev->gpu->use_iommu_v2)
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dev->node_props.capability |= HSA_CAP_ATS_PRESENT;
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else
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