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MIPS: Code clean-ups for the GIC.
Fix whitespace, beautify the code and remove debug statements. Signed-off-by: Steven J. Hill <sjhill@mips.com>
This commit is contained in:
parent
0b271f5600
commit
2299c49d60
2 changed files with 26 additions and 34 deletions
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@ -33,13 +33,13 @@
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REG32(_gic_base + segment##_##SECTION_OFS + offset)
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REG32(_gic_base + segment##_##SECTION_OFS + offset)
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#define GIC_ABS_REG(segment, offset) \
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#define GIC_ABS_REG(segment, offset) \
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(_gic_base + segment##_##SECTION_OFS + offset##_##OFS)
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(_gic_base + segment##_##SECTION_OFS + offset##_##OFS)
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#define GIC_REG_ABS_ADDR(segment, offset) \
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#define GIC_REG_ABS_ADDR(segment, offset) \
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(_gic_base + segment##_##SECTION_OFS + offset)
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(_gic_base + segment##_##SECTION_OFS + offset)
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#ifdef GICISBYTELITTLEENDIAN
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#ifdef GICISBYTELITTLEENDIAN
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#define GICREAD(reg, data) (data) = (reg), (data) = le32_to_cpu(data)
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#define GICREAD(reg, data) ((data) = (reg), (data) = le32_to_cpu(data))
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#define GICWRITE(reg, data) (reg) = cpu_to_le32(data)
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#define GICWRITE(reg, data) ((reg) = cpu_to_le32(data))
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#define GICBIS(reg, bits) \
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#define GICBIS(reg, bits) \
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({unsigned int data; \
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({unsigned int data; \
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GICREAD(reg, data); \
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GICREAD(reg, data); \
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@ -48,9 +48,9 @@
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})
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})
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#else
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#else
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#define GICREAD(reg, data) (data) = (reg)
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#define GICREAD(reg, data) ((data) = (reg))
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#define GICWRITE(reg, data) (reg) = (data)
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#define GICWRITE(reg, data) ((reg) = (data))
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#define GICBIS(reg, bits) (reg) |= (bits)
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#define GICBIS(reg, bits) ((reg) |= (bits))
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#endif
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#endif
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@ -304,15 +304,15 @@
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GIC_SH_MAP_TO_VPE_REG_BIT(vpe))
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GIC_SH_MAP_TO_VPE_REG_BIT(vpe))
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struct gic_pcpu_mask {
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struct gic_pcpu_mask {
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DECLARE_BITMAP(pcpu_mask, GIC_NUM_INTRS);
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DECLARE_BITMAP(pcpu_mask, GIC_NUM_INTRS);
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};
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};
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struct gic_pending_regs {
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struct gic_pending_regs {
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DECLARE_BITMAP(pending, GIC_NUM_INTRS);
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DECLARE_BITMAP(pending, GIC_NUM_INTRS);
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};
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};
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struct gic_intrmask_regs {
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struct gic_intrmask_regs {
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DECLARE_BITMAP(intrmask, GIC_NUM_INTRS);
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DECLARE_BITMAP(intrmask, GIC_NUM_INTRS);
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};
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};
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/*
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/*
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@ -1,5 +1,11 @@
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#undef DEBUG
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2008 Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/bitmap.h>
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#include <linux/bitmap.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/smp.h>
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@ -11,7 +17,6 @@
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#include <linux/hardirq.h>
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#include <linux/hardirq.h>
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/find.h>
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unsigned long _gic_base;
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unsigned long _gic_base;
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unsigned int gic_irq_base;
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unsigned int gic_irq_base;
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unsigned int gic_irq_flags[GIC_NUM_INTRS];
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unsigned int gic_irq_flags[GIC_NUM_INTRS];
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@ -22,17 +27,15 @@ static struct gic_intrmask_regs intrmask_regs[NR_CPUS];
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void gic_send_ipi(unsigned int intr)
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void gic_send_ipi(unsigned int intr)
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{
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{
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pr_debug("CPU%d: %s status %08x\n", smp_processor_id(), __func__,
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read_c0_status());
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GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), 0x80000000 | intr);
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GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), 0x80000000 | intr);
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}
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}
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/* This is Malta specific and needs to be exported */
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static void __init vpe_local_setup(unsigned int numvpes)
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static void __init vpe_local_setup(unsigned int numvpes)
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{
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{
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int i;
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unsigned long timer_interrupt = GIC_INT_TMR;
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unsigned long timer_interrupt = 5, perf_interrupt = 5;
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unsigned long perf_interrupt = GIC_INT_PERFCTR;
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unsigned int vpe_ctl;
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unsigned int vpe_ctl;
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int i;
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/*
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/*
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* Setup the default performance counter timer interrupts
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* Setup the default performance counter timer interrupts
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@ -79,40 +82,30 @@ unsigned int gic_get_int(void)
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bitmap_and(pending, pending, intrmask, GIC_NUM_INTRS);
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bitmap_and(pending, pending, intrmask, GIC_NUM_INTRS);
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bitmap_and(pending, pending, pcpu_mask, GIC_NUM_INTRS);
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bitmap_and(pending, pending, pcpu_mask, GIC_NUM_INTRS);
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i = find_first_bit(pending, GIC_NUM_INTRS);
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return find_first_bit(pending, GIC_NUM_INTRS);
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pr_debug("CPU%d: %s pend=%d\n", smp_processor_id(), __func__, i);
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return i;
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}
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}
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static void gic_mask_irq(struct irq_data *d)
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static void gic_mask_irq(struct irq_data *d)
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{
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{
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unsigned int irq = d->irq - gic_irq_base;
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GIC_CLR_INTR_MASK(d->irq - gic_irq_base);
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pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
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GIC_CLR_INTR_MASK(irq);
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}
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}
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static void gic_unmask_irq(struct irq_data *d)
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static void gic_unmask_irq(struct irq_data *d)
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{
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{
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unsigned int irq = d->irq - gic_irq_base;
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GIC_SET_INTR_MASK(d->irq - gic_irq_base);
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pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
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GIC_SET_INTR_MASK(irq);
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}
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}
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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static DEFINE_SPINLOCK(gic_lock);
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static DEFINE_SPINLOCK(gic_lock);
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static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
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static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
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bool force)
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bool force)
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{
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{
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unsigned int irq = d->irq - gic_irq_base;
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unsigned int irq = (d->irq - gic_irq_base);
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cpumask_t tmp = CPU_MASK_NONE;
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cpumask_t tmp = CPU_MASK_NONE;
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unsigned long flags;
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unsigned long flags;
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int i;
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int i;
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pr_debug("%s(%d) called\n", __func__, irq);
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cpumask_and(&tmp, cpumask, cpu_online_mask);
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cpumask_and(&tmp, cpumask, cpu_online_mask);
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if (cpus_empty(tmp))
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if (cpus_empty(tmp))
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return -1;
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return -1;
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@ -176,6 +169,7 @@ static void __init gic_setup_intr(unsigned int intr, unsigned int cpu,
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/* Init Intr Masks */
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/* Init Intr Masks */
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GIC_CLR_INTR_MASK(intr);
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GIC_CLR_INTR_MASK(intr);
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/* Initialise per-cpu Interrupt software masks */
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/* Initialise per-cpu Interrupt software masks */
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if (flags & GIC_FLAG_IPI)
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if (flags & GIC_FLAG_IPI)
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set_bit(intr, pcpu_masks[cpu].pcpu_mask);
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set_bit(intr, pcpu_masks[cpu].pcpu_mask);
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@ -237,8 +231,6 @@ void __init gic_init(unsigned long gic_base_addr,
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numvpes = (gicconfig & GIC_SH_CONFIG_NUMVPES_MSK) >>
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numvpes = (gicconfig & GIC_SH_CONFIG_NUMVPES_MSK) >>
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GIC_SH_CONFIG_NUMVPES_SHF;
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GIC_SH_CONFIG_NUMVPES_SHF;
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pr_debug("%s called\n", __func__);
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gic_basic_init(numintrs, numvpes, intr_map, intr_map_size);
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gic_basic_init(numintrs, numvpes, intr_map, intr_map_size);
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gic_platform_init(numintrs, &gic_irq_controller);
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gic_platform_init(numintrs, &gic_irq_controller);
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