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nvme-pci: Separate IO and admin queue IRQ vectors
The admin and first IO queues shared the first irq vector, which has an affinity mask including cpu0. If a system allows cpu0 to be offlined, the admin queue may not be usable if no other CPUs in the affinity mask are online. This is a problem since unlike IO queues, there is only one admin queue that always needs to be usable. To fix, this patch allocates one pre_vector for the admin queue that is assigned all CPUs, so will always be accessible. The IO queues are assigned the remaining managed vectors. In case a controller has only one interrupt vector available, the admin and IO queues will share the pre_vector with all CPUs assigned. Cc: Jianchao Wang <jianchao.w.wang@oracle.com> Cc: Ming Lei <ming.lei@redhat.com> Signed-off-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Ming Lei <ming.lei@redhat.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
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a6ff7262c2
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22b5560195
1 changed files with 17 additions and 6 deletions
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@ -84,6 +84,7 @@ struct nvme_dev {
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struct dma_pool *prp_small_pool;
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unsigned online_queues;
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unsigned max_qid;
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unsigned int num_vecs;
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int q_depth;
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u32 db_stride;
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void __iomem *bar;
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@ -414,7 +415,8 @@ static int nvme_pci_map_queues(struct blk_mq_tag_set *set)
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{
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struct nvme_dev *dev = set->driver_data;
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return blk_mq_pci_map_queues(set, to_pci_dev(dev->dev), 0);
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return blk_mq_pci_map_queues(set, to_pci_dev(dev->dev),
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dev->num_vecs > 1 ? 1 /* admin queue */ : 0);
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}
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/**
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@ -1456,7 +1458,11 @@ static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
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nvmeq->sq_cmds_io = dev->cmb + offset;
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}
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nvmeq->cq_vector = qid - 1;
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/*
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* A queue's vector matches the queue identifier unless the controller
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* has only one vector available.
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*/
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nvmeq->cq_vector = dev->num_vecs == 1 ? 0 : qid;
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result = adapter_alloc_cq(dev, qid, nvmeq);
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if (result < 0)
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goto release_vector;
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@ -1910,6 +1916,10 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)
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int result, nr_io_queues;
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unsigned long size;
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struct irq_affinity affd = {
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.pre_vectors = 1
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};
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nr_io_queues = num_possible_cpus();
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result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues);
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if (result < 0)
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@ -1945,11 +1955,12 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)
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* setting up the full range we need.
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*/
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pci_free_irq_vectors(pdev);
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nr_io_queues = pci_alloc_irq_vectors(pdev, 1, nr_io_queues,
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PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY);
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if (nr_io_queues <= 0)
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result = pci_alloc_irq_vectors_affinity(pdev, 1, nr_io_queues + 1,
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PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY, &affd);
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if (result <= 0)
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return -EIO;
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dev->max_qid = nr_io_queues;
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dev->num_vecs = result;
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dev->max_qid = max(result - 1, 1);
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/*
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* Should investigate if there's a performance win from allocating
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