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arm64: allwinner: a64: Increase the MMC max frequency

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The eMMC controller seem to have a maximum frequency of 200MHz, while the
regular MMC controllers are capped at 150MHz.

Since older SoCs cannot go that high, we cannot change the default maximum
frequency, but fortunately for us we have a property for that in the DT.

This also has the side effect of allowing to use the MMC HS200 and SD
SDR104 modes for the boards that support it (with either 1.2v or 1.8v IOs).

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Maxime Ripard 2017-01-09 15:53:59 +01:00
parent a3e8f49262
commit 22be992fae
1 changed files with 3 additions and 0 deletions
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3
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@ -129,6 +129,7 @@ mmc0: mmc@1c0f000 {
resets = <&ccu RST_BUS_MMC0>;
reset-names = "ahb";
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <150000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -142,6 +143,7 @@ mmc1: mmc@1c10000 {
resets = <&ccu RST_BUS_MMC1>;
reset-names = "ahb";
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <150000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -155,6 +157,7 @@ mmc2: mmc@1c11000 {
resets = <&ccu RST_BUS_MMC2>;
reset-names = "ahb";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <200000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;