mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-04 09:59:32 +00:00
phy: for 4.11-rc
*) Revert USB3 PHY support for Broadcom NSP SoC *) Fix compiler error on qcom-usb-hs when depends on EXTCON is not added *) Fix error handling in phy-exynos-pcie Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJY0o46AAoJEA5ceFyATYLZM5wP/ixfO3WBz1l/aUvfraZ60i0M J10tRM3vWvbglRy30AMs+FOcSGlNq1eBWlpqjl8CH2YGGYsL9pjom1y5WDvgud+K +KIdoUtZzOa5KbMB0uUaiRw+le0Y30zwv8/DrfidANAAdah597qWtXThloQ4tm/r RmRF717ZL3SkkaLi7qcMpYUX0OXAZRPNbmmd0cAL7hwAYXk8WbZCeKu76YJfMckc DJgcqWzR2cD38vkGpRvR33vX6km/oeG0FLGXzfUSbUtk2uZETOH3mG+8blef8cVY 9FUo90TN2rxp3D06QEwdCM3nu0WKuUCdXCcZldjYDZpUTMqeh49fk2DCnT89WyDc VsqA/t5dt3I9lMBcXeNbIbJsiBpnIS958Vg0GKkEbgPQNBp5jdwlU6vbz+Xwkh+U plcGvhm2r+g+oiULJiHTKO2QwksZ/qTBHLsz4TcGWjxpRu5F9xYe6VNxefPoarwE 9z+lR9RPCztlHPytOKcpUJcAsZJYlBKq+IkM9pEpuv0g9X8QpTMvwpFKX5/uS5mc GX0Zw9bK43J8FgApyBMn92NIWgnlsXK1dHy3I9UORQDrWxPOSu32/rOmPnU8UaKO iR0FjGxKliC1BIt0iiHktPw/rwHj1PjZSBHUtmD9iS7/dI6ZizsX+raPHgxcRkW8 /ESBEM7dxKAGQ0LWJYNY =AZDi -----END PGP SIGNATURE----- Merge tag 'phy-for-4.11-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-linus Kishon writes: phy: for 4.11-rc *) Revert USB3 PHY support for Broadcom NSP SoC *) Fix compiler error on qcom-usb-hs when depends on EXTCON is not added *) Fix error handling in phy-exynos-pcie Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
commit
22db87ba6b
5 changed files with 3 additions and 227 deletions
|
@ -1,39 +0,0 @@
|
|||
Broadcom USB3 phy binding for northstar plus SoC
|
||||
The USB3 phy is internal to the SoC and is accessed using mdio interface.
|
||||
|
||||
Required mdio bus properties:
|
||||
- reg: Should be 0x0 for SoC internal USB3 phy
|
||||
- #address-cells: must be 1
|
||||
- #size-cells: must be 0
|
||||
|
||||
Required USB3 PHY properties:
|
||||
- compatible: should be "brcm,nsp-usb3-phy"
|
||||
- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10.
|
||||
- usb3-ctrl-syscon: handler of syscon node defining physical address
|
||||
of usb3 control register.
|
||||
- #phy-cells: must be 0
|
||||
|
||||
Required usb3 control properties:
|
||||
- compatible: should be "brcm,nsp-usb3-ctrl"
|
||||
- reg: offset and length of the control registers
|
||||
|
||||
Example:
|
||||
|
||||
mdio@0 {
|
||||
reg = <0x0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usb3_phy: usb-phy@10 {
|
||||
compatible = "brcm,nsp-usb3-phy";
|
||||
reg = <0x10>;
|
||||
usb3-ctrl-syscon = <&usb3_ctrl>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
usb3_ctrl: syscon@104408 {
|
||||
compatible = "brcm,nsp-usb3-ctrl", "syscon";
|
||||
reg = <0x104408 0x3fc>;
|
||||
};
|
|
@ -449,6 +449,7 @@ config PHY_QCOM_UFS
|
|||
config PHY_QCOM_USB_HS
|
||||
tristate "Qualcomm USB HS PHY module"
|
||||
depends on USB_ULPI_BUS
|
||||
depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
|
||||
select GENERIC_PHY
|
||||
help
|
||||
Support for the USB high-speed ULPI compliant phy on Qualcomm
|
||||
|
@ -510,12 +511,4 @@ config PHY_MESON8B_USB2
|
|||
and GXBB SoCs.
|
||||
If unsure, say N.
|
||||
|
||||
config PHY_NSP_USB3
|
||||
tristate "Broadcom NorthStar plus USB3 PHY driver"
|
||||
depends on OF && (ARCH_BCM_NSP || COMPILE_TEST)
|
||||
select GENERIC_PHY
|
||||
default ARCH_BCM_NSP
|
||||
help
|
||||
Enable this to support the Broadcom Northstar plus USB3 PHY.
|
||||
If unsure, say N.
|
||||
endmenu
|
||||
|
|
|
@ -62,4 +62,3 @@ obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o
|
|||
obj-$(CONFIG_ARCH_TEGRA) += tegra/
|
||||
obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
|
||||
obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o
|
||||
obj-$(CONFIG_PHY_NSP_USB3) += phy-bcm-nsp-usb3.o
|
||||
|
|
|
@ -1,177 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2016 Broadcom
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/mdio.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/phy/phy.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#define NSP_USB3_RST_CTRL_OFFSET 0x3f8
|
||||
|
||||
/* mdio reg access */
|
||||
#define NSP_USB3_PHY_BASE_ADDR_REG 0x1f
|
||||
|
||||
#define NSP_USB3_PHY_PLL30_BLOCK 0x8000
|
||||
#define NSP_USB3_PLL_CONTROL 0x01
|
||||
#define NSP_USB3_PLLA_CONTROL0 0x0a
|
||||
#define NSP_USB3_PLLA_CONTROL1 0x0b
|
||||
|
||||
#define NSP_USB3_PHY_TX_PMD_BLOCK 0x8040
|
||||
#define NSP_USB3_TX_PMD_CONTROL1 0x01
|
||||
|
||||
#define NSP_USB3_PHY_PIPE_BLOCK 0x8060
|
||||
#define NSP_USB3_LFPS_CMP 0x02
|
||||
#define NSP_USB3_LFPS_DEGLITCH 0x03
|
||||
|
||||
struct nsp_usb3_phy {
|
||||
struct regmap *usb3_ctrl;
|
||||
struct phy *phy;
|
||||
struct mdio_device *mdiodev;
|
||||
};
|
||||
|
||||
static int nsp_usb3_phy_init(struct phy *phy)
|
||||
{
|
||||
struct nsp_usb3_phy *iphy = phy_get_drvdata(phy);
|
||||
struct mii_bus *bus = iphy->mdiodev->bus;
|
||||
int addr = iphy->mdiodev->addr;
|
||||
u32 data;
|
||||
int rc;
|
||||
|
||||
rc = regmap_read(iphy->usb3_ctrl, 0, &data);
|
||||
if (rc)
|
||||
return rc;
|
||||
data |= 1;
|
||||
rc = regmap_write(iphy->usb3_ctrl, 0, data);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = regmap_write(iphy->usb3_ctrl, NSP_USB3_RST_CTRL_OFFSET, 1);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG,
|
||||
NSP_USB3_PHY_PLL30_BLOCK);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_PLL_CONTROL, 0x1000);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL0, 0x6400);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL1, 0xc000);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL1, 0x8000);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = regmap_write(iphy->usb3_ctrl, NSP_USB3_RST_CTRL_OFFSET, 0);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_PLL_CONTROL, 0x9000);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG,
|
||||
NSP_USB3_PHY_PIPE_BLOCK);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_LFPS_CMP, 0xf30d);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_LFPS_DEGLITCH, 0x6302);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG,
|
||||
NSP_USB3_PHY_TX_PMD_BLOCK);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = mdiobus_write(bus, addr, NSP_USB3_TX_PMD_CONTROL1, 0x1003);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static struct phy_ops nsp_usb3_phy_ops = {
|
||||
.init = nsp_usb3_phy_init,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
static int nsp_usb3_phy_probe(struct mdio_device *mdiodev)
|
||||
{
|
||||
struct device *dev = &mdiodev->dev;
|
||||
struct phy_provider *provider;
|
||||
struct nsp_usb3_phy *iphy;
|
||||
|
||||
iphy = devm_kzalloc(dev, sizeof(*iphy), GFP_KERNEL);
|
||||
if (!iphy)
|
||||
return -ENOMEM;
|
||||
iphy->mdiodev = mdiodev;
|
||||
|
||||
iphy->usb3_ctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
|
||||
"usb3-ctrl-syscon");
|
||||
if (IS_ERR(iphy->usb3_ctrl))
|
||||
return PTR_ERR(iphy->usb3_ctrl);
|
||||
|
||||
iphy->phy = devm_phy_create(dev, dev->of_node, &nsp_usb3_phy_ops);
|
||||
if (IS_ERR(iphy->phy)) {
|
||||
dev_err(dev, "failed to create PHY\n");
|
||||
return PTR_ERR(iphy->phy);
|
||||
}
|
||||
|
||||
phy_set_drvdata(iphy->phy, iphy);
|
||||
|
||||
provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
|
||||
if (IS_ERR(provider)) {
|
||||
dev_err(dev, "could not register PHY provider\n");
|
||||
return PTR_ERR(provider);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id nsp_usb3_phy_of_match[] = {
|
||||
{.compatible = "brcm,nsp-usb3-phy",},
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static struct mdio_driver nsp_usb3_phy_driver = {
|
||||
.mdiodrv = {
|
||||
.driver = {
|
||||
.name = "nsp-usb3-phy",
|
||||
.of_match_table = nsp_usb3_phy_of_match,
|
||||
},
|
||||
},
|
||||
.probe = nsp_usb3_phy_probe,
|
||||
};
|
||||
|
||||
mdio_module_driver(nsp_usb3_phy_driver);
|
||||
|
||||
MODULE_DESCRIPTION("Broadcom NSP USB3 PHY driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_AUTHOR("Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com");
|
|
@ -254,8 +254,8 @@ static int exynos_pcie_phy_probe(struct platform_device *pdev)
|
|||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
||||
exynos_phy->blk_base = devm_ioremap_resource(dev, res);
|
||||
if (IS_ERR(exynos_phy->phy_base))
|
||||
return PTR_ERR(exynos_phy->phy_base);
|
||||
if (IS_ERR(exynos_phy->blk_base))
|
||||
return PTR_ERR(exynos_phy->blk_base);
|
||||
|
||||
exynos_phy->drv_data = drv_data;
|
||||
|
||||
|
|
Loading…
Reference in a new issue