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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 08:19:28 +00:00
drm/i915: Implement HDCP for HDMI
This patch adds HDCP support for HDMI connectors by implementing the intel_hdcp_shim. Nothing too special, just a bunch of DDC reads/writes. Changes in v2: - Rebased on drm-intel-next Changes in v3: - Initialize new worker Changes in v4: - Remove SKL_ prefix from most register names (Daniel) - Wrap sanity checks in WARN_ON (Daniel) - Consolidate the enable/disable functions into one toggle fn - Use intel_hdcp_init (Daniel) Changes in v5: - checkpatch whitespace nits Changes in v6: - None Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Ramalingam C <ramalingam.c@intel.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180108195545.218615-9-seanpaul@chromium.org
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parent
07e17a7592
commit
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4 changed files with 282 additions and 0 deletions
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@ -8460,6 +8460,7 @@ enum skl_power_gate {
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#define TRANS_DDI_EDP_INPUT_A_ONOFF (4<<12)
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#define TRANS_DDI_EDP_INPUT_B_ONOFF (5<<12)
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#define TRANS_DDI_EDP_INPUT_C_ONOFF (6<<12)
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#define TRANS_DDI_HDCP_SIGNALLING (1<<9)
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#define TRANS_DDI_DP_VC_PAYLOAD_ALLOC (1<<8)
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#define TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1<<7)
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#define TRANS_DDI_HDMI_SCRAMBLER_RESET_FREQ (1<<6)
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@ -1615,6 +1615,35 @@ void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
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I915_WRITE(reg, val);
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}
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int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
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bool enable)
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{
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struct drm_device *dev = intel_encoder->base.dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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enum pipe pipe = 0;
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int ret = 0;
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uint32_t tmp;
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if (WARN_ON(!intel_display_power_get_if_enabled(dev_priv,
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intel_encoder->power_domain)))
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return -ENXIO;
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if (WARN_ON(!intel_encoder->get_hw_state(intel_encoder, &pipe))) {
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ret = -EIO;
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goto out;
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}
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tmp = I915_READ(TRANS_DDI_FUNC_CTL(pipe));
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if (enable)
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tmp |= TRANS_DDI_HDCP_SIGNALLING;
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else
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tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
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I915_WRITE(TRANS_DDI_FUNC_CTL(pipe), tmp);
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out:
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intel_display_power_put(dev_priv, intel_encoder->power_domain);
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return ret;
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}
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bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
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{
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struct drm_device *dev = intel_connector->base.dev;
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@ -1377,6 +1377,8 @@ void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
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u32 bxt_signal_levels(struct intel_dp *intel_dp);
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uint32_t ddi_signal_levels(struct intel_dp *intel_dp);
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u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder);
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int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
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bool enable);
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unsigned int intel_fb_align_height(const struct drm_framebuffer *fb,
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int plane, unsigned int height);
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@ -34,6 +34,7 @@
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_hdcp.h>
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#include <drm/drm_scdc_helper.h>
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#include "intel_drv.h"
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#include <drm/i915_drm.h>
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@ -876,6 +877,248 @@ void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable)
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adapter, enable);
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}
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static int intel_hdmi_hdcp_read(struct intel_digital_port *intel_dig_port,
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unsigned int offset, void *buffer, size_t size)
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{
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struct intel_hdmi *hdmi = &intel_dig_port->hdmi;
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struct drm_i915_private *dev_priv =
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intel_dig_port->base.base.dev->dev_private;
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struct i2c_adapter *adapter = intel_gmbus_get_adapter(dev_priv,
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hdmi->ddc_bus);
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int ret;
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u8 start = offset & 0xff;
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struct i2c_msg msgs[] = {
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{
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.addr = DRM_HDCP_DDC_ADDR,
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.flags = 0,
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.len = 1,
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.buf = &start,
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},
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{
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.addr = DRM_HDCP_DDC_ADDR,
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.flags = I2C_M_RD,
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.len = size,
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.buf = buffer
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}
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};
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ret = i2c_transfer(adapter, msgs, ARRAY_SIZE(msgs));
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if (ret == ARRAY_SIZE(msgs))
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return 0;
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return ret >= 0 ? -EIO : ret;
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}
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static int intel_hdmi_hdcp_write(struct intel_digital_port *intel_dig_port,
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unsigned int offset, void *buffer, size_t size)
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{
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struct intel_hdmi *hdmi = &intel_dig_port->hdmi;
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struct drm_i915_private *dev_priv =
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intel_dig_port->base.base.dev->dev_private;
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struct i2c_adapter *adapter = intel_gmbus_get_adapter(dev_priv,
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hdmi->ddc_bus);
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int ret;
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u8 *write_buf;
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struct i2c_msg msg;
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write_buf = kzalloc(size + 1, GFP_KERNEL);
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if (!write_buf)
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return -ENOMEM;
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write_buf[0] = offset & 0xff;
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memcpy(&write_buf[1], buffer, size);
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msg.addr = DRM_HDCP_DDC_ADDR;
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msg.flags = 0,
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msg.len = size + 1,
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msg.buf = write_buf;
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ret = i2c_transfer(adapter, &msg, 1);
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if (ret == 1)
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return 0;
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return ret >= 0 ? -EIO : ret;
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}
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static
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int intel_hdmi_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
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u8 *an)
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{
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struct intel_hdmi *hdmi = &intel_dig_port->hdmi;
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struct drm_i915_private *dev_priv =
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intel_dig_port->base.base.dev->dev_private;
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struct i2c_adapter *adapter = intel_gmbus_get_adapter(dev_priv,
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hdmi->ddc_bus);
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int ret;
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ret = intel_hdmi_hdcp_write(intel_dig_port, DRM_HDCP_DDC_AN, an,
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DRM_HDCP_AN_LEN);
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if (ret) {
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DRM_ERROR("Write An over DDC failed (%d)\n", ret);
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return ret;
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}
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ret = intel_gmbus_output_aksv(adapter);
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if (ret < 0) {
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DRM_ERROR("Failed to output aksv (%d)\n", ret);
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return ret;
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}
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return 0;
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}
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static int intel_hdmi_hdcp_read_bksv(struct intel_digital_port *intel_dig_port,
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u8 *bksv)
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{
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int ret;
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ret = intel_hdmi_hdcp_read(intel_dig_port, DRM_HDCP_DDC_BKSV, bksv,
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DRM_HDCP_KSV_LEN);
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if (ret)
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DRM_ERROR("Read Bksv over DDC failed (%d)\n", ret);
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return ret;
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}
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static
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int intel_hdmi_hdcp_read_bstatus(struct intel_digital_port *intel_dig_port,
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u8 *bstatus)
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{
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int ret;
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ret = intel_hdmi_hdcp_read(intel_dig_port, DRM_HDCP_DDC_BSTATUS,
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bstatus, DRM_HDCP_BSTATUS_LEN);
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if (ret)
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DRM_ERROR("Read bstatus over DDC failed (%d)\n", ret);
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return ret;
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}
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static
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int intel_hdmi_hdcp_repeater_present(struct intel_digital_port *intel_dig_port,
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bool *repeater_present)
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{
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int ret;
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u8 val;
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ret = intel_hdmi_hdcp_read(intel_dig_port, DRM_HDCP_DDC_BCAPS, &val, 1);
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if (ret) {
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DRM_ERROR("Read bcaps over DDC failed (%d)\n", ret);
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return ret;
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}
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*repeater_present = val & DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT;
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return 0;
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}
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static
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int intel_hdmi_hdcp_read_ri_prime(struct intel_digital_port *intel_dig_port,
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u8 *ri_prime)
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{
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int ret;
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ret = intel_hdmi_hdcp_read(intel_dig_port, DRM_HDCP_DDC_RI_PRIME,
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ri_prime, DRM_HDCP_RI_LEN);
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if (ret)
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DRM_ERROR("Read Ri' over DDC failed (%d)\n", ret);
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return ret;
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}
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static
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int intel_hdmi_hdcp_read_ksv_ready(struct intel_digital_port *intel_dig_port,
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bool *ksv_ready)
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{
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int ret;
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u8 val;
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ret = intel_hdmi_hdcp_read(intel_dig_port, DRM_HDCP_DDC_BCAPS, &val, 1);
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if (ret) {
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DRM_ERROR("Read bcaps over DDC failed (%d)\n", ret);
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return ret;
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}
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*ksv_ready = val & DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY;
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return 0;
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}
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static
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int intel_hdmi_hdcp_read_ksv_fifo(struct intel_digital_port *intel_dig_port,
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int num_downstream, u8 *ksv_fifo)
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{
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int ret;
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ret = intel_hdmi_hdcp_read(intel_dig_port, DRM_HDCP_DDC_KSV_FIFO,
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ksv_fifo, num_downstream * DRM_HDCP_KSV_LEN);
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if (ret) {
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DRM_ERROR("Read ksv fifo over DDC failed (%d)\n", ret);
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return ret;
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}
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return 0;
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}
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static
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int intel_hdmi_hdcp_read_v_prime_part(struct intel_digital_port *intel_dig_port,
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int i, u32 *part)
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{
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int ret;
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if (i >= DRM_HDCP_V_PRIME_NUM_PARTS)
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return -EINVAL;
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ret = intel_hdmi_hdcp_read(intel_dig_port, DRM_HDCP_DDC_V_PRIME(i),
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part, DRM_HDCP_V_PRIME_PART_LEN);
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if (ret)
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DRM_ERROR("Read V'[%d] over DDC failed (%d)\n", i, ret);
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return ret;
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}
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static
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int intel_hdmi_hdcp_toggle_signalling(struct intel_digital_port *intel_dig_port,
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bool enable)
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{
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int ret;
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if (!enable)
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usleep_range(6, 60); /* Bspec says >= 6us */
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ret = intel_ddi_toggle_hdcp_signalling(&intel_dig_port->base, enable);
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if (ret) {
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DRM_ERROR("%s HDCP signalling failed (%d)\n",
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enable ? "Enable" : "Disable", ret);
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return ret;
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}
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return 0;
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}
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static
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bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port)
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{
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struct drm_i915_private *dev_priv =
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intel_dig_port->base.base.dev->dev_private;
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enum port port = intel_dig_port->base.port;
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int ret;
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union {
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u32 reg;
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u8 shim[DRM_HDCP_RI_LEN];
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} ri;
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ret = intel_hdmi_hdcp_read_ri_prime(intel_dig_port, ri.shim);
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if (ret)
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return false;
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I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);
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/* Wait for Ri prime match */
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if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
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(HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) {
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DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n",
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I915_READ(PORT_HDCP_STATUS(port)));
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return false;
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}
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return true;
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}
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static const struct intel_hdcp_shim intel_hdmi_hdcp_shim = {
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.write_an_aksv = intel_hdmi_hdcp_write_an_aksv,
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.read_bksv = intel_hdmi_hdcp_read_bksv,
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.read_bstatus = intel_hdmi_hdcp_read_bstatus,
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.repeater_present = intel_hdmi_hdcp_repeater_present,
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.read_ri_prime = intel_hdmi_hdcp_read_ri_prime,
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.read_ksv_ready = intel_hdmi_hdcp_read_ksv_ready,
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.read_ksv_fifo = intel_hdmi_hdcp_read_ksv_fifo,
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.read_v_prime_part = intel_hdmi_hdcp_read_v_prime_part,
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.toggle_signalling = intel_hdmi_hdcp_toggle_signalling,
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.check_link = intel_hdmi_hdcp_check_link,
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};
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static void intel_hdmi_prepare(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state)
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{
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@ -2053,6 +2296,13 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
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intel_hdmi_add_properties(intel_hdmi, connector);
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if (INTEL_GEN(dev_priv) >= 9) {
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int ret = intel_hdcp_init(intel_connector,
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&intel_hdmi_hdcp_shim);
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if (ret)
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DRM_DEBUG_KMS("HDCP init failed, skipping.\n");
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}
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intel_connector_attach_encoder(intel_connector, intel_encoder);
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intel_hdmi->attached_connector = intel_connector;
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