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IIO: GYRO: ADXRS450: Add missing parity bit generation

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Add missing parity bit generation. Failure to add the parity bit
caused half of the register accesses to fail.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Michael Hennerich 2011-04-29 14:17:01 +02:00 committed by Greg Kroah-Hartman
parent caca8c89c2
commit 232b1648e5
1 changed files with 7 additions and 0 deletions
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7
drivers/staging/iio/gyro/adxrs450_core.c
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@ -59,6 +59,9 @@ static int adxrs450_spi_read_reg_16(struct device *dev,
st->tx[2] = 0;
st->tx[3] = 0;
if (!(hweight32(be32_to_cpu(*(u32 *)st->tx)) & 1))
st->tx[3] |= ADXRS450_P;
spi_message_init(&msg);
spi_message_add_tail(&xfers[0], &msg);
spi_message_add_tail(&xfers[1], &msg);
@ -103,6 +106,10 @@ static int adxrs450_spi_write_reg_16(struct device *dev,
st->tx[1] = reg_address << 1 | val >> 15;
st->tx[2] = val >> 7;
st->tx[3] = val << 1;
if (!(hweight32(be32_to_cpu(*(u32 *)st->tx)) & 1))
st->tx[3] |= ADXRS450_P;
spi_message_init(&msg);
spi_message_add_tail(&xfers, &msg);
ret = spi_sync(st->us, &msg);