mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 08:19:28 +00:00
Merge branch 'for-5.5' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-5.6
This commit is contained in:
commit
23534b1971
5 changed files with 152 additions and 56 deletions
|
@ -2432,6 +2432,13 @@ static void rt5640_disable_jack_detect(struct snd_soc_component *component)
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{
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struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
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/*
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* soc_remove_component() force-disables jack and thus rt5640->jack
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* could be NULL at the time of driver's module unloading.
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*/
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if (!rt5640->jack)
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return;
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disable_irq(rt5640->irq);
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rt5640_cancel_work(rt5640);
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@ -445,7 +445,8 @@ static const struct dmi_system_id byt_cht_es8316_quirk_table[] = {
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DMI_MATCH(DMI_SYS_VENDOR, "IRBIS"),
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DMI_MATCH(DMI_PRODUCT_NAME, "NB41"),
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},
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.driver_data = (void *)(BYT_CHT_ES8316_INTMIC_IN2_MAP
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.driver_data = (void *)(BYT_CHT_ES8316_SSP0
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| BYT_CHT_ES8316_INTMIC_IN2_MAP
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| BYT_CHT_ES8316_JD_INVERTED),
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},
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{ /* Teclast X98 Plus II */
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@ -11,7 +11,6 @@
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#include <linux/clk.h>
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#include <linux/dmi.h>
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#include <linux/slab.h>
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#include <asm/cpu_device_id.h>
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#include <linux/acpi.h>
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#include <sound/core.h>
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#include <sound/jack.h>
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@ -539,6 +539,9 @@ void snd_soc_pcm_component_free(struct snd_soc_pcm_runtime *rtd)
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struct snd_soc_rtdcom_list *rtdcom;
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struct snd_soc_component *component;
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if (!rtd->pcm)
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return;
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for_each_rtd_components(rtd, rtdcom, component)
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if (component->driver->pcm_destruct)
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component->driver->pcm_destruct(component, rtd->pcm);
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@ -184,6 +184,56 @@ static bool stm32_sai_sub_writeable_reg(struct device *dev, unsigned int reg)
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}
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}
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static int stm32_sai_sub_reg_up(struct stm32_sai_sub_data *sai,
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unsigned int reg, unsigned int mask,
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unsigned int val)
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{
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int ret;
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ret = clk_enable(sai->pdata->pclk);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(sai->regmap, reg, mask, val);
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clk_disable(sai->pdata->pclk);
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return ret;
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}
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static int stm32_sai_sub_reg_wr(struct stm32_sai_sub_data *sai,
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unsigned int reg, unsigned int mask,
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unsigned int val)
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{
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int ret;
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ret = clk_enable(sai->pdata->pclk);
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if (ret < 0)
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return ret;
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ret = regmap_write_bits(sai->regmap, reg, mask, val);
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clk_disable(sai->pdata->pclk);
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return ret;
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}
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static int stm32_sai_sub_reg_rd(struct stm32_sai_sub_data *sai,
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unsigned int reg, unsigned int *val)
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{
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int ret;
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ret = clk_enable(sai->pdata->pclk);
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if (ret < 0)
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return ret;
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ret = regmap_read(sai->regmap, reg, val);
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clk_disable(sai->pdata->pclk);
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return ret;
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}
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static const struct regmap_config stm32_sai_sub_regmap_config_f4 = {
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.reg_bits = 32,
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.reg_stride = 4,
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@ -295,7 +345,7 @@ static int stm32_sai_set_clk_div(struct stm32_sai_sub_data *sai,
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mask = SAI_XCR1_MCKDIV_MASK(SAI_XCR1_MCKDIV_WIDTH(version));
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cr1 = SAI_XCR1_MCKDIV_SET(div);
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ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, mask, cr1);
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ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, mask, cr1);
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if (ret < 0)
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dev_err(&sai->pdev->dev, "Failed to update CR1 register\n");
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@ -372,8 +422,8 @@ static int stm32_sai_mclk_enable(struct clk_hw *hw)
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dev_dbg(&sai->pdev->dev, "Enable master clock\n");
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return regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX,
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SAI_XCR1_MCKEN, SAI_XCR1_MCKEN);
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return stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,
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SAI_XCR1_MCKEN, SAI_XCR1_MCKEN);
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}
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static void stm32_sai_mclk_disable(struct clk_hw *hw)
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@ -383,7 +433,7 @@ static void stm32_sai_mclk_disable(struct clk_hw *hw)
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dev_dbg(&sai->pdev->dev, "Disable master clock\n");
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regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, SAI_XCR1_MCKEN, 0);
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stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, SAI_XCR1_MCKEN, 0);
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}
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static const struct clk_ops mclk_ops = {
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@ -446,15 +496,15 @@ static irqreturn_t stm32_sai_isr(int irq, void *devid)
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unsigned int sr, imr, flags;
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snd_pcm_state_t status = SNDRV_PCM_STATE_RUNNING;
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regmap_read(sai->regmap, STM_SAI_IMR_REGX, &imr);
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regmap_read(sai->regmap, STM_SAI_SR_REGX, &sr);
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stm32_sai_sub_reg_rd(sai, STM_SAI_IMR_REGX, &imr);
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stm32_sai_sub_reg_rd(sai, STM_SAI_SR_REGX, &sr);
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flags = sr & imr;
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if (!flags)
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return IRQ_NONE;
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regmap_write_bits(sai->regmap, STM_SAI_CLRFR_REGX, SAI_XCLRFR_MASK,
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SAI_XCLRFR_MASK);
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stm32_sai_sub_reg_wr(sai, STM_SAI_CLRFR_REGX, SAI_XCLRFR_MASK,
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SAI_XCLRFR_MASK);
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if (!sai->substream) {
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dev_err(&pdev->dev, "Device stopped. Spurious IRQ 0x%x\n", sr);
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@ -503,8 +553,8 @@ static int stm32_sai_set_sysclk(struct snd_soc_dai *cpu_dai,
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int ret;
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if (dir == SND_SOC_CLOCK_OUT && sai->sai_mclk) {
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ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX,
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SAI_XCR1_NODIV,
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ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,
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SAI_XCR1_NODIV,
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freq ? 0 : SAI_XCR1_NODIV);
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if (ret < 0)
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return ret;
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@ -583,7 +633,7 @@ static int stm32_sai_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask,
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slotr_mask |= SAI_XSLOTR_SLOTEN_MASK;
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regmap_update_bits(sai->regmap, STM_SAI_SLOTR_REGX, slotr_mask, slotr);
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stm32_sai_sub_reg_up(sai, STM_SAI_SLOTR_REGX, slotr_mask, slotr);
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sai->slot_width = slot_width;
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sai->slots = slots;
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@ -665,7 +715,7 @@ static int stm32_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
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cr1_mask |= SAI_XCR1_CKSTR;
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frcr_mask |= SAI_XFRCR_FSPOL;
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regmap_update_bits(sai->regmap, STM_SAI_FRCR_REGX, frcr_mask, frcr);
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stm32_sai_sub_reg_up(sai, STM_SAI_FRCR_REGX, frcr_mask, frcr);
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/* DAI clock master masks */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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@ -693,7 +743,7 @@ static int stm32_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
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cr1_mask |= SAI_XCR1_SLAVE;
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conf_update:
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ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, cr1_mask, cr1);
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ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, cr1_mask, cr1);
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if (ret < 0) {
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dev_err(cpu_dai->dev, "Failed to update CR1 register\n");
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return ret;
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@ -730,12 +780,12 @@ static int stm32_sai_startup(struct snd_pcm_substream *substream,
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}
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/* Enable ITs */
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regmap_write_bits(sai->regmap, STM_SAI_CLRFR_REGX,
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SAI_XCLRFR_MASK, SAI_XCLRFR_MASK);
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stm32_sai_sub_reg_wr(sai, STM_SAI_CLRFR_REGX,
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SAI_XCLRFR_MASK, SAI_XCLRFR_MASK);
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imr = SAI_XIMR_OVRUDRIE;
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if (STM_SAI_IS_CAPTURE(sai)) {
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regmap_read(sai->regmap, STM_SAI_CR2_REGX, &cr2);
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stm32_sai_sub_reg_rd(sai, STM_SAI_CR2_REGX, &cr2);
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if (cr2 & SAI_XCR2_MUTECNT_MASK)
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imr |= SAI_XIMR_MUTEDETIE;
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}
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@ -745,8 +795,8 @@ static int stm32_sai_startup(struct snd_pcm_substream *substream,
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else
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imr |= SAI_XIMR_AFSDETIE | SAI_XIMR_LFSDETIE;
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regmap_update_bits(sai->regmap, STM_SAI_IMR_REGX,
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SAI_XIMR_MASK, imr);
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stm32_sai_sub_reg_up(sai, STM_SAI_IMR_REGX,
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SAI_XIMR_MASK, imr);
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return 0;
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}
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@ -763,10 +813,10 @@ static int stm32_sai_set_config(struct snd_soc_dai *cpu_dai,
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* SAI fifo threshold is set to half fifo, to keep enough space
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* for DMA incoming bursts.
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*/
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regmap_write_bits(sai->regmap, STM_SAI_CR2_REGX,
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SAI_XCR2_FFLUSH | SAI_XCR2_FTH_MASK,
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SAI_XCR2_FFLUSH |
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SAI_XCR2_FTH_SET(STM_SAI_FIFO_TH_HALF));
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stm32_sai_sub_reg_wr(sai, STM_SAI_CR2_REGX,
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SAI_XCR2_FFLUSH | SAI_XCR2_FTH_MASK,
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SAI_XCR2_FFLUSH |
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SAI_XCR2_FTH_SET(STM_SAI_FIFO_TH_HALF));
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/* DS bits in CR1 not set for SPDIF (size forced to 24 bits).*/
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if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) {
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@ -795,7 +845,7 @@ static int stm32_sai_set_config(struct snd_soc_dai *cpu_dai,
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if ((sai->slots == 2) && (params_channels(params) == 1))
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cr1 |= SAI_XCR1_MONO;
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ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, cr1_mask, cr1);
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ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, cr1_mask, cr1);
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if (ret < 0) {
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dev_err(cpu_dai->dev, "Failed to update CR1 register\n");
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return ret;
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@ -809,7 +859,7 @@ static int stm32_sai_set_slots(struct snd_soc_dai *cpu_dai)
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struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai);
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int slotr, slot_sz;
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regmap_read(sai->regmap, STM_SAI_SLOTR_REGX, &slotr);
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stm32_sai_sub_reg_rd(sai, STM_SAI_SLOTR_REGX, &slotr);
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/*
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* If SLOTSZ is set to auto in SLOTR, align slot width on data size
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@ -831,16 +881,16 @@ static int stm32_sai_set_slots(struct snd_soc_dai *cpu_dai)
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sai->slots = 2;
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/* The number of slots in the audio frame is equal to NBSLOT[3:0] + 1*/
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regmap_update_bits(sai->regmap, STM_SAI_SLOTR_REGX,
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SAI_XSLOTR_NBSLOT_MASK,
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SAI_XSLOTR_NBSLOT_SET((sai->slots - 1)));
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stm32_sai_sub_reg_up(sai, STM_SAI_SLOTR_REGX,
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SAI_XSLOTR_NBSLOT_MASK,
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SAI_XSLOTR_NBSLOT_SET((sai->slots - 1)));
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/* Set default slots mask if not already set from DT */
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if (!(slotr & SAI_XSLOTR_SLOTEN_MASK)) {
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sai->slot_mask = (1 << sai->slots) - 1;
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regmap_update_bits(sai->regmap,
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STM_SAI_SLOTR_REGX, SAI_XSLOTR_SLOTEN_MASK,
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SAI_XSLOTR_SLOTEN_SET(sai->slot_mask));
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stm32_sai_sub_reg_up(sai,
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STM_SAI_SLOTR_REGX, SAI_XSLOTR_SLOTEN_MASK,
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SAI_XSLOTR_SLOTEN_SET(sai->slot_mask));
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}
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dev_dbg(cpu_dai->dev, "Slots %d, slot width %d\n",
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|
@ -870,14 +920,14 @@ static void stm32_sai_set_frame(struct snd_soc_dai *cpu_dai)
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dev_dbg(cpu_dai->dev, "Frame length %d, frame active %d\n",
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sai->fs_length, fs_active);
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regmap_update_bits(sai->regmap, STM_SAI_FRCR_REGX, frcr_mask, frcr);
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stm32_sai_sub_reg_up(sai, STM_SAI_FRCR_REGX, frcr_mask, frcr);
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if ((sai->fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_LSB) {
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offset = sai->slot_width - sai->data_size;
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regmap_update_bits(sai->regmap, STM_SAI_SLOTR_REGX,
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SAI_XSLOTR_FBOFF_MASK,
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SAI_XSLOTR_FBOFF_SET(offset));
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stm32_sai_sub_reg_up(sai, STM_SAI_SLOTR_REGX,
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SAI_XSLOTR_FBOFF_MASK,
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SAI_XSLOTR_FBOFF_SET(offset));
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}
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}
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|
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|
@ -994,9 +1044,9 @@ static int stm32_sai_configure_clock(struct snd_soc_dai *cpu_dai,
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return -EINVAL;
|
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}
|
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|
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regmap_update_bits(sai->regmap,
|
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STM_SAI_CR1_REGX,
|
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SAI_XCR1_OSR, cr1);
|
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stm32_sai_sub_reg_up(sai,
|
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STM_SAI_CR1_REGX,
|
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SAI_XCR1_OSR, cr1);
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|
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div = stm32_sai_get_clk_div(sai, sai_clk_rate,
|
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sai->mclk_rate);
|
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|
@ -1058,12 +1108,12 @@ static int stm32_sai_trigger(struct snd_pcm_substream *substream, int cmd,
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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dev_dbg(cpu_dai->dev, "Enable DMA and SAI\n");
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regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX,
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SAI_XCR1_DMAEN, SAI_XCR1_DMAEN);
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stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,
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SAI_XCR1_DMAEN, SAI_XCR1_DMAEN);
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/* Enable SAI */
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ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX,
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SAI_XCR1_SAIEN, SAI_XCR1_SAIEN);
|
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ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,
|
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SAI_XCR1_SAIEN, SAI_XCR1_SAIEN);
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if (ret < 0)
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dev_err(cpu_dai->dev, "Failed to update CR1 register\n");
|
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break;
|
||||
|
@ -1072,16 +1122,16 @@ static int stm32_sai_trigger(struct snd_pcm_substream *substream, int cmd,
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case SNDRV_PCM_TRIGGER_STOP:
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dev_dbg(cpu_dai->dev, "Disable DMA and SAI\n");
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|
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regmap_update_bits(sai->regmap, STM_SAI_IMR_REGX,
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SAI_XIMR_MASK, 0);
|
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stm32_sai_sub_reg_up(sai, STM_SAI_IMR_REGX,
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SAI_XIMR_MASK, 0);
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regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX,
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SAI_XCR1_SAIEN,
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(unsigned int)~SAI_XCR1_SAIEN);
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stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,
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SAI_XCR1_SAIEN,
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(unsigned int)~SAI_XCR1_SAIEN);
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ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX,
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SAI_XCR1_DMAEN,
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(unsigned int)~SAI_XCR1_DMAEN);
|
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ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,
|
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SAI_XCR1_DMAEN,
|
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(unsigned int)~SAI_XCR1_DMAEN);
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if (ret < 0)
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dev_err(cpu_dai->dev, "Failed to update CR1 register\n");
|
||||
|
||||
|
@ -1101,7 +1151,7 @@ static void stm32_sai_shutdown(struct snd_pcm_substream *substream,
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struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai);
|
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unsigned long flags;
|
||||
|
||||
regmap_update_bits(sai->regmap, STM_SAI_IMR_REGX, SAI_XIMR_MASK, 0);
|
||||
stm32_sai_sub_reg_up(sai, STM_SAI_IMR_REGX, SAI_XIMR_MASK, 0);
|
||||
|
||||
clk_disable_unprepare(sai->sai_ck);
|
||||
|
||||
|
@ -1169,7 +1219,7 @@ static int stm32_sai_dai_probe(struct snd_soc_dai *cpu_dai)
|
|||
cr1_mask |= SAI_XCR1_SYNCEN_MASK;
|
||||
cr1 |= SAI_XCR1_SYNCEN_SET(sai->sync);
|
||||
|
||||
return regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, cr1_mask, cr1);
|
||||
return stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, cr1_mask, cr1);
|
||||
}
|
||||
|
||||
static const struct snd_soc_dai_ops stm32_sai_pcm_dai_ops = {
|
||||
|
@ -1322,8 +1372,13 @@ static int stm32_sai_sub_parse_of(struct platform_device *pdev,
|
|||
if (STM_SAI_HAS_PDM(sai) && STM_SAI_IS_SUB_A(sai))
|
||||
sai->regmap_config = &stm32_sai_sub_regmap_config_h7;
|
||||
|
||||
sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "sai_ck",
|
||||
base, sai->regmap_config);
|
||||
/*
|
||||
* Do not manage peripheral clock through regmap framework as this
|
||||
* can lead to circular locking issue with sai master clock provider.
|
||||
* Manage peripheral clock directly in driver instead.
|
||||
*/
|
||||
sai->regmap = devm_regmap_init_mmio(&pdev->dev, base,
|
||||
sai->regmap_config);
|
||||
if (IS_ERR(sai->regmap)) {
|
||||
dev_err(&pdev->dev, "Failed to initialize MMIO\n");
|
||||
return PTR_ERR(sai->regmap);
|
||||
|
@ -1420,6 +1475,10 @@ static int stm32_sai_sub_parse_of(struct platform_device *pdev,
|
|||
return PTR_ERR(sai->sai_ck);
|
||||
}
|
||||
|
||||
ret = clk_prepare(sai->pdata->pclk);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (STM_SAI_IS_F4(sai->pdata))
|
||||
return 0;
|
||||
|
||||
|
@ -1501,22 +1560,48 @@ static int stm32_sai_sub_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int stm32_sai_sub_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct stm32_sai_sub_data *sai = dev_get_drvdata(&pdev->dev);
|
||||
|
||||
clk_unprepare(sai->pdata->pclk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int stm32_sai_sub_suspend(struct device *dev)
|
||||
{
|
||||
struct stm32_sai_sub_data *sai = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
ret = clk_enable(sai->pdata->pclk);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
regcache_cache_only(sai->regmap, true);
|
||||
regcache_mark_dirty(sai->regmap);
|
||||
|
||||
clk_disable(sai->pdata->pclk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int stm32_sai_sub_resume(struct device *dev)
|
||||
{
|
||||
struct stm32_sai_sub_data *sai = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
ret = clk_enable(sai->pdata->pclk);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
regcache_cache_only(sai->regmap, false);
|
||||
return regcache_sync(sai->regmap);
|
||||
ret = regcache_sync(sai->regmap);
|
||||
|
||||
clk_disable(sai->pdata->pclk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif /* CONFIG_PM_SLEEP */
|
||||
|
||||
|
@ -1531,6 +1616,7 @@ static struct platform_driver stm32_sai_sub_driver = {
|
|||
.pm = &stm32_sai_sub_pm_ops,
|
||||
},
|
||||
.probe = stm32_sai_sub_probe,
|
||||
.remove = stm32_sai_sub_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(stm32_sai_sub_driver);
|
||||
|
|
Loading…
Reference in a new issue