mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-06 19:07:52 +00:00
Linux 3.13-rc3
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.15 (GNU/Linux) iQEcBAABAgAGBQJSogqUAAoJEHm+PkMAQRiGM2MIAJrr5KEXEWuuAR4+JkkWBK7A +dVT4n1MM4wP/aCIyriSlq7kgT03Wxk4Q4wKsj2wZvDQkNgEQjrctgIihc75jqi5 126nmT3YXJLwgDpFA3RHZUWve3j3vfUG53rRuk7K9Xx1sGWU3Ls7BuInvQZ//+QS 6UB4UuEAalmose5U8ToXQfMqZhjwreZKeb64TEZwFvu2klv4cnka1L/zHbmQGgRg 2Pfv+aUrjsYE8s9lkEKX8MIQsDn28Q5Lsv7XIEQwo2at4rYbJaxX6usuC1OI0MQ5 BLUn1GgtvOidq6FzSg6kXiA/MJYH3J0S+p4uULWAprxA+KeJRbWNRroM94W1qAk= =1Wcq -----END PGP SIGNATURE----- Merge tag 'v3.13-rc3' into dt3-base Linux 3.13-rc3 Conflicts: drivers/pinctrl/sh-pfc/pfc-r8a7740.c drivers/pinctrl/sh-pfc/pfc-sh7372.c
This commit is contained in:
commit
236573d240
298 changed files with 2463 additions and 1341 deletions
|
@ -7,10 +7,18 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM.
|
|||
Required properties:
|
||||
- compatible : Should be "ti,omap3-mpu" for OMAP3
|
||||
Should be "ti,omap4-mpu" for OMAP4
|
||||
Should be "ti,omap5-mpu" for OMAP5
|
||||
- ti,hwmods: "mpu"
|
||||
|
||||
Examples:
|
||||
|
||||
- For an OMAP5 SMP system:
|
||||
|
||||
mpu {
|
||||
compatible = "ti,omap5-mpu";
|
||||
ti,hwmods = "mpu"
|
||||
};
|
||||
|
||||
- For an OMAP4 SMP system:
|
||||
|
||||
mpu {
|
||||
|
|
|
@ -7,6 +7,7 @@ representation in the device tree should be done as under:-
|
|||
Required properties:
|
||||
|
||||
- compatible : should be one of
|
||||
"arm,armv8-pmuv3"
|
||||
"arm,cortex-a15-pmu"
|
||||
"arm,cortex-a9-pmu"
|
||||
"arm,cortex-a8-pmu"
|
||||
|
|
|
@ -49,7 +49,7 @@ adc@12D10000 {
|
|||
/* NTC thermistor is a hwmon device */
|
||||
ncp15wb473@0 {
|
||||
compatible = "ntc,ncp15wb473";
|
||||
pullup-uV = <1800000>;
|
||||
pullup-uv = <1800000>;
|
||||
pullup-ohm = <47000>;
|
||||
pulldown-ohm = <0>;
|
||||
io-channels = <&adc 4>;
|
||||
|
|
|
@ -6,7 +6,7 @@ SoC's in the Exynos4 family.
|
|||
|
||||
Required Properties:
|
||||
|
||||
- comptible: should be one of the following.
|
||||
- compatible: should be one of the following.
|
||||
- "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC.
|
||||
- "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC.
|
||||
|
||||
|
|
|
@ -5,7 +5,7 @@ controllers within the Exynos5250 SoC.
|
|||
|
||||
Required Properties:
|
||||
|
||||
- comptible: should be one of the following.
|
||||
- compatible: should be one of the following.
|
||||
- "samsung,exynos5250-clock" - controller compatible with Exynos5250 SoC.
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
|
|
|
@ -5,7 +5,7 @@ controllers within the Exynos5420 SoC.
|
|||
|
||||
Required Properties:
|
||||
|
||||
- comptible: should be one of the following.
|
||||
- compatible: should be one of the following.
|
||||
- "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC.
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
|
|
|
@ -5,7 +5,7 @@ controllers within the Exynos5440 SoC.
|
|||
|
||||
Required Properties:
|
||||
|
||||
- comptible: should be "samsung,exynos5440-clock".
|
||||
- compatible: should be "samsung,exynos5440-clock".
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
|
|
|
@ -5,16 +5,42 @@ This is for the non-QE/CPM/GUTs GPIO controllers as found on
|
|||
|
||||
Every GPIO controller node must have #gpio-cells property defined,
|
||||
this information will be used to translate gpio-specifiers.
|
||||
See bindings/gpio/gpio.txt for details of how to specify GPIO
|
||||
information for devices.
|
||||
|
||||
The GPIO module usually is connected to the SoC's internal interrupt
|
||||
controller, see bindings/interrupt-controller/interrupts.txt (the
|
||||
interrupt client nodes section) for details how to specify this GPIO
|
||||
module's interrupt.
|
||||
|
||||
The GPIO module may serve as another interrupt controller (cascaded to
|
||||
the SoC's internal interrupt controller). See the interrupt controller
|
||||
nodes section in bindings/interrupt-controller/interrupts.txt for
|
||||
details.
|
||||
|
||||
Required properties:
|
||||
- compatible : "fsl,<CHIP>-gpio" followed by "fsl,mpc8349-gpio" for
|
||||
83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx.
|
||||
- #gpio-cells : Should be two. The first cell is the pin number and the
|
||||
second cell is used to specify optional parameters (currently unused).
|
||||
- interrupts : Interrupt mapping for GPIO IRQ.
|
||||
- interrupt-parent : Phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- gpio-controller : Marks the port as GPIO controller.
|
||||
- compatible: "fsl,<chip>-gpio" followed by "fsl,mpc8349-gpio"
|
||||
for 83xx, "fsl,mpc8572-gpio" for 85xx, or
|
||||
"fsl,mpc8610-gpio" for 86xx.
|
||||
- #gpio-cells: Should be two. The first cell is the pin number
|
||||
and the second cell is used to specify optional
|
||||
parameters (currently unused).
|
||||
- interrupt-parent: Phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- interrupts: Interrupt mapping for GPIO IRQ.
|
||||
- gpio-controller: Marks the port as GPIO controller.
|
||||
|
||||
Optional properties:
|
||||
- interrupt-controller: Empty boolean property which marks the GPIO
|
||||
module as an IRQ controller.
|
||||
- #interrupt-cells: Should be two. Defines the number of integer
|
||||
cells required to specify an interrupt within
|
||||
this interrupt controller. The first cell
|
||||
defines the pin number, the second cell
|
||||
defines additional flags (trigger type,
|
||||
trigger polarity). Note that the available
|
||||
set of trigger conditions supported by the
|
||||
GPIO module depends on the actual SoC.
|
||||
|
||||
Example of gpio-controller nodes for a MPC8347 SoC:
|
||||
|
||||
|
@ -22,39 +48,27 @@ Example of gpio-controller nodes for a MPC8347 SoC:
|
|||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
|
||||
reg = <0xc00 0x100>;
|
||||
interrupts = <74 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <74 0x8>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio2: gpio-controller@d00 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
|
||||
reg = <0xd00 0x100>;
|
||||
interrupts = <75 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <75 0x8>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
See booting-without-of.txt for details of how to specify GPIO
|
||||
information for devices.
|
||||
|
||||
To use GPIO pins as interrupt sources for peripherals, specify the
|
||||
GPIO controller as the interrupt parent and define GPIO number +
|
||||
trigger mode using the interrupts property, which is defined like
|
||||
this:
|
||||
|
||||
interrupts = <number trigger>, where:
|
||||
- number: GPIO pin (0..31)
|
||||
- trigger: trigger mode:
|
||||
2 = trigger on falling edge
|
||||
3 = trigger on both edges
|
||||
|
||||
Example of device using this is:
|
||||
Example of a peripheral using the GPIO module as an IRQ controller:
|
||||
|
||||
funkyfpga@0 {
|
||||
compatible = "funky-fpga";
|
||||
...
|
||||
interrupts = <4 3>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 3>;
|
||||
};
|
||||
|
|
54
Documentation/devicetree/bindings/mmc/ti-omap.txt
Normal file
54
Documentation/devicetree/bindings/mmc/ti-omap.txt
Normal file
|
@ -0,0 +1,54 @@
|
|||
* TI MMC host controller for OMAP1 and 2420
|
||||
|
||||
The MMC Host Controller on TI OMAP1 and 2420 family provides
|
||||
an interface for MMC, SD, and SDIO types of memory cards.
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the omap mmc driver.
|
||||
|
||||
Note that this driver will not work with omap2430 or later omaps,
|
||||
please see the omap hsmmc driver for the current omaps.
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "ti,omap2420-mmc", for OMAP2420 controllers
|
||||
- ti,hwmods: For 2420, must be "msdi<n>", where n is controller
|
||||
instance starting 1
|
||||
|
||||
Examples:
|
||||
|
||||
msdi1: mmc@4809c000 {
|
||||
compatible = "ti,omap2420-mmc";
|
||||
ti,hwmods = "msdi1";
|
||||
reg = <0x4809c000 0x80>;
|
||||
interrupts = <83>;
|
||||
dmas = <&sdma 61 &sdma 62>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
* TI MMC host controller for OMAP1 and 2420
|
||||
|
||||
The MMC Host Controller on TI OMAP1 and 2420 family provides
|
||||
an interface for MMC, SD, and SDIO types of memory cards.
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the omap mmc driver.
|
||||
|
||||
Note that this driver will not work with omap2430 or later omaps,
|
||||
please see the omap hsmmc driver for the current omaps.
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "ti,omap2420-mmc", for OMAP2420 controllers
|
||||
- ti,hwmods: For 2420, must be "msdi<n>", where n is controller
|
||||
instance starting 1
|
||||
|
||||
Examples:
|
||||
|
||||
msdi1: mmc@4809c000 {
|
||||
compatible = "ti,omap2420-mmc";
|
||||
ti,hwmods = "msdi1";
|
||||
reg = <0x4809c000 0x80>;
|
||||
interrupts = <83>;
|
||||
dmas = <&sdma 61 &sdma 62>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
|
@ -15,6 +15,7 @@ Optional properties:
|
|||
only if property "phy-reset-gpios" is available. Missing the property
|
||||
will have the duration be 1 millisecond. Numbers greater than 1000 are
|
||||
invalid and 1 millisecond will be used instead.
|
||||
- phy-supply: regulator that powers the Ethernet PHY.
|
||||
|
||||
Example:
|
||||
|
||||
|
@ -25,4 +26,5 @@ ethernet@83fec000 {
|
|||
phy-mode = "mii";
|
||||
phy-reset-gpios = <&gpio2 14 0>; /* GPIO2_14 */
|
||||
local-mac-address = [00 04 9F 01 1B B9];
|
||||
phy-supply = <®_fec_supply>;
|
||||
};
|
||||
|
|
|
@ -1,5 +0,0 @@
|
|||
NVIDIA Tegra 2 SPI device
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "nvidia,tegra20-spi".
|
||||
- gpios : should specify GPIOs used for chipselect.
|
|
@ -32,12 +32,14 @@ est ESTeem Wireless Modems
|
|||
fsl Freescale Semiconductor
|
||||
GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
|
||||
gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
|
||||
gmt Global Mixed-mode Technology, Inc.
|
||||
hisilicon Hisilicon Limited.
|
||||
hp Hewlett Packard
|
||||
ibm International Business Machines (IBM)
|
||||
idt Integrated Device Technologies, Inc.
|
||||
img Imagination Technologies Ltd.
|
||||
intercontrol Inter Control Group
|
||||
lg LG Corporation
|
||||
linux Linux-specific binding
|
||||
lsi LSI Corp. (LSI Logic)
|
||||
marvell Marvell Technology Group Ltd.
|
||||
|
|
14
Documentation/gpio/00-INDEX
Normal file
14
Documentation/gpio/00-INDEX
Normal file
|
@ -0,0 +1,14 @@
|
|||
00-INDEX
|
||||
- This file
|
||||
gpio.txt
|
||||
- Introduction to GPIOs and their kernel interfaces
|
||||
consumer.txt
|
||||
- How to obtain and use GPIOs in a driver
|
||||
driver.txt
|
||||
- How to write a GPIO driver
|
||||
board.txt
|
||||
- How to assign GPIOs to a consumer device and a function
|
||||
sysfs.txt
|
||||
- Information about the GPIO sysfs interface
|
||||
gpio-legacy.txt
|
||||
- Historical documentation of the deprecated GPIO integer interface
|
18
MAINTAINERS
18
MAINTAINERS
|
@ -1934,7 +1934,8 @@ S: Maintained
|
|||
F: drivers/gpio/gpio-bt8xx.c
|
||||
|
||||
BTRFS FILE SYSTEM
|
||||
M: Chris Mason <chris.mason@fusionio.com>
|
||||
M: Chris Mason <clm@fb.com>
|
||||
M: Josef Bacik <jbacik@fb.com>
|
||||
L: linux-btrfs@vger.kernel.org
|
||||
W: http://btrfs.wiki.kernel.org/
|
||||
Q: http://patchwork.kernel.org/project/linux-btrfs/list/
|
||||
|
@ -4049,6 +4050,12 @@ W: http://www.pharscape.org
|
|||
S: Maintained
|
||||
F: drivers/net/usb/hso.c
|
||||
|
||||
HSR NETWORK PROTOCOL
|
||||
M: Arvid Brodin <arvid.brodin@alten.se>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: net/hsr/
|
||||
|
||||
HTCPEN TOUCHSCREEN DRIVER
|
||||
M: Pau Oliva Fora <pof@eslack.org>
|
||||
L: linux-input@vger.kernel.org
|
||||
|
@ -5261,7 +5268,7 @@ S: Maintained
|
|||
F: Documentation/lockdep*.txt
|
||||
F: Documentation/lockstat.txt
|
||||
F: include/linux/lockdep.h
|
||||
F: kernel/lockdep*
|
||||
F: kernel/locking/
|
||||
|
||||
LOGICAL DISK MANAGER SUPPORT (LDM, Windows 2000/XP/Vista Dynamic Disks)
|
||||
M: "Richard Russon (FlatCap)" <ldm@flatcap.org>
|
||||
|
@ -5973,10 +5980,10 @@ F: drivers/nfc/
|
|||
F: include/linux/platform_data/pn544.h
|
||||
|
||||
NFS, SUNRPC, AND LOCKD CLIENTS
|
||||
M: Trond Myklebust <Trond.Myklebust@netapp.com>
|
||||
M: Trond Myklebust <trond.myklebust@primarydata.com>
|
||||
L: linux-nfs@vger.kernel.org
|
||||
W: http://client.linux-nfs.org
|
||||
T: git git://git.linux-nfs.org/pub/linux/nfs-2.6.git
|
||||
T: git git://git.linux-nfs.org/projects/trondmy/linux-nfs.git
|
||||
S: Maintained
|
||||
F: fs/lockd/
|
||||
F: fs/nfs/
|
||||
|
@ -6243,8 +6250,8 @@ OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
|
|||
M: Rob Herring <rob.herring@calxeda.com>
|
||||
M: Pawel Moll <pawel.moll@arm.com>
|
||||
M: Mark Rutland <mark.rutland@arm.com>
|
||||
M: Stephen Warren <swarren@wwwdotorg.org>
|
||||
M: Ian Campbell <ijc+devicetree@hellion.org.uk>
|
||||
M: Kumar Gala <galak@codeaurora.org>
|
||||
L: devicetree@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/
|
||||
|
@ -7385,7 +7392,6 @@ S: Maintained
|
|||
F: kernel/sched/
|
||||
F: include/linux/sched.h
|
||||
F: include/uapi/linux/sched.h
|
||||
F: kernel/wait.c
|
||||
F: include/linux/wait.h
|
||||
|
||||
SCORE ARCHITECTURE
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 13
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc3
|
||||
NAME = One Giant Leap for Frogkind
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -13,4 +13,83 @@
|
|||
/ {
|
||||
model = "IGEP COM AM335x on AQUILA Expansion";
|
||||
compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
|
||||
|
||||
hdmi {
|
||||
compatible = "ti,tilcdc,slave";
|
||||
i2c = <&i2c0>;
|
||||
pinctrl-names = "default", "off";
|
||||
pinctrl-0 = <&nxp_hdmi_pins>;
|
||||
pinctrl-1 = <&nxp_hdmi_off_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
leds_base {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&leds_base_pins>;
|
||||
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@0 {
|
||||
label = "base:red:user";
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; /* gpio1_21 */
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
label = "base:green:user";
|
||||
gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; /* gpio2_0 */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */
|
||||
0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0 */
|
||||
0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1 */
|
||||
0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2 */
|
||||
0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3 */
|
||||
0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4 */
|
||||
0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5 */
|
||||
0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6 */
|
||||
0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7 */
|
||||
0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8 */
|
||||
0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9 */
|
||||
0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10 */
|
||||
0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11 */
|
||||
0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12 */
|
||||
0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13 */
|
||||
0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14 */
|
||||
0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15 */
|
||||
0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync */
|
||||
0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync */
|
||||
0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk */
|
||||
0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en */
|
||||
>;
|
||||
};
|
||||
nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */
|
||||
>;
|
||||
};
|
||||
|
||||
leds_base_pins: pinmux_leds_base_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
||||
0x88 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&lcdc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
eeprom: eeprom@50 {
|
||||
compatible = "at,24c256";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -199,6 +199,35 @@ &uart0 {
|
|||
pinctrl-0 = <&uart0_pins>;
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
|
||||
control@44e10000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb-phy@47401300 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb-phy@47401b00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb@47401000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb@47401800 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
dma-controller@07402000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
#include "tps65910.dtsi"
|
||||
|
||||
&tps {
|
||||
|
|
|
@ -99,22 +99,22 @@ spi-flash@0 {
|
|||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* both standard PCIe slots and mini-PCIe
|
||||
* slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* both standard PCIe slots and mini-PCIe
|
||||
* slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -118,7 +118,7 @@ mpic: interrupt-controller@20000 {
|
|||
|
||||
coherency-fabric@20200 {
|
||||
compatible = "marvell,coherency-fabric";
|
||||
reg = <0x20200 0xb0>, <0x21810 0x1c>;
|
||||
reg = <0x20200 0xb0>, <0x21010 0x1c>;
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
|
|
|
@ -47,7 +47,7 @@ soc {
|
|||
/*
|
||||
* MV78230 has 2 PCIe units Gen2.0: One unit can be
|
||||
* configured as x4 or quad x1 lanes. One unit is
|
||||
* x4/x1.
|
||||
* x1 only.
|
||||
*/
|
||||
pcie-controller {
|
||||
compatible = "marvell,armada-xp-pcie";
|
||||
|
@ -62,10 +62,10 @@ pcie-controller {
|
|||
|
||||
ranges =
|
||||
<0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
|
||||
0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
|
||||
0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
|
||||
0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
|
||||
0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
|
||||
0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
|
||||
0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
|
||||
0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
|
||||
0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
|
||||
|
@ -74,8 +74,8 @@ pcie-controller {
|
|||
0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */
|
||||
0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
|
||||
0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */
|
||||
0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
|
||||
0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>;
|
||||
0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
|
||||
0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
device_type = "pci";
|
||||
|
@ -145,20 +145,20 @@ pcie@4,0 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@9,0 {
|
||||
pcie@5,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
|
||||
reg = <0x4800 0 0 0 0>;
|
||||
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x9 0 1 0>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x5 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 99>;
|
||||
marvell,pcie-port = <2>;
|
||||
interrupt-map = <0 0 0 0 &mpic 62>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 26>;
|
||||
clocks = <&gateclk 9>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -48,7 +48,7 @@ soc {
|
|||
/*
|
||||
* MV78260 has 3 PCIe units Gen2.0: Two units can be
|
||||
* configured as x4 or quad x1 lanes. One unit is
|
||||
* x4/x1.
|
||||
* x4 only.
|
||||
*/
|
||||
pcie-controller {
|
||||
compatible = "marvell,armada-xp-pcie";
|
||||
|
@ -68,7 +68,9 @@ pcie-controller {
|
|||
0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
|
||||
0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
|
||||
0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
|
||||
0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */
|
||||
0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
|
||||
0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
|
||||
0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
|
||||
0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
|
||||
0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
|
||||
0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
|
||||
|
@ -77,10 +79,18 @@ pcie-controller {
|
|||
0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */
|
||||
0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
|
||||
0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */
|
||||
0x82000000 0x9 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
|
||||
0x81000000 0x9 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */
|
||||
0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
|
||||
0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>;
|
||||
|
||||
0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
|
||||
0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */
|
||||
0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */
|
||||
0x81000000 0x6 0 MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO */
|
||||
0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */
|
||||
0x81000000 0x7 0 MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO */
|
||||
0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */
|
||||
0x81000000 0x8 0 MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO */
|
||||
|
||||
0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
|
||||
0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
device_type = "pci";
|
||||
|
@ -106,8 +116,8 @@ pcie@2,0 {
|
|||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x2 0 1 0>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x2 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 59>;
|
||||
marvell,pcie-port = <0>;
|
||||
|
@ -150,6 +160,74 @@ pcie@4,0 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@5,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x5 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 62>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 9>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@6,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
|
||||
reg = <0x3000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x6 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 63>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <1>;
|
||||
clocks = <&gateclk 10>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@7,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
|
||||
reg = <0x3800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x7 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 64>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <2>;
|
||||
clocks = <&gateclk 11>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@8,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
|
||||
reg = <0x4000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x8 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 65>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <3>;
|
||||
clocks = <&gateclk 12>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@9,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
|
||||
|
@ -166,23 +244,6 @@ pcie@9,0 {
|
|||
clocks = <&gateclk 26>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@10,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x82000 0 0x2000>;
|
||||
reg = <0x5000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
|
||||
0x81000000 0 0 0x81000000 0xa 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 103>;
|
||||
marvell,pcie-port = <3>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 27>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
|
|
@ -11,6 +11,10 @@
|
|||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
serial4 = &usart3;
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
|
|
|
@ -44,8 +44,8 @@ ethernet@gpmc {
|
|||
gpmc,wr-access-ns = <186>;
|
||||
gpmc,cycle2cycle-samecsen;
|
||||
gpmc,cycle2cycle-diffcsen;
|
||||
vmmc-supply = <&vddvario>;
|
||||
vmmc_aux-supply = <&vdd33a>;
|
||||
vddvario-supply = <&vddvario>;
|
||||
vdd33a-supply = <&vdd33a>;
|
||||
reg-io-width = <4>;
|
||||
smsc,save-mac-address;
|
||||
};
|
||||
|
|
|
@ -215,3 +215,10 @@ &usbhshost {
|
|||
&usbhsehci {
|
||||
phys = <0 &hsusb2_phy>;
|
||||
};
|
||||
|
||||
&vaux2 {
|
||||
regulator-name = "usb_1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
@ -61,6 +61,14 @@ hsusb2_phy: hsusb2_phy {
|
|||
vcc-supply = <&hsusb2_power>;
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "ti,omap-twl4030";
|
||||
ti,model = "omap3beagle";
|
||||
|
||||
ti,mcbsp = <&mcbsp2>;
|
||||
ti,codec = <&twl_audio>;
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
|
@ -120,6 +128,12 @@ twl: twl@48 {
|
|||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
codec {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -178,3 +192,10 @@ &usb_otg_hs {
|
|||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
||||
&vaux2 {
|
||||
regulator-name = "vdd_ehci";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Device Tree Source for IGEP Technology devices
|
||||
* Common device tree for IGEP boards based on AM/DM37x
|
||||
*
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
|
||||
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
|
@ -10,7 +10,7 @@
|
|||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap34xx.dtsi"
|
||||
#include "omap36xx.dtsi"
|
||||
|
||||
/ {
|
||||
memory {
|
||||
|
@ -24,6 +24,25 @@ sound {
|
|||
ti,mcbsp = <&mcbsp2>;
|
||||
ti,codec = <&twl_audio>;
|
||||
};
|
||||
|
||||
vdd33: regulator-vdd33 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd33";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
lbee1usjyc_vmmc: lbee1usjyc_vmmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lbee1usjyc_pins>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "regulator-lbee1usjyc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 WIFI_PDN */
|
||||
startup-delay-us = <10000>;
|
||||
enable-active-high;
|
||||
vin-supply = <&vdd33>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
@ -48,6 +67,15 @@ uart3_pins: pinmux_uart3_pins {
|
|||
>;
|
||||
};
|
||||
|
||||
/* WiFi/BT combo */
|
||||
lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x136 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 */
|
||||
0x138 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 */
|
||||
0x13a (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
|
||||
|
@ -65,10 +93,17 @@ mmc1_pins: pinmux_mmc1_pins {
|
|||
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
0x120 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
|
||||
0x122 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
|
||||
0x124 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
|
||||
0x126 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -78,10 +113,33 @@ smsc911x_pins: pinmux_smsc911x_pins {
|
|||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18e (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
|
||||
0x190 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
|
||||
0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
leds_pins: pinmux_leds_pins { };
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
twl: twl@48 {
|
||||
|
@ -101,9 +159,16 @@ codec {
|
|||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
};
|
||||
|
||||
&mcbsp2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp2_pins>;
|
||||
|
@ -114,11 +179,15 @@ &mmc1 {
|
|||
pinctrl-0 = <&mmc1_pins>;
|
||||
vmmc-supply = <&vmmc1>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
bus-width = <8>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
vmmc-supply = <&lbee1usjyc_vmmc>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Device Tree Source for IGEPv2 board
|
||||
* Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x)
|
||||
*
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
|
||||
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
|
@ -13,7 +13,7 @@
|
|||
#include "omap-gpmc-smsc911x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "IGEPv2";
|
||||
model = "IGEPv2 (TI OMAP AM/DM37x)";
|
||||
compatible = "isee,omap3-igep0020", "ti,omap3";
|
||||
|
||||
leds {
|
||||
|
@ -67,6 +67,8 @@ &omap3_pmx_core {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&hsusbb1_pins
|
||||
&tfp410_pins
|
||||
&dss_pins
|
||||
>;
|
||||
|
||||
hsusbb1_pins: pinmux_hsusbb1_pins {
|
||||
|
@ -85,6 +87,45 @@ hsusbb1_pins: pinmux_hsusbb1_pins {
|
|||
0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
|
||||
>;
|
||||
};
|
||||
|
||||
tfp410_pins: tfp410_dvi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_pins: pinmux_dss_dvi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
|
||||
0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
|
||||
0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
|
||||
0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
|
||||
0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
|
||||
0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
|
||||
0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
|
||||
0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
|
||||
0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
|
||||
0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
|
||||
0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
|
||||
0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
|
||||
0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
|
||||
0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
|
||||
0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
|
||||
0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
|
||||
0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
|
||||
0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
|
||||
0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
|
||||
0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
|
||||
0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
|
||||
0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
|
||||
0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
|
||||
0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
|
||||
0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
|
||||
0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
|
||||
0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&leds_pins {
|
||||
|
@ -174,3 +215,8 @@ &usbhshost {
|
|||
&usbhsehci {
|
||||
phys = <&hsusb1_phy>;
|
||||
};
|
||||
|
||||
&vpll2 {
|
||||
/* Needed for DSS */
|
||||
regulator-name = "vdds_dsi";
|
||||
};
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Device Tree Source for IGEP COM Module
|
||||
* Device Tree Source for IGEP COM MODULE (TI OMAP AM/DM37x)
|
||||
*
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
|
||||
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
|
@ -12,7 +12,7 @@
|
|||
#include "omap3-igep.dtsi"
|
||||
|
||||
/ {
|
||||
model = "IGEP COM Module";
|
||||
model = "IGEP COM MODULE (TI OMAP AM/DM37x)";
|
||||
compatible = "isee,omap3-igep0030", "ti,omap3";
|
||||
|
||||
leds {
|
||||
|
|
|
@ -125,6 +125,21 @@ mmc1_pins: pinmux_mmc1_pins {
|
|||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
|
||||
0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
|
||||
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
|
||||
0x136 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
|
||||
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
|
||||
0x13a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
display_pins: pinmux_display_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
|
||||
|
@ -358,8 +373,14 @@ &mmc1 {
|
|||
cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
|
||||
};
|
||||
|
||||
/* most boards use vaux3, only some old versions use vmmc2 instead */
|
||||
&mmc2 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
vmmc-supply = <&vaux3>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
|
|
|
@ -82,6 +82,13 @@ ocp {
|
|||
ranges;
|
||||
ti,hwmods = "l3_main";
|
||||
|
||||
aes: aes@480c5000 {
|
||||
compatible = "ti,omap3-aes";
|
||||
ti,hwmods = "aes";
|
||||
reg = <0x480c5000 0x50>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
counter32k: counter@48320000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x48320000 0x20>;
|
||||
|
@ -260,6 +267,13 @@ i2c3: i2c@48060000 {
|
|||
ti,hwmods = "i2c3";
|
||||
};
|
||||
|
||||
mailbox: mailbox@48094000 {
|
||||
compatible = "ti,omap3-mailbox";
|
||||
ti,hwmods = "mailbox";
|
||||
reg = <0x48094000 0x200>;
|
||||
interrupts = <26>;
|
||||
};
|
||||
|
||||
mcspi1: spi@48098000 {
|
||||
compatible = "ti,omap2-mcspi";
|
||||
reg = <0x48098000 0x100>;
|
||||
|
@ -357,6 +371,13 @@ mmc3: mmc@480ad000 {
|
|||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
mmu_isp: mmu@480bd400 {
|
||||
compatible = "ti,omap3-mmu-isp";
|
||||
ti,hwmods = "mmu_isp";
|
||||
reg = <0x480bd400 0x80>;
|
||||
interrupts = <8>;
|
||||
};
|
||||
|
||||
wdt2: wdt@48314000 {
|
||||
compatible = "ti,omap3-wdt";
|
||||
reg = <0x48314000 0x80>;
|
||||
|
@ -442,6 +463,27 @@ mcbsp5: mcbsp@48096000 {
|
|||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
sham: sham@480c3000 {
|
||||
compatible = "ti,omap3-sham";
|
||||
ti,hwmods = "sham";
|
||||
reg = <0x480c3000 0x64>;
|
||||
interrupts = <49>;
|
||||
};
|
||||
|
||||
smartreflex_core: smartreflex@480cb000 {
|
||||
compatible = "ti,omap3-smartreflex-core";
|
||||
ti,hwmods = "smartreflex_core";
|
||||
reg = <0x480cb000 0x400>;
|
||||
interrupts = <19>;
|
||||
};
|
||||
|
||||
smartreflex_mpu_iva: smartreflex@480c9000 {
|
||||
compatible = "ti,omap3-smartreflex-iva";
|
||||
ti,hwmods = "smartreflex_mpu_iva";
|
||||
reg = <0x480c9000 0x400>;
|
||||
interrupts = <18>;
|
||||
};
|
||||
|
||||
timer1: timer@48318000 {
|
||||
compatible = "ti,omap3430-timer";
|
||||
reg = <0x48318000 0x400>;
|
||||
|
|
|
@ -246,15 +246,6 @@ i2c4_pins: pinmux_i2c4_pins {
|
|||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap4_pmx_wkup {
|
||||
led_wkgpio_pins: pinmux_leds_wkpins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
|
||||
0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
|
||||
>;
|
||||
};
|
||||
|
||||
/*
|
||||
* wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
|
||||
|
@ -274,7 +265,7 @@ wl12xx_pins: pinmux_wl12xx_pins {
|
|||
pinctrl-single,pins = <
|
||||
0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
|
||||
0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
0x108 (PIN_OUTPUT | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||
0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||
0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
|
||||
0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
|
||||
0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
|
||||
|
@ -284,6 +275,15 @@ wl12xx_pins: pinmux_wl12xx_pins {
|
|||
};
|
||||
};
|
||||
|
||||
&omap4_pmx_wkup {
|
||||
led_wkgpio_pins: pinmux_leds_wkpins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
|
||||
0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
|
|
@ -300,12 +300,12 @@ wl12xx_gpio: pinmux_wl12xx_gpio {
|
|||
wl12xx_pins: pinmux_wl12xx_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
0x108 (PIN_OUTPUT | MUX_MODE3) /* sdmmc5_clk.sdmmc5_clk */
|
||||
0x10a (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_cmd.sdmmc5_cmd */
|
||||
0x10c (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat0.sdmmc5_dat0 */
|
||||
0x10e (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat1.sdmmc5_dat1 */
|
||||
0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat2.sdmmc5_dat2 */
|
||||
0x112 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||
0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||
0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
|
||||
0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
|
||||
0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
|
||||
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
|
||||
0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -245,14 +245,14 @@ h2f_usr2_clk: h2f_usr2_clk {
|
|||
|
||||
mpu_periph_clk: mpu_periph_clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "altr,socfpga-gate-clk";
|
||||
compatible = "altr,socfpga-perip-clk";
|
||||
clocks = <&mpuclk>;
|
||||
fixed-divider = <4>;
|
||||
};
|
||||
|
||||
mpu_l2_ram_clk: mpu_l2_ram_clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "altr,socfpga-gate-clk";
|
||||
compatible = "altr,socfpga-perip-clk";
|
||||
clocks = <&mpuclk>;
|
||||
fixed-divider = <2>;
|
||||
};
|
||||
|
@ -266,8 +266,9 @@ l4_main_clk: l4_main_clk {
|
|||
|
||||
l3_main_clk: l3_main_clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "altr,socfpga-gate-clk";
|
||||
compatible = "altr,socfpga-perip-clk";
|
||||
clocks = <&mainclk>;
|
||||
fixed-divider = <1>;
|
||||
};
|
||||
|
||||
l3_mp_clk: l3_mp_clk {
|
||||
|
|
|
@ -69,6 +69,7 @@ CONFIG_KS8851=y
|
|||
CONFIG_SMSC911X=y
|
||||
CONFIG_STMMAC_ETH=y
|
||||
CONFIG_MDIO_SUN4I=y
|
||||
CONFIG_TI_CPSW=y
|
||||
CONFIG_KEYBOARD_SPEAR=y
|
||||
CONFIG_SERIO_AMBAKMI=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
|
@ -133,12 +134,14 @@ CONFIG_USB_GPIO_VBUS=y
|
|||
CONFIG_USB_ISP1301=y
|
||||
CONFIG_USB_MXS_PHY=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK_MINORS=16
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||
CONFIG_MMC_SDHCI_TEGRA=y
|
||||
CONFIG_MMC_SDHCI_SPEAR=y
|
||||
CONFIG_MMC_SDHCI_BCM_KONA=y
|
||||
CONFIG_MMC_OMAP=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_EDAC=y
|
||||
|
|
|
@ -173,6 +173,7 @@ CONFIG_MFD_PALMAS=y
|
|||
CONFIG_MFD_TPS65217=y
|
||||
CONFIG_MFD_TPS65910=y
|
||||
CONFIG_TWL6040_CORE=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_PALMAS=y
|
||||
CONFIG_REGULATOR_TPS65023=y
|
||||
CONFIG_REGULATOR_TPS6507X=y
|
||||
|
|
|
@ -12,6 +12,9 @@ CONFIG_NET=y
|
|||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
|
@ -58,4 +61,8 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
|||
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
||||
CONFIG_COMMON_CLK_DEBUG=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
|
|
|
@ -22,6 +22,7 @@ CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8"
|
|||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_ARM_U8500_CPUIDLE=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_PM_RUNTIME=y
|
||||
|
@ -109,6 +110,8 @@ CONFIG_EXT2_FS_SECURITY=y
|
|||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
|
|
|
@ -61,7 +61,7 @@ extern void __pgd_error(const char *file, int line, pgd_t);
|
|||
* mapping to be mapped at. This is particularly important for
|
||||
* non-high vector CPUs.
|
||||
*/
|
||||
#define FIRST_USER_ADDRESS PAGE_SIZE
|
||||
#define FIRST_USER_ADDRESS (PAGE_SIZE * 2)
|
||||
|
||||
/*
|
||||
* Use TASK_SIZE as the ceiling argument for free_pgtables() and
|
||||
|
|
|
@ -14,11 +14,12 @@
|
|||
#include <asm/pgalloc.h>
|
||||
#include <asm/mmu_context.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/fncpy.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/smp_plat.h>
|
||||
#include <asm/system_misc.h>
|
||||
|
||||
extern const unsigned char relocate_new_kernel[];
|
||||
extern void relocate_new_kernel(void);
|
||||
extern const unsigned int relocate_new_kernel_size;
|
||||
|
||||
extern unsigned long kexec_start_address;
|
||||
|
@ -142,6 +143,8 @@ void machine_kexec(struct kimage *image)
|
|||
{
|
||||
unsigned long page_list;
|
||||
unsigned long reboot_code_buffer_phys;
|
||||
unsigned long reboot_entry = (unsigned long)relocate_new_kernel;
|
||||
unsigned long reboot_entry_phys;
|
||||
void *reboot_code_buffer;
|
||||
|
||||
/*
|
||||
|
@ -168,16 +171,16 @@ void machine_kexec(struct kimage *image)
|
|||
|
||||
|
||||
/* copy our kernel relocation code to the control code page */
|
||||
memcpy(reboot_code_buffer,
|
||||
relocate_new_kernel, relocate_new_kernel_size);
|
||||
reboot_entry = fncpy(reboot_code_buffer,
|
||||
reboot_entry,
|
||||
relocate_new_kernel_size);
|
||||
reboot_entry_phys = (unsigned long)reboot_entry +
|
||||
(reboot_code_buffer_phys - (unsigned long)reboot_code_buffer);
|
||||
|
||||
|
||||
flush_icache_range((unsigned long) reboot_code_buffer,
|
||||
(unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
|
||||
printk(KERN_INFO "Bye!\n");
|
||||
|
||||
if (kexec_reinit)
|
||||
kexec_reinit();
|
||||
|
||||
soft_restart(reboot_code_buffer_phys);
|
||||
soft_restart(reboot_entry_phys);
|
||||
}
|
||||
|
|
|
@ -2,10 +2,12 @@
|
|||
* relocate_kernel.S - put the kernel image in place to boot
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/kexec.h>
|
||||
|
||||
.globl relocate_new_kernel
|
||||
relocate_new_kernel:
|
||||
.align 3 /* not needed for this code, but keeps fncpy() happy */
|
||||
|
||||
ENTRY(relocate_new_kernel)
|
||||
|
||||
ldr r0,kexec_indirection_page
|
||||
ldr r1,kexec_start_address
|
||||
|
@ -79,6 +81,8 @@ kexec_mach_type:
|
|||
kexec_boot_atags:
|
||||
.long 0x0
|
||||
|
||||
ENDPROC(relocate_new_kernel)
|
||||
|
||||
relocate_new_kernel_end:
|
||||
|
||||
.globl relocate_new_kernel_size
|
||||
|
|
|
@ -30,6 +30,27 @@
|
|||
* snippets.
|
||||
*/
|
||||
|
||||
/*
|
||||
* In CPU_THUMBONLY case kernel arm opcodes are not allowed.
|
||||
* Note in this case codes skips those instructions but it uses .org
|
||||
* directive to keep correct layout of sigreturn_codes array.
|
||||
*/
|
||||
#ifndef CONFIG_CPU_THUMBONLY
|
||||
#define ARM_OK(code...) code
|
||||
#else
|
||||
#define ARM_OK(code...)
|
||||
#endif
|
||||
|
||||
.macro arm_slot n
|
||||
.org sigreturn_codes + 12 * (\n)
|
||||
ARM_OK( .arm )
|
||||
.endm
|
||||
|
||||
.macro thumb_slot n
|
||||
.org sigreturn_codes + 12 * (\n) + 8
|
||||
.thumb
|
||||
.endm
|
||||
|
||||
#if __LINUX_ARM_ARCH__ <= 4
|
||||
/*
|
||||
* Note we manually set minimally required arch that supports
|
||||
|
@ -45,26 +66,27 @@
|
|||
.global sigreturn_codes
|
||||
.type sigreturn_codes, #object
|
||||
|
||||
.arm
|
||||
.align
|
||||
|
||||
sigreturn_codes:
|
||||
|
||||
/* ARM sigreturn syscall code snippet */
|
||||
mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
|
||||
swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)
|
||||
arm_slot 0
|
||||
ARM_OK( mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) )
|
||||
ARM_OK( swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
|
||||
|
||||
/* Thumb sigreturn syscall code snippet */
|
||||
.thumb
|
||||
thumb_slot 0
|
||||
movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
|
||||
swi #0
|
||||
|
||||
/* ARM sigreturn_rt syscall code snippet */
|
||||
.arm
|
||||
mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
|
||||
swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)
|
||||
arm_slot 1
|
||||
ARM_OK( mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) )
|
||||
ARM_OK( swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
|
||||
|
||||
/* Thumb sigreturn_rt syscall code snippet */
|
||||
.thumb
|
||||
thumb_slot 1
|
||||
movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
|
||||
swi #0
|
||||
|
||||
|
@ -74,7 +96,7 @@ sigreturn_codes:
|
|||
* it is thumb case or not, so we need additional
|
||||
* word after real last entry.
|
||||
*/
|
||||
.arm
|
||||
arm_slot 2
|
||||
.space 4
|
||||
|
||||
.size sigreturn_codes, . - sigreturn_codes
|
||||
|
|
|
@ -40,6 +40,7 @@ ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0x7fffff06
|
|||
/*
|
||||
* loops = r0 * HZ * loops_per_jiffy / 1000000
|
||||
*/
|
||||
.align 3
|
||||
|
||||
@ Delay routine
|
||||
ENTRY(__loop_delay)
|
||||
|
|
|
@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
|
|||
static struct clock_event_device clkevt = {
|
||||
.name = "at91_tick",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
.shift = 32,
|
||||
.rating = 150,
|
||||
.set_next_event = clkevt32k_next_event,
|
||||
.set_mode = clkevt32k_mode,
|
||||
|
@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
|
|||
at91_st_write(AT91_ST_RTMR, 1);
|
||||
|
||||
/* Setup timer clockevent, with minimum of two ticks (important!!) */
|
||||
clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
|
||||
clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
|
||||
clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
|
||||
clkevt.cpumask = cpumask_of(0);
|
||||
clockevents_register_device(&clkevt);
|
||||
clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
|
||||
2, AT91_ST_ALMV);
|
||||
|
||||
/* register clocksource */
|
||||
clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
|
||||
|
|
|
@ -16,7 +16,11 @@
|
|||
#include <mach/at91_ramc.h>
|
||||
#include <mach/at91rm9200_sdramc.h>
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern void at91_pm_set_standby(void (*at91_standby)(void));
|
||||
#else
|
||||
static inline void at91_pm_set_standby(void (*at91_standby)(void)) { }
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The AT91RM9200 goes into self-refresh mode with this command, and will
|
||||
|
|
|
@ -95,19 +95,19 @@ static struct clk twi0_clk = {
|
|||
.name = "twi0_clk",
|
||||
.pid = SAMA5D3_ID_TWI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
.div = AT91_PMC_PCR_DIV2,
|
||||
.div = AT91_PMC_PCR_DIV8,
|
||||
};
|
||||
static struct clk twi1_clk = {
|
||||
.name = "twi1_clk",
|
||||
.pid = SAMA5D3_ID_TWI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
.div = AT91_PMC_PCR_DIV2,
|
||||
.div = AT91_PMC_PCR_DIV8,
|
||||
};
|
||||
static struct clk twi2_clk = {
|
||||
.name = "twi2_clk",
|
||||
.pid = SAMA5D3_ID_TWI2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
.div = AT91_PMC_PCR_DIV2,
|
||||
.div = AT91_PMC_PCR_DIV8,
|
||||
};
|
||||
static struct clk mmc0_clk = {
|
||||
.name = "mci0_clk",
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <video/vga.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
|
@ -196,6 +197,8 @@ void __init footbridge_map_io(void)
|
|||
iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
|
||||
pci_map_io_early(__phys_to_pfn(DC21285_PCI_IO));
|
||||
}
|
||||
|
||||
vga_base = PCIMEM_BASE;
|
||||
}
|
||||
|
||||
void footbridge_restart(enum reboot_mode mode, const char *cmd)
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <video/vga.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/pci.h>
|
||||
|
@ -291,7 +290,6 @@ void __init dc21285_preinit(void)
|
|||
int cfn_mode;
|
||||
|
||||
pcibios_min_mem = 0x81000000;
|
||||
vga_base = PCIMEM_BASE;
|
||||
|
||||
mem_size = (unsigned int)high_memory - PAGE_OFFSET;
|
||||
for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1)
|
||||
|
|
|
@ -30,21 +30,24 @@ static const struct {
|
|||
const char *name;
|
||||
const char *trigger;
|
||||
} ebsa285_leds[] = {
|
||||
{ "ebsa285:amber", "heartbeat", },
|
||||
{ "ebsa285:green", "cpu0", },
|
||||
{ "ebsa285:amber", "cpu0", },
|
||||
{ "ebsa285:green", "heartbeat", },
|
||||
{ "ebsa285:red",},
|
||||
};
|
||||
|
||||
static unsigned char hw_led_state;
|
||||
|
||||
static void ebsa285_led_set(struct led_classdev *cdev,
|
||||
enum led_brightness b)
|
||||
{
|
||||
struct ebsa285_led *led = container_of(cdev,
|
||||
struct ebsa285_led, cdev);
|
||||
|
||||
if (b != LED_OFF)
|
||||
*XBUS_LEDS |= led->mask;
|
||||
if (b == LED_OFF)
|
||||
hw_led_state |= led->mask;
|
||||
else
|
||||
*XBUS_LEDS &= ~led->mask;
|
||||
hw_led_state &= ~led->mask;
|
||||
*XBUS_LEDS = hw_led_state;
|
||||
}
|
||||
|
||||
static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
|
||||
|
@ -52,18 +55,19 @@ static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
|
|||
struct ebsa285_led *led = container_of(cdev,
|
||||
struct ebsa285_led, cdev);
|
||||
|
||||
return (*XBUS_LEDS & led->mask) ? LED_FULL : LED_OFF;
|
||||
return hw_led_state & led->mask ? LED_OFF : LED_FULL;
|
||||
}
|
||||
|
||||
static int __init ebsa285_leds_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (machine_is_ebsa285())
|
||||
if (!machine_is_ebsa285())
|
||||
return -ENODEV;
|
||||
|
||||
/* 3 LEDS All ON */
|
||||
*XBUS_LEDS |= XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED;
|
||||
/* 3 LEDS all off */
|
||||
hw_led_state = XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED;
|
||||
*XBUS_LEDS = hw_led_state;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ebsa285_leds); i++) {
|
||||
struct ebsa285_led *led;
|
||||
|
|
|
@ -223,7 +223,7 @@ void __init omap_4430sdp_display_init_of(void)
|
|||
static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = {
|
||||
.name = "dvi",
|
||||
.source = "tfp410.0",
|
||||
.i2c_bus_num = 3,
|
||||
.i2c_bus_num = 2,
|
||||
};
|
||||
|
||||
static struct platform_device omap3_igep2_dvi_connector_device = {
|
||||
|
|
|
@ -139,6 +139,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
|
||||
static struct pdata_init pdata_quirks[] __initdata = {
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
{ "nokia,omap3-n900", hsmmc2_internal_input_clk, },
|
||||
{ "nokia,omap3-n9", hsmmc2_internal_input_clk, },
|
||||
{ "nokia,omap3-n950", hsmmc2_internal_input_clk, },
|
||||
{ "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
|
||||
|
|
|
@ -128,7 +128,8 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
|
|||
for (i = 0; i < pwrdm->banks; i++)
|
||||
pwrdm->ret_mem_off_counter[i] = 0;
|
||||
|
||||
arch_pwrdm->pwrdm_wait_transition(pwrdm);
|
||||
if (arch_pwrdm && arch_pwrdm->pwrdm_wait_transition)
|
||||
arch_pwrdm->pwrdm_wait_transition(pwrdm);
|
||||
pwrdm->state = pwrdm_read_pwrst(pwrdm);
|
||||
pwrdm->state_counter[pwrdm->state] = 1;
|
||||
|
||||
|
|
|
@ -10,6 +10,7 @@ config ARCH_SOCFPGA
|
|||
select GENERIC_CLOCKEVENTS
|
||||
select GPIO_PL061 if GPIOLIB
|
||||
select HAVE_ARM_SCU
|
||||
select HAVE_ARM_TWD if SMP
|
||||
select HAVE_SMP
|
||||
select MFD_SYSCON
|
||||
select SPARSE_IRQ
|
||||
|
|
|
@ -140,6 +140,10 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
|
|||
/* Requires call-back bindings. */
|
||||
OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
|
||||
/* Requires DMA bindings. */
|
||||
OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
|
||||
OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data),
|
||||
OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data),
|
||||
OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
|
||||
"ux500-msp-i2s.0", &msp0_platform_data),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
|
||||
|
|
|
@ -9,6 +9,7 @@
|
|||
*
|
||||
* DMA uncached mapping support.
|
||||
*/
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/gfp.h>
|
||||
|
@ -162,6 +163,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
|
|||
u64 mask = (u64)DMA_BIT_MASK(32);
|
||||
|
||||
if (dev) {
|
||||
unsigned long max_dma_pfn;
|
||||
|
||||
mask = dev->coherent_dma_mask;
|
||||
|
||||
/*
|
||||
|
@ -173,6 +176,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
|
||||
|
||||
/*
|
||||
* If the mask allows for more memory than we can address,
|
||||
* and we actually have that much memory, then fail the
|
||||
|
@ -180,7 +185,7 @@ static u64 get_coherent_dma_mask(struct device *dev)
|
|||
*/
|
||||
if (sizeof(mask) != sizeof(dma_addr_t) &&
|
||||
mask > (dma_addr_t)~0 &&
|
||||
dma_to_pfn(dev, ~0) > arm_dma_pfn_limit) {
|
||||
dma_to_pfn(dev, ~0) > max_dma_pfn) {
|
||||
dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
|
||||
mask);
|
||||
dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
|
||||
|
@ -192,7 +197,7 @@ static u64 get_coherent_dma_mask(struct device *dev)
|
|||
* fits within the allowable addresses which we can
|
||||
* allocate.
|
||||
*/
|
||||
if (dma_to_pfn(dev, mask) < arm_dma_pfn_limit) {
|
||||
if (dma_to_pfn(dev, mask) < max_dma_pfn) {
|
||||
dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
|
||||
mask,
|
||||
dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
|
||||
|
|
|
@ -146,7 +146,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
|
|||
|
||||
info.flags = VM_UNMAPPED_AREA_TOPDOWN;
|
||||
info.length = len;
|
||||
info.low_limit = PAGE_SIZE;
|
||||
info.low_limit = FIRST_USER_ADDRESS;
|
||||
info.high_limit = mm->mmap_base;
|
||||
info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
|
||||
info.align_offset = pgoff << PAGE_SHIFT;
|
||||
|
|
|
@ -87,7 +87,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
|
|||
init_pud = pud_offset(init_pgd, 0);
|
||||
init_pmd = pmd_offset(init_pud, 0);
|
||||
init_pte = pte_offset_map(init_pmd, 0);
|
||||
set_pte_ext(new_pte, *init_pte, 0);
|
||||
set_pte_ext(new_pte + 0, init_pte[0], 0);
|
||||
set_pte_ext(new_pte + 1, init_pte[1], 0);
|
||||
pte_unmap(init_pte);
|
||||
pte_unmap(new_pte);
|
||||
}
|
||||
|
|
|
@ -336,8 +336,11 @@ static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
|
|||
if (timer->posted)
|
||||
return;
|
||||
|
||||
if (timer->errata & OMAP_TIMER_ERRATA_I103_I767)
|
||||
if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) {
|
||||
timer->posted = OMAP_TIMER_NONPOSTED;
|
||||
__omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
__omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
|
||||
OMAP_TIMER_CTRL_POSTED, 0);
|
||||
|
|
|
@ -25,8 +25,9 @@ struct xen_p2m_entry {
|
|||
struct rb_node rbnode_phys;
|
||||
};
|
||||
|
||||
rwlock_t p2m_lock;
|
||||
static rwlock_t p2m_lock;
|
||||
struct rb_root phys_to_mach = RB_ROOT;
|
||||
EXPORT_SYMBOL_GPL(phys_to_mach);
|
||||
static struct rb_root mach_to_phys = RB_ROOT;
|
||||
|
||||
static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new)
|
||||
|
@ -200,7 +201,7 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(__set_phys_to_machine);
|
||||
|
||||
int p2m_init(void)
|
||||
static int p2m_init(void)
|
||||
{
|
||||
rwlock_init(&p2m_lock);
|
||||
return 0;
|
||||
|
|
|
@ -50,7 +50,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
|
|||
CONFIG_IDE=y
|
||||
CONFIG_BLK_DEV_IDECD=y
|
||||
CONFIG_BLK_DEV_NS87415=y
|
||||
CONFIG_BLK_DEV_SIIMAGE=m
|
||||
CONFIG_PATA_SIL680=m
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_ST=y
|
||||
|
|
|
@ -20,7 +20,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
|
|||
CONFIG_MODVERSIONS=y
|
||||
CONFIG_BLK_DEV_INTEGRITY=y
|
||||
CONFIG_PA8X00=y
|
||||
CONFIG_MLONGCALLS=y
|
||||
CONFIG_64BIT=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_PREEMPT=y
|
||||
|
@ -81,8 +80,6 @@ CONFIG_IDE=y
|
|||
CONFIG_BLK_DEV_IDECD=y
|
||||
CONFIG_BLK_DEV_PLATFORM=y
|
||||
CONFIG_BLK_DEV_GENERIC=y
|
||||
CONFIG_BLK_DEV_SIIMAGE=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_ST=m
|
||||
CONFIG_BLK_DEV_SR=m
|
||||
|
@ -94,6 +91,8 @@ CONFIG_SCSI_FC_ATTRS=y
|
|||
CONFIG_SCSI_SAS_LIBSAS=m
|
||||
CONFIG_ISCSI_TCP=m
|
||||
CONFIG_ISCSI_BOOT_SYSFS=m
|
||||
CONFIG_ATA=y
|
||||
CONFIG_PATA_SIL680=y
|
||||
CONFIG_FUSION=y
|
||||
CONFIG_FUSION_SPI=y
|
||||
CONFIG_FUSION_SAS=y
|
||||
|
@ -114,9 +113,8 @@ CONFIG_INPUT_FF_MEMLESS=m
|
|||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
# CONFIG_KEYBOARD_HIL_OLD is not set
|
||||
# CONFIG_KEYBOARD_HIL is not set
|
||||
CONFIG_MOUSE_PS2=m
|
||||
# CONFIG_MOUSE_PS2 is not set
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_CM109=m
|
||||
CONFIG_SERIO_SERPORT=m
|
||||
CONFIG_SERIO_PARKBD=m
|
||||
CONFIG_SERIO_GSCPS2=m
|
||||
|
@ -167,34 +165,6 @@ CONFIG_SND_VERBOSE_PRINTK=y
|
|||
CONFIG_SND_AD1889=m
|
||||
# CONFIG_SND_USB is not set
|
||||
# CONFIG_SND_GSC is not set
|
||||
CONFIG_HID_A4TECH=m
|
||||
CONFIG_HID_APPLE=m
|
||||
CONFIG_HID_BELKIN=m
|
||||
CONFIG_HID_CHERRY=m
|
||||
CONFIG_HID_CHICONY=m
|
||||
CONFIG_HID_CYPRESS=m
|
||||
CONFIG_HID_DRAGONRISE=m
|
||||
CONFIG_HID_EZKEY=m
|
||||
CONFIG_HID_KYE=m
|
||||
CONFIG_HID_GYRATION=m
|
||||
CONFIG_HID_TWINHAN=m
|
||||
CONFIG_HID_KENSINGTON=m
|
||||
CONFIG_HID_LOGITECH=m
|
||||
CONFIG_HID_LOGITECH_DJ=m
|
||||
CONFIG_HID_MICROSOFT=m
|
||||
CONFIG_HID_MONTEREY=m
|
||||
CONFIG_HID_NTRIG=m
|
||||
CONFIG_HID_ORTEK=m
|
||||
CONFIG_HID_PANTHERLORD=m
|
||||
CONFIG_HID_PETALYNX=m
|
||||
CONFIG_HID_SAMSUNG=m
|
||||
CONFIG_HID_SUNPLUS=m
|
||||
CONFIG_HID_GREENASIA=m
|
||||
CONFIG_HID_SMARTJOYPLUS=m
|
||||
CONFIG_HID_TOPSEED=m
|
||||
CONFIG_HID_THRUSTMASTER=m
|
||||
CONFIG_HID_ZEROPLUS=m
|
||||
CONFIG_USB_HID=m
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
|
|
|
@ -24,7 +24,6 @@ CONFIG_MODVERSIONS=y
|
|||
CONFIG_BLK_DEV_INTEGRITY=y
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_PA8X00=y
|
||||
CONFIG_MLONGCALLS=y
|
||||
CONFIG_64BIT=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
|
@ -68,7 +67,6 @@ CONFIG_IDE_GD=m
|
|||
CONFIG_IDE_GD_ATAPI=y
|
||||
CONFIG_BLK_DEV_IDECD=m
|
||||
CONFIG_BLK_DEV_NS87415=y
|
||||
CONFIG_BLK_DEV_SIIMAGE=y
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
|
@ -82,6 +80,7 @@ CONFIG_SCSI_ZALON=y
|
|||
CONFIG_SCSI_QLA_ISCSI=m
|
||||
CONFIG_SCSI_DH=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_PATA_SIL680=y
|
||||
CONFIG_ATA_GENERIC=y
|
||||
CONFIG_MD=y
|
||||
CONFIG_MD_LINEAR=m
|
||||
|
@ -162,7 +161,7 @@ CONFIG_SLIP_MODE_SLIP6=y
|
|||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_KEYBOARD_HIL_OLD is not set
|
||||
# CONFIG_KEYBOARD_HIL is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_MOUSE_PS2 is not set
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_SERIO_SERPORT=m
|
||||
# CONFIG_HP_SDC is not set
|
||||
|
@ -216,32 +215,7 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
|||
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
CONFIG_HID=m
|
||||
CONFIG_HIDRAW=y
|
||||
CONFIG_HID_DRAGONRISE=m
|
||||
CONFIG_DRAGONRISE_FF=y
|
||||
CONFIG_HID_KYE=m
|
||||
CONFIG_HID_GYRATION=m
|
||||
CONFIG_HID_TWINHAN=m
|
||||
CONFIG_LOGITECH_FF=y
|
||||
CONFIG_LOGIRUMBLEPAD2_FF=y
|
||||
CONFIG_HID_NTRIG=m
|
||||
CONFIG_HID_PANTHERLORD=m
|
||||
CONFIG_PANTHERLORD_FF=y
|
||||
CONFIG_HID_PETALYNX=m
|
||||
CONFIG_HID_SAMSUNG=m
|
||||
CONFIG_HID_SONY=m
|
||||
CONFIG_HID_SUNPLUS=m
|
||||
CONFIG_HID_GREENASIA=m
|
||||
CONFIG_GREENASIA_FF=y
|
||||
CONFIG_HID_SMARTJOYPLUS=m
|
||||
CONFIG_SMARTJOYPLUS_FF=y
|
||||
CONFIG_HID_TOPSEED=m
|
||||
CONFIG_HID_THRUSTMASTER=m
|
||||
CONFIG_THRUSTMASTER_FF=y
|
||||
CONFIG_HID_ZEROPLUS=m
|
||||
CONFIG_ZEROPLUS_FF=y
|
||||
CONFIG_USB_HID=m
|
||||
CONFIG_HID_PID=y
|
||||
CONFIG_USB_HIDDEV=y
|
||||
CONFIG_USB=y
|
||||
|
@ -251,13 +225,8 @@ CONFIG_USB_DYNAMIC_MINORS=y
|
|||
CONFIG_USB_MON=m
|
||||
CONFIG_USB_WUSB_CBAF=m
|
||||
CONFIG_USB_XHCI_HCD=m
|
||||
CONFIG_USB_EHCI_HCD=m
|
||||
CONFIG_USB_OHCI_HCD=m
|
||||
CONFIG_USB_R8A66597_HCD=m
|
||||
CONFIG_USB_ACM=m
|
||||
CONFIG_USB_PRINTER=m
|
||||
CONFIG_USB_WDM=m
|
||||
CONFIG_USB_TMC=m
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
|
|
|
@ -6,5 +6,3 @@
|
|||
* This is used for 16550-compatible UARTs
|
||||
*/
|
||||
#define BASE_BAUD ( 1843200 / 16 )
|
||||
|
||||
#define SERIAL_PORT_DFNS
|
||||
|
|
|
@ -36,6 +36,9 @@
|
|||
* HP PARISC Hardware Database
|
||||
* Access to this database is only possible during bootup
|
||||
* so don't reference this table after starting the init process
|
||||
*
|
||||
* NOTE: Product names which are listed here and ends with a '?'
|
||||
* are guessed. If you know the correct name, please let us know.
|
||||
*/
|
||||
|
||||
static struct hp_hardware hp_hardware_list[] = {
|
||||
|
@ -222,7 +225,7 @@ static struct hp_hardware hp_hardware_list[] = {
|
|||
{HPHW_NPROC,0x5DD,0x4,0x81,"Duet W2"},
|
||||
{HPHW_NPROC,0x5DE,0x4,0x81,"Piccolo W+"},
|
||||
{HPHW_NPROC,0x5DF,0x4,0x81,"Cantata W2"},
|
||||
{HPHW_NPROC,0x5DF,0x0,0x00,"Marcato W+? (rp5470)"},
|
||||
{HPHW_NPROC,0x5DF,0x0,0x00,"Marcato W+ (rp5470)?"},
|
||||
{HPHW_NPROC,0x5E0,0x4,0x91,"Cantata DC- W2"},
|
||||
{HPHW_NPROC,0x5E1,0x4,0x91,"Crescendo DC- W2"},
|
||||
{HPHW_NPROC,0x5E2,0x4,0x91,"Crescendo 650 W2"},
|
||||
|
@ -276,9 +279,11 @@ static struct hp_hardware hp_hardware_list[] = {
|
|||
{HPHW_NPROC,0x888,0x4,0x91,"Storm Peak Fast DC-"},
|
||||
{HPHW_NPROC,0x889,0x4,0x91,"Storm Peak Fast"},
|
||||
{HPHW_NPROC,0x88A,0x4,0x91,"Crestone Peak Slow"},
|
||||
{HPHW_NPROC,0x88B,0x4,0x91,"Crestone Peak Fast?"},
|
||||
{HPHW_NPROC,0x88C,0x4,0x91,"Orca Mako+"},
|
||||
{HPHW_NPROC,0x88D,0x4,0x91,"Rainier/Medel Mako+ Slow"},
|
||||
{HPHW_NPROC,0x88E,0x4,0x91,"Rainier/Medel Mako+ Fast"},
|
||||
{HPHW_NPROC,0x892,0x4,0x91,"Mt. Hamilton Slow Mako+?"},
|
||||
{HPHW_NPROC,0x894,0x4,0x91,"Mt. Hamilton Fast Mako+"},
|
||||
{HPHW_NPROC,0x895,0x4,0x91,"Storm Peak Slow Mako+"},
|
||||
{HPHW_NPROC,0x896,0x4,0x91,"Storm Peak Fast Mako+"},
|
||||
|
|
|
@ -41,9 +41,7 @@ END(boot_args)
|
|||
.import fault_vector_11,code /* IVA parisc 1.1 32 bit */
|
||||
.import $global$ /* forward declaration */
|
||||
#endif /*!CONFIG_64BIT*/
|
||||
.export _stext,data /* Kernel want it this way! */
|
||||
_stext:
|
||||
ENTRY(stext)
|
||||
ENTRY(parisc_kernel_start)
|
||||
.proc
|
||||
.callinfo
|
||||
|
||||
|
@ -347,7 +345,7 @@ smp_slave_stext:
|
|||
.procend
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
ENDPROC(stext)
|
||||
ENDPROC(parisc_kernel_start)
|
||||
|
||||
#ifndef CONFIG_64BIT
|
||||
.section .data..read_mostly
|
||||
|
|
|
@ -61,8 +61,15 @@ static int get_offset(struct address_space *mapping)
|
|||
return (unsigned long) mapping >> 8;
|
||||
}
|
||||
|
||||
static unsigned long get_shared_area(struct address_space *mapping,
|
||||
unsigned long addr, unsigned long len, unsigned long pgoff)
|
||||
static unsigned long shared_align_offset(struct file *filp, unsigned long pgoff)
|
||||
{
|
||||
struct address_space *mapping = filp ? filp->f_mapping : NULL;
|
||||
|
||||
return (get_offset(mapping) + pgoff) << PAGE_SHIFT;
|
||||
}
|
||||
|
||||
static unsigned long get_shared_area(struct file *filp, unsigned long addr,
|
||||
unsigned long len, unsigned long pgoff)
|
||||
{
|
||||
struct vm_unmapped_area_info info;
|
||||
|
||||
|
@ -71,7 +78,7 @@ static unsigned long get_shared_area(struct address_space *mapping,
|
|||
info.low_limit = PAGE_ALIGN(addr);
|
||||
info.high_limit = TASK_SIZE;
|
||||
info.align_mask = PAGE_MASK & (SHMLBA - 1);
|
||||
info.align_offset = (get_offset(mapping) + pgoff) << PAGE_SHIFT;
|
||||
info.align_offset = shared_align_offset(filp, pgoff);
|
||||
return vm_unmapped_area(&info);
|
||||
}
|
||||
|
||||
|
@ -82,20 +89,18 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
|
|||
return -ENOMEM;
|
||||
if (flags & MAP_FIXED) {
|
||||
if ((flags & MAP_SHARED) &&
|
||||
(addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
|
||||
(addr - shared_align_offset(filp, pgoff)) & (SHMLBA - 1))
|
||||
return -EINVAL;
|
||||
return addr;
|
||||
}
|
||||
if (!addr)
|
||||
addr = TASK_UNMAPPED_BASE;
|
||||
|
||||
if (filp) {
|
||||
addr = get_shared_area(filp->f_mapping, addr, len, pgoff);
|
||||
} else if(flags & MAP_SHARED) {
|
||||
addr = get_shared_area(NULL, addr, len, pgoff);
|
||||
} else {
|
||||
if (filp || (flags & MAP_SHARED))
|
||||
addr = get_shared_area(filp, addr, len, pgoff);
|
||||
else
|
||||
addr = get_unshared_area(addr, len);
|
||||
}
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
|
|
|
@ -168,7 +168,7 @@ void unwind_table_remove(struct unwind_table *table)
|
|||
}
|
||||
|
||||
/* Called from setup_arch to import the kernel unwind info */
|
||||
int unwind_init(void)
|
||||
int __init unwind_init(void)
|
||||
{
|
||||
long start, stop;
|
||||
register unsigned long gp __asm__ ("r27");
|
||||
|
@ -233,7 +233,6 @@ static void unwind_frame_regs(struct unwind_frame_info *info)
|
|||
e = find_unwind_entry(info->ip);
|
||||
if (e == NULL) {
|
||||
unsigned long sp;
|
||||
extern char _stext[], _etext[];
|
||||
|
||||
dbg("Cannot find unwind entry for 0x%lx; forced unwinding\n", info->ip);
|
||||
|
||||
|
@ -281,8 +280,7 @@ static void unwind_frame_regs(struct unwind_frame_info *info)
|
|||
break;
|
||||
info->prev_ip = tmp;
|
||||
sp = info->prev_sp;
|
||||
} while (info->prev_ip < (unsigned long)_stext ||
|
||||
info->prev_ip > (unsigned long)_etext);
|
||||
} while (!kernel_text_address(info->prev_ip));
|
||||
|
||||
info->rp = 0;
|
||||
|
||||
|
@ -435,9 +433,8 @@ unsigned long return_address(unsigned int level)
|
|||
do {
|
||||
if (unwind_once(&info) < 0 || info.ip == 0)
|
||||
return 0;
|
||||
if (!__kernel_text_address(info.ip)) {
|
||||
if (!kernel_text_address(info.ip))
|
||||
return 0;
|
||||
}
|
||||
} while (info.ip && level--);
|
||||
|
||||
return info.ip;
|
||||
|
|
|
@ -6,24 +6,19 @@
|
|||
* Copyright (C) 2000 Michael Ang <mang with subcarrier.org>
|
||||
* Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
|
||||
* Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org>
|
||||
* Copyright (C) 2006 Helge Deller <deller@gmx.de>
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
* Copyright (C) 2006-2013 Helge Deller <deller@gmx.de>
|
||||
*/
|
||||
|
||||
/*
|
||||
* Put page table entries (swapper_pg_dir) as the first thing in .bss. This
|
||||
* will ensure that it has .bss alignment (PAGE_SIZE).
|
||||
*/
|
||||
#define BSS_FIRST_SECTIONS *(.data..vm0.pmd) \
|
||||
*(.data..vm0.pgd) \
|
||||
*(.data..vm0.pte)
|
||||
|
||||
#include <asm-generic/vmlinux.lds.h>
|
||||
|
||||
/* needed for the processor specific cache alignment size */
|
||||
#include <asm/cache.h>
|
||||
#include <asm/page.h>
|
||||
|
@ -39,7 +34,7 @@ OUTPUT_FORMAT("elf64-hppa-linux")
|
|||
OUTPUT_ARCH(hppa:hppa2.0w)
|
||||
#endif
|
||||
|
||||
ENTRY(_stext)
|
||||
ENTRY(parisc_kernel_start)
|
||||
#ifndef CONFIG_64BIT
|
||||
jiffies = jiffies_64 + 4;
|
||||
#else
|
||||
|
@ -49,11 +44,29 @@ SECTIONS
|
|||
{
|
||||
. = KERNEL_BINARY_TEXT_START;
|
||||
|
||||
__init_begin = .;
|
||||
HEAD_TEXT_SECTION
|
||||
INIT_TEXT_SECTION(8)
|
||||
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
INIT_DATA_SECTION(PAGE_SIZE)
|
||||
/* we have to discard exit text and such at runtime, not link time */
|
||||
.exit.text :
|
||||
{
|
||||
EXIT_TEXT
|
||||
}
|
||||
.exit.data :
|
||||
{
|
||||
EXIT_DATA
|
||||
}
|
||||
PERCPU_SECTION(8)
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
__init_end = .;
|
||||
/* freed after init ends here */
|
||||
|
||||
_text = .; /* Text and read-only data */
|
||||
.head ALIGN(16) : {
|
||||
HEAD_TEXT
|
||||
} = 0
|
||||
.text ALIGN(16) : {
|
||||
_stext = .;
|
||||
.text ALIGN(PAGE_SIZE) : {
|
||||
TEXT_TEXT
|
||||
SCHED_TEXT
|
||||
LOCK_TEXT
|
||||
|
@ -68,13 +81,35 @@ SECTIONS
|
|||
*(.lock.text) /* out-of-line lock text */
|
||||
*(.gnu.warning)
|
||||
}
|
||||
/* End of text section */
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
_etext = .;
|
||||
/* End of text section */
|
||||
|
||||
/* Start of data section */
|
||||
_sdata = .;
|
||||
|
||||
RODATA
|
||||
RO_DATA_SECTION(8)
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
. = ALIGN(16);
|
||||
/* Linkage tables */
|
||||
.opd : {
|
||||
*(.opd)
|
||||
} PROVIDE (__gp = .);
|
||||
.plt : {
|
||||
*(.plt)
|
||||
}
|
||||
.dlt : {
|
||||
*(.dlt)
|
||||
}
|
||||
#endif
|
||||
|
||||
/* unwind info */
|
||||
.PARISC.unwind : {
|
||||
__start___unwind = .;
|
||||
*(.PARISC.unwind)
|
||||
__stop___unwind = .;
|
||||
}
|
||||
|
||||
/* writeable */
|
||||
/* Make sure this is page aligned so
|
||||
|
@ -84,14 +119,7 @@ SECTIONS
|
|||
. = ALIGN(PAGE_SIZE);
|
||||
data_start = .;
|
||||
|
||||
/* unwind info */
|
||||
.PARISC.unwind : {
|
||||
__start___unwind = .;
|
||||
*(.PARISC.unwind)
|
||||
__stop___unwind = .;
|
||||
}
|
||||
|
||||
EXCEPTION_TABLE(16)
|
||||
EXCEPTION_TABLE(8)
|
||||
NOTES
|
||||
|
||||
/* Data */
|
||||
|
@ -107,54 +135,8 @@ SECTIONS
|
|||
_edata = .;
|
||||
|
||||
/* BSS */
|
||||
__bss_start = .;
|
||||
/* page table entries need to be PAGE_SIZE aligned */
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
.data..vmpages : {
|
||||
*(.data..vm0.pmd)
|
||||
*(.data..vm0.pgd)
|
||||
*(.data..vm0.pte)
|
||||
}
|
||||
.bss : {
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
}
|
||||
__bss_stop = .;
|
||||
BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 8)
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
. = ALIGN(16);
|
||||
/* Linkage tables */
|
||||
.opd : {
|
||||
*(.opd)
|
||||
} PROVIDE (__gp = .);
|
||||
.plt : {
|
||||
*(.plt)
|
||||
}
|
||||
.dlt : {
|
||||
*(.dlt)
|
||||
}
|
||||
#endif
|
||||
|
||||
/* reserve space for interrupt stack by aligning __init* to 16k */
|
||||
. = ALIGN(16384);
|
||||
__init_begin = .;
|
||||
INIT_TEXT_SECTION(16384)
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
INIT_DATA_SECTION(16)
|
||||
/* we have to discard exit text and such at runtime, not link time */
|
||||
.exit.text :
|
||||
{
|
||||
EXIT_TEXT
|
||||
}
|
||||
.exit.data :
|
||||
{
|
||||
EXIT_DATA
|
||||
}
|
||||
|
||||
PERCPU_SECTION(L1_CACHE_BYTES)
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
__init_end = .;
|
||||
/* freed after init ends here */
|
||||
_end = . ;
|
||||
|
||||
STABS_DEBUG
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
#include <asm/sections.h>
|
||||
|
||||
extern int data_start;
|
||||
extern void parisc_kernel_start(void); /* Kernel entry point in head.S */
|
||||
|
||||
#if PT_NLEVELS == 3
|
||||
/* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout
|
||||
|
@ -324,8 +325,9 @@ static void __init setup_bootmem(void)
|
|||
reserve_bootmem_node(NODE_DATA(0), 0UL,
|
||||
(unsigned long)(PAGE0->mem_free +
|
||||
PDC_CONSOLE_IO_IODC_SIZE), BOOTMEM_DEFAULT);
|
||||
reserve_bootmem_node(NODE_DATA(0), __pa((unsigned long)_text),
|
||||
(unsigned long)(_end - _text), BOOTMEM_DEFAULT);
|
||||
reserve_bootmem_node(NODE_DATA(0), __pa(KERNEL_BINARY_TEXT_START),
|
||||
(unsigned long)(_end - KERNEL_BINARY_TEXT_START),
|
||||
BOOTMEM_DEFAULT);
|
||||
reserve_bootmem_node(NODE_DATA(0), (bootmap_start_pfn << PAGE_SHIFT),
|
||||
((bootmap_pfn - bootmap_start_pfn) << PAGE_SHIFT),
|
||||
BOOTMEM_DEFAULT);
|
||||
|
@ -378,6 +380,17 @@ static void __init setup_bootmem(void)
|
|||
request_resource(&sysram_resources[0], &pdcdata_resource);
|
||||
}
|
||||
|
||||
static int __init parisc_text_address(unsigned long vaddr)
|
||||
{
|
||||
static unsigned long head_ptr __initdata;
|
||||
|
||||
if (!head_ptr)
|
||||
head_ptr = PAGE_MASK & (unsigned long)
|
||||
dereference_function_descriptor(&parisc_kernel_start);
|
||||
|
||||
return core_kernel_text(vaddr) || vaddr == head_ptr;
|
||||
}
|
||||
|
||||
static void __init map_pages(unsigned long start_vaddr,
|
||||
unsigned long start_paddr, unsigned long size,
|
||||
pgprot_t pgprot, int force)
|
||||
|
@ -466,7 +479,7 @@ static void __init map_pages(unsigned long start_vaddr,
|
|||
*/
|
||||
if (force)
|
||||
pte = __mk_pte(address, pgprot);
|
||||
else if (core_kernel_text(vaddr) &&
|
||||
else if (parisc_text_address(vaddr) &&
|
||||
address != fv_addr)
|
||||
pte = __mk_pte(address, PAGE_KERNEL_EXEC);
|
||||
else
|
||||
|
|
|
@ -55,8 +55,7 @@ struct pcc_param {
|
|||
|
||||
struct s390_xts_ctx {
|
||||
u8 key[32];
|
||||
u8 xts_param[16];
|
||||
struct pcc_param pcc;
|
||||
u8 pcc_key[32];
|
||||
long enc;
|
||||
long dec;
|
||||
int key_len;
|
||||
|
@ -591,7 +590,7 @@ static int xts_aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
|
|||
xts_ctx->enc = KM_XTS_128_ENCRYPT;
|
||||
xts_ctx->dec = KM_XTS_128_DECRYPT;
|
||||
memcpy(xts_ctx->key + 16, in_key, 16);
|
||||
memcpy(xts_ctx->pcc.key + 16, in_key + 16, 16);
|
||||
memcpy(xts_ctx->pcc_key + 16, in_key + 16, 16);
|
||||
break;
|
||||
case 48:
|
||||
xts_ctx->enc = 0;
|
||||
|
@ -602,7 +601,7 @@ static int xts_aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
|
|||
xts_ctx->enc = KM_XTS_256_ENCRYPT;
|
||||
xts_ctx->dec = KM_XTS_256_DECRYPT;
|
||||
memcpy(xts_ctx->key, in_key, 32);
|
||||
memcpy(xts_ctx->pcc.key, in_key + 32, 32);
|
||||
memcpy(xts_ctx->pcc_key, in_key + 32, 32);
|
||||
break;
|
||||
default:
|
||||
*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
|
||||
|
@ -621,29 +620,33 @@ static int xts_aes_crypt(struct blkcipher_desc *desc, long func,
|
|||
unsigned int nbytes = walk->nbytes;
|
||||
unsigned int n;
|
||||
u8 *in, *out;
|
||||
void *param;
|
||||
struct pcc_param pcc_param;
|
||||
struct {
|
||||
u8 key[32];
|
||||
u8 init[16];
|
||||
} xts_param;
|
||||
|
||||
if (!nbytes)
|
||||
goto out;
|
||||
|
||||
memset(xts_ctx->pcc.block, 0, sizeof(xts_ctx->pcc.block));
|
||||
memset(xts_ctx->pcc.bit, 0, sizeof(xts_ctx->pcc.bit));
|
||||
memset(xts_ctx->pcc.xts, 0, sizeof(xts_ctx->pcc.xts));
|
||||
memcpy(xts_ctx->pcc.tweak, walk->iv, sizeof(xts_ctx->pcc.tweak));
|
||||
param = xts_ctx->pcc.key + offset;
|
||||
ret = crypt_s390_pcc(func, param);
|
||||
memset(pcc_param.block, 0, sizeof(pcc_param.block));
|
||||
memset(pcc_param.bit, 0, sizeof(pcc_param.bit));
|
||||
memset(pcc_param.xts, 0, sizeof(pcc_param.xts));
|
||||
memcpy(pcc_param.tweak, walk->iv, sizeof(pcc_param.tweak));
|
||||
memcpy(pcc_param.key, xts_ctx->pcc_key, 32);
|
||||
ret = crypt_s390_pcc(func, &pcc_param.key[offset]);
|
||||
if (ret < 0)
|
||||
return -EIO;
|
||||
|
||||
memcpy(xts_ctx->xts_param, xts_ctx->pcc.xts, 16);
|
||||
param = xts_ctx->key + offset;
|
||||
memcpy(xts_param.key, xts_ctx->key, 32);
|
||||
memcpy(xts_param.init, pcc_param.xts, 16);
|
||||
do {
|
||||
/* only use complete blocks */
|
||||
n = nbytes & ~(AES_BLOCK_SIZE - 1);
|
||||
out = walk->dst.virt.addr;
|
||||
in = walk->src.virt.addr;
|
||||
|
||||
ret = crypt_s390_km(func, param, out, in, n);
|
||||
ret = crypt_s390_km(func, &xts_param.key[offset], out, in, n);
|
||||
if (ret < 0 || ret != n)
|
||||
return -EIO;
|
||||
|
||||
|
|
|
@ -33,12 +33,11 @@ MODE_INCLUDE += -I$(srctree)/$(ARCH_DIR)/include/shared/skas
|
|||
|
||||
HEADER_ARCH := $(SUBARCH)
|
||||
|
||||
# Additional ARCH settings for x86
|
||||
ifeq ($(SUBARCH),i386)
|
||||
HEADER_ARCH := x86
|
||||
ifneq ($(filter $(SUBARCH),x86 x86_64 i386),)
|
||||
HEADER_ARCH := x86
|
||||
endif
|
||||
ifeq ($(SUBARCH),x86_64)
|
||||
HEADER_ARCH := x86
|
||||
|
||||
ifdef CONFIG_64BIT
|
||||
KBUILD_CFLAGS += -mcmodel=large
|
||||
endif
|
||||
|
||||
|
|
|
@ -19,7 +19,7 @@ struct stack_frame {
|
|||
unsigned long return_address;
|
||||
};
|
||||
|
||||
static void print_stack_trace(unsigned long *sp, unsigned long bp)
|
||||
static void do_stack_trace(unsigned long *sp, unsigned long bp)
|
||||
{
|
||||
int reliable;
|
||||
unsigned long addr;
|
||||
|
@ -94,5 +94,5 @@ void show_stack(struct task_struct *task, unsigned long *stack)
|
|||
}
|
||||
printk(KERN_CONT "\n");
|
||||
|
||||
print_stack_trace(sp, bp);
|
||||
do_stack_trace(sp, bp);
|
||||
}
|
||||
|
|
|
@ -31,6 +31,9 @@ ifeq ($(CONFIG_X86_32),y)
|
|||
|
||||
KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return
|
||||
|
||||
# Don't autogenerate SSE instructions
|
||||
KBUILD_CFLAGS += -mno-sse
|
||||
|
||||
# Never want PIC in a 32-bit kernel, prevent breakage with GCC built
|
||||
# with nonstandard options
|
||||
KBUILD_CFLAGS += -fno-pic
|
||||
|
@ -57,8 +60,11 @@ else
|
|||
KBUILD_AFLAGS += -m64
|
||||
KBUILD_CFLAGS += -m64
|
||||
|
||||
# Don't autogenerate SSE instructions
|
||||
KBUILD_CFLAGS += -mno-sse
|
||||
|
||||
# Use -mpreferred-stack-boundary=3 if supported.
|
||||
KBUILD_CFLAGS += $(call cc-option,-mno-sse -mpreferred-stack-boundary=3)
|
||||
KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3)
|
||||
|
||||
# FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
|
||||
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
|
||||
|
|
|
@ -77,7 +77,7 @@ static inline void atomic_sub(int i, atomic_t *v)
|
|||
*/
|
||||
static inline int atomic_sub_and_test(int i, atomic_t *v)
|
||||
{
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, i, "%0", "e");
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, "er", i, "%0", "e");
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -141,7 +141,7 @@ static inline int atomic_inc_and_test(atomic_t *v)
|
|||
*/
|
||||
static inline int atomic_add_negative(int i, atomic_t *v)
|
||||
{
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, i, "%0", "s");
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, "er", i, "%0", "s");
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -72,7 +72,7 @@ static inline void atomic64_sub(long i, atomic64_t *v)
|
|||
*/
|
||||
static inline int atomic64_sub_and_test(long i, atomic64_t *v)
|
||||
{
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, i, "%0", "e");
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, "er", i, "%0", "e");
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -138,7 +138,7 @@ static inline int atomic64_inc_and_test(atomic64_t *v)
|
|||
*/
|
||||
static inline int atomic64_add_negative(long i, atomic64_t *v)
|
||||
{
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, i, "%0", "s");
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, "er", i, "%0", "s");
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -205,7 +205,7 @@ static inline void change_bit(long nr, volatile unsigned long *addr)
|
|||
*/
|
||||
static inline int test_and_set_bit(long nr, volatile unsigned long *addr)
|
||||
{
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "bts", *addr, nr, "%0", "c");
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "bts", *addr, "Ir", nr, "%0", "c");
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -251,7 +251,7 @@ static inline int __test_and_set_bit(long nr, volatile unsigned long *addr)
|
|||
*/
|
||||
static inline int test_and_clear_bit(long nr, volatile unsigned long *addr)
|
||||
{
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "btr", *addr, nr, "%0", "c");
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "btr", *addr, "Ir", nr, "%0", "c");
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -304,7 +304,7 @@ static inline int __test_and_change_bit(long nr, volatile unsigned long *addr)
|
|||
*/
|
||||
static inline int test_and_change_bit(long nr, volatile unsigned long *addr)
|
||||
{
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "btc", *addr, nr, "%0", "c");
|
||||
GEN_BINARY_RMWcc(LOCK_PREFIX "btc", *addr, "Ir", nr, "%0", "c");
|
||||
}
|
||||
|
||||
static __always_inline int constant_test_bit(long nr, const volatile unsigned long *addr)
|
||||
|
|
|
@ -52,7 +52,7 @@ static inline void local_sub(long i, local_t *l)
|
|||
*/
|
||||
static inline int local_sub_and_test(long i, local_t *l)
|
||||
{
|
||||
GEN_BINARY_RMWcc(_ASM_SUB, l->a.counter, i, "%0", "e");
|
||||
GEN_BINARY_RMWcc(_ASM_SUB, l->a.counter, "er", i, "%0", "e");
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -92,7 +92,7 @@ static inline int local_inc_and_test(local_t *l)
|
|||
*/
|
||||
static inline int local_add_negative(long i, local_t *l)
|
||||
{
|
||||
GEN_BINARY_RMWcc(_ASM_ADD, l->a.counter, i, "%0", "s");
|
||||
GEN_BINARY_RMWcc(_ASM_ADD, l->a.counter, "er", i, "%0", "s");
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -16,8 +16,8 @@ cc_label: \
|
|||
#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
|
||||
__GEN_RMWcc(op " " arg0, var, cc)
|
||||
|
||||
#define GEN_BINARY_RMWcc(op, var, val, arg0, cc) \
|
||||
__GEN_RMWcc(op " %1, " arg0, var, cc, "er" (val))
|
||||
#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \
|
||||
__GEN_RMWcc(op " %1, " arg0, var, cc, vcon (val))
|
||||
|
||||
#else /* !CC_HAVE_ASM_GOTO */
|
||||
|
||||
|
@ -33,8 +33,8 @@ do { \
|
|||
#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
|
||||
__GEN_RMWcc(op " " arg0, var, cc)
|
||||
|
||||
#define GEN_BINARY_RMWcc(op, var, val, arg0, cc) \
|
||||
__GEN_RMWcc(op " %2, " arg0, var, cc, "er" (val))
|
||||
#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \
|
||||
__GEN_RMWcc(op " %2, " arg0, var, cc, vcon (val))
|
||||
|
||||
#endif /* CC_HAVE_ASM_GOTO */
|
||||
|
||||
|
|
|
@ -71,6 +71,17 @@ DEFINE_IRQ_VECTOR_EVENT(x86_platform_ipi);
|
|||
*/
|
||||
DEFINE_IRQ_VECTOR_EVENT(irq_work);
|
||||
|
||||
/*
|
||||
* We must dis-allow sampling irq_work_exit() because perf event sampling
|
||||
* itself can cause irq_work, which would lead to an infinite loop;
|
||||
*
|
||||
* 1) irq_work_exit happens
|
||||
* 2) generates perf sample
|
||||
* 3) generates irq_work
|
||||
* 4) goto 1
|
||||
*/
|
||||
TRACE_EVENT_PERF_PERM(irq_work_exit, is_sampling_event(p_event) ? -EPERM : 0);
|
||||
|
||||
/*
|
||||
* call_function - called when entering/exiting a call function interrupt
|
||||
* vector handler
|
||||
|
|
|
@ -558,6 +558,17 @@ void native_machine_shutdown(void)
|
|||
{
|
||||
/* Stop the cpus and apics */
|
||||
#ifdef CONFIG_X86_IO_APIC
|
||||
/*
|
||||
* Disabling IO APIC before local APIC is a workaround for
|
||||
* erratum AVR31 in "Intel Atom Processor C2000 Product Family
|
||||
* Specification Update". In this situation, interrupts that target
|
||||
* a Logical Processor whose Local APIC is either in the process of
|
||||
* being hardware disabled or software disabled are neither delivered
|
||||
* nor discarded. When this erratum occurs, the processor may hang.
|
||||
*
|
||||
* Even without the erratum, it still makes sense to quiet IO APIC
|
||||
* before disabling Local APIC.
|
||||
*/
|
||||
disable_IO_APIC();
|
||||
#endif
|
||||
|
||||
|
|
|
@ -142,7 +142,7 @@ early_efi_write(struct console *con, const char *str, unsigned int num)
|
|||
efi_y += font->height;
|
||||
}
|
||||
|
||||
if (efi_y + font->height >= si->lfb_height) {
|
||||
if (efi_y + font->height > si->lfb_height) {
|
||||
u32 i;
|
||||
|
||||
efi_y -= font->height;
|
||||
|
|
|
@ -435,9 +435,9 @@ static inline uint64_t blkg_stat_read(struct blkg_stat *stat)
|
|||
uint64_t v;
|
||||
|
||||
do {
|
||||
start = u64_stats_fetch_begin(&stat->syncp);
|
||||
start = u64_stats_fetch_begin_bh(&stat->syncp);
|
||||
v = stat->cnt;
|
||||
} while (u64_stats_fetch_retry(&stat->syncp, start));
|
||||
} while (u64_stats_fetch_retry_bh(&stat->syncp, start));
|
||||
|
||||
return v;
|
||||
}
|
||||
|
@ -508,9 +508,9 @@ static inline struct blkg_rwstat blkg_rwstat_read(struct blkg_rwstat *rwstat)
|
|||
struct blkg_rwstat tmp;
|
||||
|
||||
do {
|
||||
start = u64_stats_fetch_begin(&rwstat->syncp);
|
||||
start = u64_stats_fetch_begin_bh(&rwstat->syncp);
|
||||
tmp = *rwstat;
|
||||
} while (u64_stats_fetch_retry(&rwstat->syncp, start));
|
||||
} while (u64_stats_fetch_retry_bh(&rwstat->syncp, start));
|
||||
|
||||
return tmp;
|
||||
}
|
||||
|
|
|
@ -502,15 +502,6 @@ void blk_abort_flushes(struct request_queue *q)
|
|||
}
|
||||
}
|
||||
|
||||
static void bio_end_flush(struct bio *bio, int err)
|
||||
{
|
||||
if (err)
|
||||
clear_bit(BIO_UPTODATE, &bio->bi_flags);
|
||||
if (bio->bi_private)
|
||||
complete(bio->bi_private);
|
||||
bio_put(bio);
|
||||
}
|
||||
|
||||
/**
|
||||
* blkdev_issue_flush - queue a flush
|
||||
* @bdev: blockdev to issue flush for
|
||||
|
@ -526,7 +517,6 @@ static void bio_end_flush(struct bio *bio, int err)
|
|||
int blkdev_issue_flush(struct block_device *bdev, gfp_t gfp_mask,
|
||||
sector_t *error_sector)
|
||||
{
|
||||
DECLARE_COMPLETION_ONSTACK(wait);
|
||||
struct request_queue *q;
|
||||
struct bio *bio;
|
||||
int ret = 0;
|
||||
|
@ -548,13 +538,9 @@ int blkdev_issue_flush(struct block_device *bdev, gfp_t gfp_mask,
|
|||
return -ENXIO;
|
||||
|
||||
bio = bio_alloc(gfp_mask, 0);
|
||||
bio->bi_end_io = bio_end_flush;
|
||||
bio->bi_bdev = bdev;
|
||||
bio->bi_private = &wait;
|
||||
|
||||
bio_get(bio);
|
||||
submit_bio(WRITE_FLUSH, bio);
|
||||
wait_for_completion_io(&wait);
|
||||
ret = submit_bio_wait(WRITE_FLUSH, bio);
|
||||
|
||||
/*
|
||||
* The driver must store the error location in ->bi_sector, if
|
||||
|
@ -564,9 +550,6 @@ int blkdev_issue_flush(struct block_device *bdev, gfp_t gfp_mask,
|
|||
if (error_sector)
|
||||
*error_sector = bio->bi_sector;
|
||||
|
||||
if (!bio_flagged(bio, BIO_UPTODATE))
|
||||
ret = -EIO;
|
||||
|
||||
bio_put(bio);
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -202,10 +202,12 @@ static struct request *blk_mq_alloc_request_pinned(struct request_queue *q,
|
|||
if (rq) {
|
||||
blk_mq_rq_ctx_init(q, ctx, rq, rw);
|
||||
break;
|
||||
} else if (!(gfp & __GFP_WAIT))
|
||||
break;
|
||||
}
|
||||
|
||||
blk_mq_put_ctx(ctx);
|
||||
if (!(gfp & __GFP_WAIT))
|
||||
break;
|
||||
|
||||
__blk_mq_run_hw_queue(hctx);
|
||||
blk_mq_wait_for_tags(hctx->tags);
|
||||
} while (1);
|
||||
|
@ -222,7 +224,8 @@ struct request *blk_mq_alloc_request(struct request_queue *q, int rw,
|
|||
return NULL;
|
||||
|
||||
rq = blk_mq_alloc_request_pinned(q, rw, gfp, reserved);
|
||||
blk_mq_put_ctx(rq->mq_ctx);
|
||||
if (rq)
|
||||
blk_mq_put_ctx(rq->mq_ctx);
|
||||
return rq;
|
||||
}
|
||||
|
||||
|
@ -235,7 +238,8 @@ struct request *blk_mq_alloc_reserved_request(struct request_queue *q, int rw,
|
|||
return NULL;
|
||||
|
||||
rq = blk_mq_alloc_request_pinned(q, rw, gfp, true);
|
||||
blk_mq_put_ctx(rq->mq_ctx);
|
||||
if (rq)
|
||||
blk_mq_put_ctx(rq->mq_ctx);
|
||||
return rq;
|
||||
}
|
||||
EXPORT_SYMBOL(blk_mq_alloc_reserved_request);
|
||||
|
@ -308,12 +312,12 @@ void blk_mq_complete_request(struct request *rq, int error)
|
|||
|
||||
blk_account_io_completion(rq, bytes);
|
||||
|
||||
blk_account_io_done(rq);
|
||||
|
||||
if (rq->end_io)
|
||||
rq->end_io(rq, error);
|
||||
else
|
||||
blk_mq_free_request(rq);
|
||||
|
||||
blk_account_io_done(rq);
|
||||
}
|
||||
|
||||
void __blk_mq_end_io(struct request *rq, int error)
|
||||
|
|
|
@ -114,6 +114,9 @@ static ssize_t hash_sendpage(struct socket *sock, struct page *page,
|
|||
struct hash_ctx *ctx = ask->private;
|
||||
int err;
|
||||
|
||||
if (flags & MSG_SENDPAGE_NOTLAST)
|
||||
flags |= MSG_MORE;
|
||||
|
||||
lock_sock(sk);
|
||||
sg_init_table(ctx->sgl.sg, 1);
|
||||
sg_set_page(ctx->sgl.sg, page, size, offset);
|
||||
|
|
|
@ -378,6 +378,9 @@ static ssize_t skcipher_sendpage(struct socket *sock, struct page *page,
|
|||
struct skcipher_sg_list *sgl;
|
||||
int err = -EINVAL;
|
||||
|
||||
if (flags & MSG_SENDPAGE_NOTLAST)
|
||||
flags |= MSG_MORE;
|
||||
|
||||
lock_sock(sk);
|
||||
if (!ctx->more && ctx->used)
|
||||
goto unlock;
|
||||
|
|
|
@ -380,9 +380,10 @@ static void crypto_authenc_encrypt_done(struct crypto_async_request *req,
|
|||
if (!err) {
|
||||
struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
|
||||
struct crypto_authenc_ctx *ctx = crypto_aead_ctx(authenc);
|
||||
struct ablkcipher_request *abreq = aead_request_ctx(areq);
|
||||
u8 *iv = (u8 *)(abreq + 1) +
|
||||
crypto_ablkcipher_reqsize(ctx->enc);
|
||||
struct authenc_request_ctx *areq_ctx = aead_request_ctx(areq);
|
||||
struct ablkcipher_request *abreq = (void *)(areq_ctx->tail
|
||||
+ ctx->reqoff);
|
||||
u8 *iv = (u8 *)abreq - crypto_ablkcipher_ivsize(ctx->enc);
|
||||
|
||||
err = crypto_authenc_genicv(areq, iv, 0);
|
||||
}
|
||||
|
|
|
@ -271,7 +271,8 @@ static int crypto_ccm_auth(struct aead_request *req, struct scatterlist *plain,
|
|||
}
|
||||
|
||||
/* compute plaintext into mac */
|
||||
get_data_to_compute(cipher, pctx, plain, cryptlen);
|
||||
if (cryptlen)
|
||||
get_data_to_compute(cipher, pctx, plain, cryptlen);
|
||||
|
||||
out:
|
||||
return err;
|
||||
|
|
|
@ -1242,6 +1242,10 @@ static int do_test(int m)
|
|||
ret += tcrypt_test("cmac(des3_ede)");
|
||||
break;
|
||||
|
||||
case 155:
|
||||
ret += tcrypt_test("authenc(hmac(sha1),cbc(aes))");
|
||||
break;
|
||||
|
||||
case 200:
|
||||
test_cipher_speed("ecb(aes)", ENCRYPT, sec, NULL, 0,
|
||||
speed_template_16_24_32);
|
||||
|
|
|
@ -503,16 +503,16 @@ static int __test_aead(struct crypto_aead *tfm, int enc,
|
|||
goto out;
|
||||
}
|
||||
|
||||
sg_init_one(&sg[0], input,
|
||||
template[i].ilen + (enc ? authsize : 0));
|
||||
|
||||
if (diff_dst) {
|
||||
output = xoutbuf[0];
|
||||
output += align_offset;
|
||||
sg_init_one(&sg[0], input, template[i].ilen);
|
||||
sg_init_one(&sgout[0], output,
|
||||
template[i].rlen);
|
||||
} else {
|
||||
sg_init_one(&sg[0], input,
|
||||
template[i].ilen +
|
||||
(enc ? authsize : 0));
|
||||
} else {
|
||||
output = input;
|
||||
}
|
||||
|
||||
|
@ -612,12 +612,6 @@ static int __test_aead(struct crypto_aead *tfm, int enc,
|
|||
memcpy(q, template[i].input + temp,
|
||||
template[i].tap[k]);
|
||||
|
||||
n = template[i].tap[k];
|
||||
if (k == template[i].np - 1 && enc)
|
||||
n += authsize;
|
||||
if (offset_in_page(q) + n < PAGE_SIZE)
|
||||
q[n] = 0;
|
||||
|
||||
sg_set_buf(&sg[k], q, template[i].tap[k]);
|
||||
|
||||
if (diff_dst) {
|
||||
|
@ -625,13 +619,17 @@ static int __test_aead(struct crypto_aead *tfm, int enc,
|
|||
offset_in_page(IDX[k]);
|
||||
|
||||
memset(q, 0, template[i].tap[k]);
|
||||
if (offset_in_page(q) + n < PAGE_SIZE)
|
||||
q[n] = 0;
|
||||
|
||||
sg_set_buf(&sgout[k], q,
|
||||
template[i].tap[k]);
|
||||
}
|
||||
|
||||
n = template[i].tap[k];
|
||||
if (k == template[i].np - 1 && enc)
|
||||
n += authsize;
|
||||
if (offset_in_page(q) + n < PAGE_SIZE)
|
||||
q[n] = 0;
|
||||
|
||||
temp += template[i].tap[k];
|
||||
}
|
||||
|
||||
|
@ -650,10 +648,10 @@ static int __test_aead(struct crypto_aead *tfm, int enc,
|
|||
goto out;
|
||||
}
|
||||
|
||||
sg[k - 1].length += authsize;
|
||||
|
||||
if (diff_dst)
|
||||
sgout[k - 1].length += authsize;
|
||||
else
|
||||
sg[k - 1].length += authsize;
|
||||
}
|
||||
|
||||
sg_init_table(asg, template[i].anp);
|
||||
|
|
|
@ -3625,6 +3625,7 @@ int ata_scsi_add_hosts(struct ata_host *host, struct scsi_host_template *sht)
|
|||
shost->max_lun = 1;
|
||||
shost->max_channel = 1;
|
||||
shost->max_cmd_len = 16;
|
||||
shost->no_write_same = 1;
|
||||
|
||||
/* Schedule policy is determined by ->qc_defer()
|
||||
* callback and it needs to see every deferred qc.
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#include <linux/async.h>
|
||||
#include <linux/suspend.h>
|
||||
#include <trace/events/power.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/cpuidle.h>
|
||||
#include <linux/timer.h>
|
||||
|
||||
|
@ -540,6 +541,7 @@ static void dpm_resume_noirq(pm_message_t state)
|
|||
dpm_show_time(starttime, state, "noirq");
|
||||
resume_device_irqs();
|
||||
cpuidle_resume();
|
||||
cpufreq_resume();
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -955,6 +957,7 @@ static int dpm_suspend_noirq(pm_message_t state)
|
|||
ktime_t starttime = ktime_get();
|
||||
int error = 0;
|
||||
|
||||
cpufreq_suspend();
|
||||
cpuidle_pause();
|
||||
suspend_device_irqs();
|
||||
mutex_lock(&dpm_list_mtx);
|
||||
|
|
|
@ -489,7 +489,7 @@ static int blkif_queue_request(struct request *req)
|
|||
|
||||
if ((ring_req->operation == BLKIF_OP_INDIRECT) &&
|
||||
(i % SEGS_PER_INDIRECT_FRAME == 0)) {
|
||||
unsigned long pfn;
|
||||
unsigned long uninitialized_var(pfn);
|
||||
|
||||
if (segments)
|
||||
kunmap_atomic(segments);
|
||||
|
@ -2011,6 +2011,10 @@ static void blkif_release(struct gendisk *disk, fmode_t mode)
|
|||
|
||||
bdev = bdget_disk(disk, 0);
|
||||
|
||||
if (!bdev) {
|
||||
WARN(1, "Block device %s yanked out from us!\n", disk->disk_name);
|
||||
goto out_mutex;
|
||||
}
|
||||
if (bdev->bd_openers)
|
||||
goto out;
|
||||
|
||||
|
@ -2041,6 +2045,7 @@ static void blkif_release(struct gendisk *disk, fmode_t mode)
|
|||
|
||||
out:
|
||||
bdput(bdev);
|
||||
out_mutex:
|
||||
mutex_unlock(&blkfront_mutex);
|
||||
}
|
||||
|
||||
|
|
|
@ -87,6 +87,7 @@ config ARM_ARCH_TIMER
|
|||
config ARM_ARCH_TIMER_EVTSTREAM
|
||||
bool "Support for ARM architected timer event stream generation"
|
||||
default y if ARM_ARCH_TIMER
|
||||
depends on ARM_ARCH_TIMER
|
||||
help
|
||||
This option enables support for event stream generation based on
|
||||
the ARM architected timer. It is used for waking up CPUs executing
|
||||
|
|
|
@ -313,8 +313,20 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
|
|||
goto err1;
|
||||
}
|
||||
|
||||
return sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev),
|
||||
cfg->clockevent_rating);
|
||||
ret = clk_prepare(p->clk);
|
||||
if (ret < 0)
|
||||
goto err2;
|
||||
|
||||
ret = sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev),
|
||||
cfg->clockevent_rating);
|
||||
if (ret < 0)
|
||||
goto err3;
|
||||
|
||||
return 0;
|
||||
err3:
|
||||
clk_unprepare(p->clk);
|
||||
err2:
|
||||
clk_put(p->clk);
|
||||
err1:
|
||||
iounmap(p->mapbase);
|
||||
err0:
|
||||
|
|
|
@ -472,12 +472,26 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
|
|||
ret = PTR_ERR(p->clk);
|
||||
goto err1;
|
||||
}
|
||||
|
||||
ret = clk_prepare(p->clk);
|
||||
if (ret < 0)
|
||||
goto err2;
|
||||
|
||||
p->cs_enabled = false;
|
||||
p->enable_count = 0;
|
||||
|
||||
return sh_tmu_register(p, (char *)dev_name(&p->pdev->dev),
|
||||
cfg->clockevent_rating,
|
||||
cfg->clocksource_rating);
|
||||
ret = sh_tmu_register(p, (char *)dev_name(&p->pdev->dev),
|
||||
cfg->clockevent_rating,
|
||||
cfg->clocksource_rating);
|
||||
if (ret < 0)
|
||||
goto err3;
|
||||
|
||||
return 0;
|
||||
|
||||
err3:
|
||||
clk_unprepare(p->clk);
|
||||
err2:
|
||||
clk_put(p->clk);
|
||||
err1:
|
||||
iounmap(p->mapbase);
|
||||
err0:
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/suspend.h>
|
||||
#include <linux/syscore_ops.h>
|
||||
#include <linux/tick.h>
|
||||
#include <trace/events/power.h>
|
||||
|
@ -47,6 +48,9 @@ static LIST_HEAD(cpufreq_policy_list);
|
|||
static DEFINE_PER_CPU(char[CPUFREQ_NAME_LEN], cpufreq_cpu_governor);
|
||||
#endif
|
||||
|
||||
/* Flag to suspend/resume CPUFreq governors */
|
||||
static bool cpufreq_suspended;
|
||||
|
||||
static inline bool has_target(void)
|
||||
{
|
||||
return cpufreq_driver->target_index || cpufreq_driver->target;
|
||||
|
@ -1462,6 +1466,41 @@ static struct subsys_interface cpufreq_interface = {
|
|||
.remove_dev = cpufreq_remove_dev,
|
||||
};
|
||||
|
||||
void cpufreq_suspend(void)
|
||||
{
|
||||
struct cpufreq_policy *policy;
|
||||
|
||||
if (!has_target())
|
||||
return;
|
||||
|
||||
pr_debug("%s: Suspending Governors\n", __func__);
|
||||
|
||||
list_for_each_entry(policy, &cpufreq_policy_list, policy_list)
|
||||
if (__cpufreq_governor(policy, CPUFREQ_GOV_STOP))
|
||||
pr_err("%s: Failed to stop governor for policy: %p\n",
|
||||
__func__, policy);
|
||||
|
||||
cpufreq_suspended = true;
|
||||
}
|
||||
|
||||
void cpufreq_resume(void)
|
||||
{
|
||||
struct cpufreq_policy *policy;
|
||||
|
||||
if (!has_target())
|
||||
return;
|
||||
|
||||
pr_debug("%s: Resuming Governors\n", __func__);
|
||||
|
||||
cpufreq_suspended = false;
|
||||
|
||||
list_for_each_entry(policy, &cpufreq_policy_list, policy_list)
|
||||
if (__cpufreq_governor(policy, CPUFREQ_GOV_START)
|
||||
|| __cpufreq_governor(policy, CPUFREQ_GOV_LIMITS))
|
||||
pr_err("%s: Failed to start governor for policy: %p\n",
|
||||
__func__, policy);
|
||||
}
|
||||
|
||||
/**
|
||||
* cpufreq_bp_suspend - Prepare the boot CPU for system suspend.
|
||||
*
|
||||
|
@ -1764,6 +1803,10 @@ static int __cpufreq_governor(struct cpufreq_policy *policy,
|
|||
struct cpufreq_governor *gov = NULL;
|
||||
#endif
|
||||
|
||||
/* Don't start any governor operations if we are entering suspend */
|
||||
if (cpufreq_suspended)
|
||||
return 0;
|
||||
|
||||
if (policy->governor->max_transition_latency &&
|
||||
policy->cpuinfo.transition_latency >
|
||||
policy->governor->max_transition_latency) {
|
||||
|
@ -2076,9 +2119,6 @@ static int cpufreq_cpu_callback(struct notifier_block *nfb,
|
|||
dev = get_cpu_device(cpu);
|
||||
if (dev) {
|
||||
|
||||
if (action & CPU_TASKS_FROZEN)
|
||||
frozen = true;
|
||||
|
||||
switch (action & ~CPU_TASKS_FROZEN) {
|
||||
case CPU_ONLINE:
|
||||
__cpufreq_add_dev(dev, NULL, frozen);
|
||||
|
|
|
@ -400,7 +400,7 @@ EXPORT_SYMBOL_GPL(cpuidle_register_device);
|
|||
*/
|
||||
void cpuidle_unregister_device(struct cpuidle_device *dev)
|
||||
{
|
||||
if (dev->registered == 0)
|
||||
if (!dev || dev->registered == 0)
|
||||
return;
|
||||
|
||||
cpuidle_pause_and_lock();
|
||||
|
|
|
@ -818,7 +818,7 @@ static void aead_decrypt_done(struct device *jrdev, u32 *desc, u32 err,
|
|||
ivsize, 1);
|
||||
print_hex_dump(KERN_ERR, "dst @"__stringify(__LINE__)": ",
|
||||
DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->dst),
|
||||
req->cryptlen, 1);
|
||||
req->cryptlen - ctx->authsize, 1);
|
||||
#endif
|
||||
|
||||
if (err) {
|
||||
|
@ -972,12 +972,9 @@ static void init_aead_job(u32 *sh_desc, dma_addr_t ptr,
|
|||
(edesc->src_nents ? : 1);
|
||||
in_options = LDST_SGF;
|
||||
}
|
||||
if (encrypt)
|
||||
append_seq_in_ptr(desc, src_dma, req->assoclen + ivsize +
|
||||
req->cryptlen - authsize, in_options);
|
||||
else
|
||||
append_seq_in_ptr(desc, src_dma, req->assoclen + ivsize +
|
||||
req->cryptlen, in_options);
|
||||
|
||||
append_seq_in_ptr(desc, src_dma, req->assoclen + ivsize + req->cryptlen,
|
||||
in_options);
|
||||
|
||||
if (likely(req->src == req->dst)) {
|
||||
if (all_contig) {
|
||||
|
@ -998,7 +995,8 @@ static void init_aead_job(u32 *sh_desc, dma_addr_t ptr,
|
|||
}
|
||||
}
|
||||
if (encrypt)
|
||||
append_seq_out_ptr(desc, dst_dma, req->cryptlen, out_options);
|
||||
append_seq_out_ptr(desc, dst_dma, req->cryptlen + authsize,
|
||||
out_options);
|
||||
else
|
||||
append_seq_out_ptr(desc, dst_dma, req->cryptlen - authsize,
|
||||
out_options);
|
||||
|
@ -1048,8 +1046,8 @@ static void init_aead_giv_job(u32 *sh_desc, dma_addr_t ptr,
|
|||
sec4_sg_index += edesc->assoc_nents + 1 + edesc->src_nents;
|
||||
in_options = LDST_SGF;
|
||||
}
|
||||
append_seq_in_ptr(desc, src_dma, req->assoclen + ivsize +
|
||||
req->cryptlen - authsize, in_options);
|
||||
append_seq_in_ptr(desc, src_dma, req->assoclen + ivsize + req->cryptlen,
|
||||
in_options);
|
||||
|
||||
if (contig & GIV_DST_CONTIG) {
|
||||
dst_dma = edesc->iv_dma;
|
||||
|
@ -1066,7 +1064,8 @@ static void init_aead_giv_job(u32 *sh_desc, dma_addr_t ptr,
|
|||
}
|
||||
}
|
||||
|
||||
append_seq_out_ptr(desc, dst_dma, ivsize + req->cryptlen, out_options);
|
||||
append_seq_out_ptr(desc, dst_dma, ivsize + req->cryptlen + authsize,
|
||||
out_options);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -1130,7 +1129,8 @@ static void init_ablkcipher_job(u32 *sh_desc, dma_addr_t ptr,
|
|||
* allocate and map the aead extended descriptor
|
||||
*/
|
||||
static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
|
||||
int desc_bytes, bool *all_contig_ptr)
|
||||
int desc_bytes, bool *all_contig_ptr,
|
||||
bool encrypt)
|
||||
{
|
||||
struct crypto_aead *aead = crypto_aead_reqtfm(req);
|
||||
struct caam_ctx *ctx = crypto_aead_ctx(aead);
|
||||
|
@ -1145,12 +1145,22 @@ static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
|
|||
bool assoc_chained = false, src_chained = false, dst_chained = false;
|
||||
int ivsize = crypto_aead_ivsize(aead);
|
||||
int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes;
|
||||
unsigned int authsize = ctx->authsize;
|
||||
|
||||
assoc_nents = sg_count(req->assoc, req->assoclen, &assoc_chained);
|
||||
src_nents = sg_count(req->src, req->cryptlen, &src_chained);
|
||||
|
||||
if (unlikely(req->dst != req->src))
|
||||
dst_nents = sg_count(req->dst, req->cryptlen, &dst_chained);
|
||||
if (unlikely(req->dst != req->src)) {
|
||||
src_nents = sg_count(req->src, req->cryptlen, &src_chained);
|
||||
dst_nents = sg_count(req->dst,
|
||||
req->cryptlen +
|
||||
(encrypt ? authsize : (-authsize)),
|
||||
&dst_chained);
|
||||
} else {
|
||||
src_nents = sg_count(req->src,
|
||||
req->cryptlen +
|
||||
(encrypt ? authsize : 0),
|
||||
&src_chained);
|
||||
}
|
||||
|
||||
sgc = dma_map_sg_chained(jrdev, req->assoc, assoc_nents ? : 1,
|
||||
DMA_TO_DEVICE, assoc_chained);
|
||||
|
@ -1234,11 +1244,9 @@ static int aead_encrypt(struct aead_request *req)
|
|||
u32 *desc;
|
||||
int ret = 0;
|
||||
|
||||
req->cryptlen += ctx->authsize;
|
||||
|
||||
/* allocate extended descriptor */
|
||||
edesc = aead_edesc_alloc(req, DESC_JOB_IO_LEN *
|
||||
CAAM_CMD_SZ, &all_contig);
|
||||
CAAM_CMD_SZ, &all_contig, true);
|
||||
if (IS_ERR(edesc))
|
||||
return PTR_ERR(edesc);
|
||||
|
||||
|
@ -1275,7 +1283,7 @@ static int aead_decrypt(struct aead_request *req)
|
|||
|
||||
/* allocate extended descriptor */
|
||||
edesc = aead_edesc_alloc(req, DESC_JOB_IO_LEN *
|
||||
CAAM_CMD_SZ, &all_contig);
|
||||
CAAM_CMD_SZ, &all_contig, false);
|
||||
if (IS_ERR(edesc))
|
||||
return PTR_ERR(edesc);
|
||||
|
||||
|
@ -1332,7 +1340,8 @@ static struct aead_edesc *aead_giv_edesc_alloc(struct aead_givcrypt_request
|
|||
src_nents = sg_count(req->src, req->cryptlen, &src_chained);
|
||||
|
||||
if (unlikely(req->dst != req->src))
|
||||
dst_nents = sg_count(req->dst, req->cryptlen, &dst_chained);
|
||||
dst_nents = sg_count(req->dst, req->cryptlen + ctx->authsize,
|
||||
&dst_chained);
|
||||
|
||||
sgc = dma_map_sg_chained(jrdev, req->assoc, assoc_nents ? : 1,
|
||||
DMA_TO_DEVICE, assoc_chained);
|
||||
|
@ -1426,8 +1435,6 @@ static int aead_givencrypt(struct aead_givcrypt_request *areq)
|
|||
u32 *desc;
|
||||
int ret = 0;
|
||||
|
||||
req->cryptlen += ctx->authsize;
|
||||
|
||||
/* allocate extended descriptor */
|
||||
edesc = aead_giv_edesc_alloc(areq, DESC_JOB_IO_LEN *
|
||||
CAAM_CMD_SZ, &contig);
|
||||
|
|
|
@ -6,6 +6,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/of_address.h>
|
||||
|
||||
#include "compat.h"
|
||||
#include "regs.h"
|
||||
|
|
|
@ -790,7 +790,7 @@ static void ipsec_esp_unmap(struct device *dev,
|
|||
|
||||
if (edesc->assoc_chained)
|
||||
talitos_unmap_sg_chain(dev, areq->assoc, DMA_TO_DEVICE);
|
||||
else
|
||||
else if (areq->assoclen)
|
||||
/* assoc_nents counts also for IV in non-contiguous cases */
|
||||
dma_unmap_sg(dev, areq->assoc,
|
||||
edesc->assoc_nents ? edesc->assoc_nents - 1 : 1,
|
||||
|
@ -973,7 +973,11 @@ static int ipsec_esp(struct talitos_edesc *edesc, struct aead_request *areq,
|
|||
dma_sync_single_for_device(dev, edesc->dma_link_tbl,
|
||||
edesc->dma_len, DMA_BIDIRECTIONAL);
|
||||
} else {
|
||||
to_talitos_ptr(&desc->ptr[1], sg_dma_address(areq->assoc));
|
||||
if (areq->assoclen)
|
||||
to_talitos_ptr(&desc->ptr[1],
|
||||
sg_dma_address(areq->assoc));
|
||||
else
|
||||
to_talitos_ptr(&desc->ptr[1], edesc->iv_dma);
|
||||
desc->ptr[1].j_extent = 0;
|
||||
}
|
||||
|
||||
|
@ -1108,7 +1112,8 @@ static struct talitos_edesc *talitos_edesc_alloc(struct device *dev,
|
|||
unsigned int authsize,
|
||||
unsigned int ivsize,
|
||||
int icv_stashing,
|
||||
u32 cryptoflags)
|
||||
u32 cryptoflags,
|
||||
bool encrypt)
|
||||
{
|
||||
struct talitos_edesc *edesc;
|
||||
int assoc_nents = 0, src_nents, dst_nents, alloc_len, dma_len;
|
||||
|
@ -1122,10 +1127,10 @@ static struct talitos_edesc *talitos_edesc_alloc(struct device *dev,
|
|||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
if (iv)
|
||||
if (ivsize)
|
||||
iv_dma = dma_map_single(dev, iv, ivsize, DMA_TO_DEVICE);
|
||||
|
||||
if (assoc) {
|
||||
if (assoclen) {
|
||||
/*
|
||||
* Currently it is assumed that iv is provided whenever assoc
|
||||
* is.
|
||||
|
@ -1141,19 +1146,17 @@ static struct talitos_edesc *talitos_edesc_alloc(struct device *dev,
|
|||
assoc_nents = assoc_nents ? assoc_nents + 1 : 2;
|
||||
}
|
||||
|
||||
src_nents = sg_count(src, cryptlen + authsize, &src_chained);
|
||||
src_nents = (src_nents == 1) ? 0 : src_nents;
|
||||
|
||||
if (!dst) {
|
||||
dst_nents = 0;
|
||||
} else {
|
||||
if (dst == src) {
|
||||
dst_nents = src_nents;
|
||||
} else {
|
||||
dst_nents = sg_count(dst, cryptlen + authsize,
|
||||
&dst_chained);
|
||||
dst_nents = (dst_nents == 1) ? 0 : dst_nents;
|
||||
}
|
||||
if (!dst || dst == src) {
|
||||
src_nents = sg_count(src, cryptlen + authsize, &src_chained);
|
||||
src_nents = (src_nents == 1) ? 0 : src_nents;
|
||||
dst_nents = dst ? src_nents : 0;
|
||||
} else { /* dst && dst != src*/
|
||||
src_nents = sg_count(src, cryptlen + (encrypt ? 0 : authsize),
|
||||
&src_chained);
|
||||
src_nents = (src_nents == 1) ? 0 : src_nents;
|
||||
dst_nents = sg_count(dst, cryptlen + (encrypt ? authsize : 0),
|
||||
&dst_chained);
|
||||
dst_nents = (dst_nents == 1) ? 0 : dst_nents;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -1173,9 +1176,16 @@ static struct talitos_edesc *talitos_edesc_alloc(struct device *dev,
|
|||
|
||||
edesc = kmalloc(alloc_len, GFP_DMA | flags);
|
||||
if (!edesc) {
|
||||
talitos_unmap_sg_chain(dev, assoc, DMA_TO_DEVICE);
|
||||
if (assoc_chained)
|
||||
talitos_unmap_sg_chain(dev, assoc, DMA_TO_DEVICE);
|
||||
else if (assoclen)
|
||||
dma_unmap_sg(dev, assoc,
|
||||
assoc_nents ? assoc_nents - 1 : 1,
|
||||
DMA_TO_DEVICE);
|
||||
|
||||
if (iv_dma)
|
||||
dma_unmap_single(dev, iv_dma, ivsize, DMA_TO_DEVICE);
|
||||
|
||||
dev_err(dev, "could not allocate edescriptor\n");
|
||||
return ERR_PTR(-ENOMEM);
|
||||
}
|
||||
|
@ -1197,7 +1207,7 @@ static struct talitos_edesc *talitos_edesc_alloc(struct device *dev,
|
|||
}
|
||||
|
||||
static struct talitos_edesc *aead_edesc_alloc(struct aead_request *areq, u8 *iv,
|
||||
int icv_stashing)
|
||||
int icv_stashing, bool encrypt)
|
||||
{
|
||||
struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
|
||||
struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
|
||||
|
@ -1206,7 +1216,7 @@ static struct talitos_edesc *aead_edesc_alloc(struct aead_request *areq, u8 *iv,
|
|||
return talitos_edesc_alloc(ctx->dev, areq->assoc, areq->src, areq->dst,
|
||||
iv, areq->assoclen, areq->cryptlen,
|
||||
ctx->authsize, ivsize, icv_stashing,
|
||||
areq->base.flags);
|
||||
areq->base.flags, encrypt);
|
||||
}
|
||||
|
||||
static int aead_encrypt(struct aead_request *req)
|
||||
|
@ -1216,7 +1226,7 @@ static int aead_encrypt(struct aead_request *req)
|
|||
struct talitos_edesc *edesc;
|
||||
|
||||
/* allocate extended descriptor */
|
||||
edesc = aead_edesc_alloc(req, req->iv, 0);
|
||||
edesc = aead_edesc_alloc(req, req->iv, 0, true);
|
||||
if (IS_ERR(edesc))
|
||||
return PTR_ERR(edesc);
|
||||
|
||||
|
@ -1239,7 +1249,7 @@ static int aead_decrypt(struct aead_request *req)
|
|||
req->cryptlen -= authsize;
|
||||
|
||||
/* allocate extended descriptor */
|
||||
edesc = aead_edesc_alloc(req, req->iv, 1);
|
||||
edesc = aead_edesc_alloc(req, req->iv, 1, false);
|
||||
if (IS_ERR(edesc))
|
||||
return PTR_ERR(edesc);
|
||||
|
||||
|
@ -1285,7 +1295,7 @@ static int aead_givencrypt(struct aead_givcrypt_request *req)
|
|||
struct talitos_edesc *edesc;
|
||||
|
||||
/* allocate extended descriptor */
|
||||
edesc = aead_edesc_alloc(areq, req->giv, 0);
|
||||
edesc = aead_edesc_alloc(areq, req->giv, 0, true);
|
||||
if (IS_ERR(edesc))
|
||||
return PTR_ERR(edesc);
|
||||
|
||||
|
@ -1441,7 +1451,7 @@ static int common_nonsnoop(struct talitos_edesc *edesc,
|
|||
}
|
||||
|
||||
static struct talitos_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request *
|
||||
areq)
|
||||
areq, bool encrypt)
|
||||
{
|
||||
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
||||
struct talitos_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
||||
|
@ -1449,7 +1459,7 @@ static struct talitos_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request *
|
|||
|
||||
return talitos_edesc_alloc(ctx->dev, NULL, areq->src, areq->dst,
|
||||
areq->info, 0, areq->nbytes, 0, ivsize, 0,
|
||||
areq->base.flags);
|
||||
areq->base.flags, encrypt);
|
||||
}
|
||||
|
||||
static int ablkcipher_encrypt(struct ablkcipher_request *areq)
|
||||
|
@ -1459,7 +1469,7 @@ static int ablkcipher_encrypt(struct ablkcipher_request *areq)
|
|||
struct talitos_edesc *edesc;
|
||||
|
||||
/* allocate extended descriptor */
|
||||
edesc = ablkcipher_edesc_alloc(areq);
|
||||
edesc = ablkcipher_edesc_alloc(areq, true);
|
||||
if (IS_ERR(edesc))
|
||||
return PTR_ERR(edesc);
|
||||
|
||||
|
@ -1476,7 +1486,7 @@ static int ablkcipher_decrypt(struct ablkcipher_request *areq)
|
|||
struct talitos_edesc *edesc;
|
||||
|
||||
/* allocate extended descriptor */
|
||||
edesc = ablkcipher_edesc_alloc(areq);
|
||||
edesc = ablkcipher_edesc_alloc(areq, false);
|
||||
if (IS_ERR(edesc))
|
||||
return PTR_ERR(edesc);
|
||||
|
||||
|
@ -1628,7 +1638,7 @@ static struct talitos_edesc *ahash_edesc_alloc(struct ahash_request *areq,
|
|||
struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
|
||||
|
||||
return talitos_edesc_alloc(ctx->dev, NULL, req_ctx->psrc, NULL, NULL, 0,
|
||||
nbytes, 0, 0, 0, areq->base.flags);
|
||||
nbytes, 0, 0, 0, areq->base.flags, false);
|
||||
}
|
||||
|
||||
static int ahash_init(struct ahash_request *areq)
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue