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drm/i915|intel-gtt: consolidate intel-gtt.h headers 

... and a few other defines.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Daniel Vetter 2010-11-05 18:04:52 +01:00 committed by Chris Wilson
parent ff26860fb5
commit 23ed992a5e
4 changed files with 12 additions and 26 deletions
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5
drivers/char/agp/intel-gtt.c
View File

@ -24,7 +24,6 @@
#include <asm/smp.h>
#include "agp.h"
#include "intel-agp.h"
#include <linux/intel-gtt.h>
#include <drm/intel-gtt.h>
/*
@ -39,10 +38,6 @@
#define USE_PCI_DMA_API 0
#endif
#define AGP_DCACHE_MEMORY 1
#define AGP_PHYS_MEMORY 2
#define INTEL_AGP_CACHED_MEMORY 3
struct intel_gtt_driver {
unsigned int gen : 8;
unsigned int is_g33 : 1;

1
drivers/gpu/drm/i915/i915_gem.c
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@ -34,7 +34,6 @@
#include <linux/slab.h>
#include <linux/swap.h>
#include <linux/pci.h>
#include <linux/intel-gtt.h>
struct change_domains {
uint32_t invalidate_domains;

12
include/drm/intel-gtt.h
View File

@ -13,5 +13,17 @@ const struct intel_gtt {
unsigned int gtt_mappable_entries;
} *intel_gtt_get(void);
/* Special gtt memory types */
#define AGP_DCACHE_MEMORY 1
#define AGP_PHYS_MEMORY 2
/* New caching attributes for gen6/sandybridge */
#define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)
#define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)
/* flag for GFDT type */
#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
#endif

20
include/linux/intel-gtt.h
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@ -1,20 +0,0 @@
/*
* Common Intel AGPGART and GTT definitions.
*/
#ifndef _INTEL_GTT_H
#define _INTEL_GTT_H
#include <linux/agp_backend.h>
/* This is for Intel only GTT controls.
*
* Sandybridge: AGP_USER_CACHED_MEMORY default to LLC only
*/
#define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)
#define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)
/* flag for GFDT type */
#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
#endif