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clk: rockchip: Add clock controller support for RV1126 SoC
Clock & Reset Unit (CRU) in RV1126 support clocks for CRU and CRU_PMU blocks. This patch is trying to add minimal Clock-Architecture Diagram's inferred from [1] authored by Finley Xiao. [1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/clk/rockchip/clk-rv1126.c Cc: linux-clk@vger.kernel.org Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20220915163947.1922183-5-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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4 changed files with 1165 additions and 0 deletions
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@ -23,6 +23,13 @@ config CLK_RV110X
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help
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help
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Build the driver for RV110x Clock Driver.
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Build the driver for RV110x Clock Driver.
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config CLK_RV1126
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bool "Rockchip RV1126 clock controller support"
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depends on ARM || COMPILE_TEST
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default y
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help
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Build the driver for RV1126 Clock Driver.
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config CLK_RK3036
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config CLK_RK3036
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bool "Rockchip RK3036 clock controller support"
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bool "Rockchip RK3036 clock controller support"
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depends on ARM || COMPILE_TEST
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depends on ARM || COMPILE_TEST
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@ -17,6 +17,7 @@ clk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o
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obj-$(CONFIG_CLK_PX30) += clk-px30.o
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obj-$(CONFIG_CLK_PX30) += clk-px30.o
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obj-$(CONFIG_CLK_RV110X) += clk-rv1108.o
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obj-$(CONFIG_CLK_RV110X) += clk-rv1108.o
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obj-$(CONFIG_CLK_RV1126) += clk-rv1126.o
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obj-$(CONFIG_CLK_RK3036) += clk-rk3036.o
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obj-$(CONFIG_CLK_RK3036) += clk-rk3036.o
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obj-$(CONFIG_CLK_RK312X) += clk-rk3128.o
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obj-$(CONFIG_CLK_RK312X) += clk-rk3128.o
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obj-$(CONFIG_CLK_RK3188) += clk-rk3188.o
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obj-$(CONFIG_CLK_RK3188) += clk-rk3188.o
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1138
drivers/clk/rockchip/clk-rv1126.c
Normal file
1138
drivers/clk/rockchip/clk-rv1126.c
Normal file
File diff suppressed because it is too large
Load diff
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@ -79,6 +79,25 @@ struct clk;
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#define RV1108_EMMC_CON0 0x1e8
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#define RV1108_EMMC_CON0 0x1e8
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#define RV1108_EMMC_CON1 0x1ec
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#define RV1108_EMMC_CON1 0x1ec
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#define RV1126_PMU_MODE 0x0
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#define RV1126_PMU_PLL_CON(x) ((x) * 0x4 + 0x10)
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#define RV1126_PMU_CLKSEL_CON(x) ((x) * 0x4 + 0x100)
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#define RV1126_PMU_CLKGATE_CON(x) ((x) * 0x4 + 0x180)
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#define RV1126_PMU_SOFTRST_CON(x) ((x) * 0x4 + 0x200)
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#define RV1126_PLL_CON(x) ((x) * 0x4)
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#define RV1126_MODE_CON 0x90
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#define RV1126_CLKSEL_CON(x) ((x) * 0x4 + 0x100)
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#define RV1126_CLKGATE_CON(x) ((x) * 0x4 + 0x280)
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#define RV1126_SOFTRST_CON(x) ((x) * 0x4 + 0x300)
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#define RV1126_GLB_SRST_FST 0x408
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#define RV1126_GLB_SRST_SND 0x40c
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#define RV1126_SDMMC_CON0 0x440
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#define RV1126_SDMMC_CON1 0x444
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#define RV1126_SDIO_CON0 0x448
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#define RV1126_SDIO_CON1 0x44c
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#define RV1126_EMMC_CON0 0x450
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#define RV1126_EMMC_CON1 0x454
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#define RK2928_PLL_CON(x) ((x) * 0x4)
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#define RK2928_PLL_CON(x) ((x) * 0x4)
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#define RK2928_MODE_CON 0x40
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#define RK2928_MODE_CON 0x40
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#define RK2928_CLKSEL_CON(x) ((x) * 0x4 + 0x44)
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#define RK2928_CLKSEL_CON(x) ((x) * 0x4 + 0x44)
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