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clk: qcom: gcc-msm8976: Set floor ops for SDCC
Just like in case of other SoCs change SDCC1/SDCC2 ops to floor to avoid overclocking controller. This commit only sets SDCC1/SDCC2 which are used for EMMC/SDCARD. Leave SDCC3 because on this platform it's mostly used for WIFI/BT chips, like on Sony Loire familly devices. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220426073048.11509-2-a39.skl@gmail.com
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parent
4ac7e878c1
commit
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1 changed files with 3 additions and 3 deletions
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@ -1486,7 +1486,7 @@ static const struct clk_init_data sdcc1_apps_clk_src_8976v1_1_init = {
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.name = "sdcc1_apps_clk_src",
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.parent_data = gcc_parent_data_v1_1,
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.num_parents = ARRAY_SIZE(gcc_parent_data_v1_1),
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_floor_ops,
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};
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static struct clk_rcg2 sdcc1_apps_clk_src = {
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@ -1499,7 +1499,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
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.name = "sdcc1_apps_clk_src",
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.parent_data = gcc_parent_data_1,
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.num_parents = ARRAY_SIZE(gcc_parent_data_1),
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_floor_ops,
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},
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};
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@ -1547,7 +1547,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = {
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.name = "sdcc2_apps_clk_src",
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.parent_data = gcc_parent_data_4_8,
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.num_parents = ARRAY_SIZE(gcc_parent_data_4_8),
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_floor_ops,
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},
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};
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