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STM32 DT updates for v5.13, round 1

Browse source 
Highlights:
 ----------
 
 MCU part:
 
  -Add stm32h750 SoC support. It is based on stm32h743 and embeds
   crypto IPs and 2 ADC.
  -Add new art-pi board based on stm32h750. This board embeds:
   -8MB QSPI flash.
   -16MB SPI flash.
   -32MB SDRAM.
   -AP6212 combo (wifi/bt/fm).
 
 MPU part:
  -Use dedicated PTP clock for Ethernet controller on stm32mp151.
  -Enable i2c analog filter on stm32mp151.
 
  -DH:
   -Update GPIO names.
   -Enable crc1 & crryp1 on DHSOM.
 
  -Engicam: add new boards support:
   -MicroGEA SOM which embeds STM32MP157aac, 512 MB Nand Flash
    I2S.
   -MicroGEA STM32MP1 Microdev 2.0 which embeds MicroGEA SOM,
    Ethernet up to 100 Mbps, USB typeA, microSD, UMTS LTE, Wifi/BT
    LVDS panel connector.
   -MicroGEA STM32MP1 MicroDev 2.0 7" which embeds a MicroGEA STM32MP1
    MicroDev 2.0 plus 7" Open Frame panel solution (7" AUO B101AW03 LVDS panel
    and EDT DT5526 Touch)
   -i.Core STM32MP1 EDIMM SoM based on STM32MP157A.
   -C.TOUCH 2.0 n EDIMM compliant general purpose Carrier board with capacitive
    touch interface support based on i.Core STM32MP1 EDIMM SoM.
    It embeds ETH 10/100, wifi/bt, CAN, USB TypeA/OTG, LVDS pannel connector.
   -EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation
    Board based on i.Core STM32MP1 EDIMM SoM. IT embeds LCD 7" C.Touch,
    wifi/bt,2*LVDS FHD, 3*USB2, 1*USB3 ...
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmBlvOMdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIXF+A//RVfPTfCAttVnssRI
 KDFnN6qWYkJkCQ9Ffam+0ZbuJLbLwIoYJy/Anynv3ua5DcBsatmkgjB6C9fOUFJx
 pbtbv0hq8wakjv/T4bowoAO/dtliJocNQp6eosOIR8jwnfyI2XRLVMEYvF2S/6YO
 LP0diyoy+2GefHCDykUf2ACPaHPP8ouD21TNDwcvqLhgPk35gYSV1leMueBdC6Y4
 zRRQFw1ffHMprKZ79xlJ8f79EK5pmAA2Ap+dWqJ8o2C+M0bto+pGxDpHb+Y69JYj
 AhLUvevcHzvaOSy5yuz+80jP3v6zC2MOJ+EFvSswJTA3D5lam61QVTDh/fP5wQpz
 ddvYMUPDk6gtM1uA2AQlDU+Y8jTvbnm7iugixactKanBEI5W5gfyGtPRQ1SKvmb0
 49PzCuhXHLk2Jxx5NeowXZb6xnpgQGBFZAHoCih+A/Do7UUYOBI6+YEKca0l1SnS
 ALks/bdzTxv62sNUSAGdbFLhYXd+PP5YQg/0OQxrw1HJhr1tEBpotrMBkwGQmQvF
 3s5vaz65rdSs7dJfmEn/MhxQyYTrvDYsO02sh2DEtsAGfJcCjOcJAsyU2PKrJb7j
 i+bqgTl0SCNk8m+nrNtYX97wNtoAVBaaRvvc9s3e6CvMaVmlX52u1pnGnlPzcJ4g
 bu+Rq3TiYWku/PWZTWIymo97+9g=
 =+l6P
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.13, round 1

Highlights:
----------

MCU part:

 -Add stm32h750 SoC support. It is based on stm32h743 and embeds
  crypto IPs and 2 ADC.
 -Add new art-pi board based on stm32h750. This board embeds:
  -8MB QSPI flash.
  -16MB SPI flash.
  -32MB SDRAM.
  -AP6212 combo (wifi/bt/fm).

MPU part:
 -Use dedicated PTP clock for Ethernet controller on stm32mp151.
 -Enable i2c analog filter on stm32mp151.

 -DH:
  -Update GPIO names.
  -Enable crc1 & crryp1 on DHSOM.

 -Engicam: add new boards support:
  -MicroGEA SOM which embeds STM32MP157aac, 512 MB Nand Flash
   I2S.
  -MicroGEA STM32MP1 Microdev 2.0 which embeds MicroGEA SOM,
   Ethernet up to 100 Mbps, USB typeA, microSD, UMTS LTE, Wifi/BT
   LVDS panel connector.
  -MicroGEA STM32MP1 MicroDev 2.0 7" which embeds a MicroGEA STM32MP1
   MicroDev 2.0 plus 7" Open Frame panel solution (7" AUO B101AW03 LVDS panel
   and EDT DT5526 Touch)
  -i.Core STM32MP1 EDIMM SoM based on STM32MP157A.
  -C.TOUCH 2.0 n EDIMM compliant general purpose Carrier board with capacitive
   touch interface support based on i.Core STM32MP1 EDIMM SoM.
   It embeds ETH 10/100, wifi/bt, CAN, USB TypeA/OTG, LVDS pannel connector.
  -EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation
   Board based on i.Core STM32MP1 EDIMM SoM. IT embeds LCD 7" C.Touch,
   wifi/bt,2*LVDS FHD, 3*USB2, 1*USB3 ...

* tag 'stm32-dt-for-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (26 commits)
  ARM: dts: stm32: Add PTP clock to Ethernet controller
  ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOM
  ARM: dts: stm32: Update GPIO line names on PicoITX
  ARM: dts: stm32: Update GPIO line names on DRC02
  ARM: dts: stm32: Fill GPIO line names on AV96
  ARM: dts: stm32: Fill GPIO line names on DHCOM SoM
  dt-bindings: serial: stm32: Use 'type: object' instead of false for 'additionalProperties'
  ARM: stm32: Add a new SoC - STM32H750
  ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
  ARM: dts: stm32: fix i2c node typo in stm32h743
  ARM: dts: stm32: add new instances for stm32h743 MCU
  ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
  dt-bindings: arm: stm32: Add compatible strings for ART-PI board
  Documentation: arm: stm32: Add stm32h750 value line doc
  ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151
  ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
  dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
  ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
  ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM
  dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
  ...

Link: https://lore.kernel.org/r/48784f53-943b-0baf-d4a0-fcb7d3849b00@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-04-01 21:47:19 +02:00
commit 24eab7796e
29 changed files with 1551 additions and 326 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
Documentation/arm/index.rst
View file

@ -52,6 +52,7 @@ SoC-specific documents
stm32/stm32f746-overview
stm32/overview
stm32/stm32h743-overview
stm32/stm32h750-overview
stm32/stm32f769-overview
stm32/stm32f429-overview
stm32/stm32mp157-overview

34
Documentation/arm/stm32/stm32h750-overview.rst Normal file
View file

@ -0,0 +1,34 @@
==================
STM32H750 Overview
==================
Introduction
------------
The STM32H750 is a Cortex-M7 MCU aimed at various applications.
It features:
- Cortex-M7 core running up to @480MHz
- 128K internal flash, 1MBytes internal RAM
- FMC controller to connect SDRAM, NOR and NAND memories
- Dual mode QSPI
- SD/MMC/SDIO support
- Ethernet controller
- USB OTFG FS & HS controllers
- I2C, SPI, CAN busses support
- Several 16 & 32 bits general purpose timers
- Serial Audio interface
- LCD controller
- HDMI-CEC
- SPDIFRX
- DFSDM
Resources
---------
Datasheet and reference manual are publicly available on ST website (STM32H750_).
.. _STM32H750: https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html
:Authors: Dillon Min <dillon.minfei@gmail.com>

21
Documentation/devicetree/bindings/arm/stm32/stm32.yaml
View file

@ -51,6 +51,10 @@ properties:
- st,stm32h743i-disco
- st,stm32h743i-eval
- const: st,stm32h743
- items:
- enum:
- st,stm32h750i-art-pi
- const: st,stm32h750
- items:
- enum:
- shiratech,stm32mp157a-iot-box # IoT Box
@ -64,6 +68,23 @@ properties:
- const: st,stm32mp157c-ev1
- const: st,stm32mp157c-ed1
- const: st,stm32mp157
- description: Engicam i.Core STM32MP1 SoM based Boards
items:
- enum:
- engicam,icore-stm32mp1-ctouch2 # STM32MP1 Engicam i.Core STM32MP1 C.TOUCH 2.0
- engicam,icore-stm32mp1-edimm2.2 # STM32MP1 Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
- const: engicam,icore-stm32mp1 # STM32MP1 Engicam i.Core STM32MP1 SoM
- const: st,stm32mp157
- description: Engicam MicroGEA STM32MP1 SoM based Boards
items:
- enum:
- engicam,microgea-stm32mp1-microdev2.0
- engicam,microgea-stm32mp1-microdev2.0-of7
- const: engicam,microgea-stm32mp1
- const: st,stm32mp157
- description: Octavo OSD32MP15x System-in-Package based boards
items:
- enum:

3
Documentation/devicetree/bindings/serial/st,stm32-uart.yaml
View file

@ -80,7 +80,8 @@ required:
- interrupts
- clocks
additionalProperties: false
additionalProperties:
type: object
examples:
- |

5
arch/arm/boot/dts/Makefile
View file

@ -1072,11 +1072,16 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32746g-eval.dtb \
stm32h743i-eval.dtb \
stm32h743i-disco.dtb \
stm32h750i-art-pi.dtb \
stm32mp153c-dhcom-drc02.dtb \
stm32mp157a-avenger96.dtb \
stm32mp157a-dhcor-avenger96.dtb \
stm32mp157a-dk1.dtb \
stm32mp157a-iot-box.dtb \
stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \
stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \
stm32mp157a-icore-stm32mp1-ctouch2.dtb \
stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
stm32mp157a-stinger96.dtb \
stm32mp157c-dhcom-pdk2.dtb \
stm32mp157c-dhcom-picoitx.dtb \

275
arch/arm/boot/dts/stm32h7-pinctrl.dtsi Normal file
View file

@ -0,0 +1,275 @@
/*
* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */
<STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */
bias-disable;
drive-open-drain;
slew-rate = <0>;
};
};
ethernet_rmii: rmii-0 {
pins {
pinmux = <STM32_PINMUX('G', 11, AF11)>,
<STM32_PINMUX('G', 13, AF11)>,
<STM32_PINMUX('G', 12, AF11)>,
<STM32_PINMUX('C', 4, AF11)>,
<STM32_PINMUX('C', 5, AF11)>,
<STM32_PINMUX('A', 7, AF11)>,
<STM32_PINMUX('C', 1, AF11)>,
<STM32_PINMUX('A', 2, AF11)>,
<STM32_PINMUX('A', 1, AF11)>;
slew-rate = <2>;
};
};
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-push-pull;
bias-disable;
};
};
sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
slew-rate = <3>;
drive-push-pull;
bias-disable;
};
pins2{
pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-open-drain;
bias-disable;
};
};
sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
<STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
};
};
sdmmc1_dir_pins_a: sdmmc1-dir-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
<STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
slew-rate = <3>;
drive-push-pull;
bias-pull-up;
};
pins2{
pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
bias-pull-up;
};
};
sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
<STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
<STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */
};
};
sdmmc2_b4_pins_a: sdmmc2-b4-0 {
pins {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC1_D0 */
<STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */
<STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */
<STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */
<STM32_PINMUX('D', 6, AF11)>, /* SDMMC1_CK */
<STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-push-pull;
bias-disable;
};
};
sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */
<STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */
<STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */
<STM32_PINMUX('D', 6, AF11)>; /* SDMMC1_CK */
slew-rate = <3>;
drive-push-pull;
bias-disable;
};
pins2{
pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-open-drain;
bias-disable;
};
};
sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC1_D0 */
<STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC1_D1 */
<STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC1_D2 */
<STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC1_D3 */
<STM32_PINMUX('D', 6, ANALOG)>, /* SDMMC1_CK */
<STM32_PINMUX('D', 7, ANALOG)>; /* SDMMC1_CMD */
};
};
spi1_pins: spi1-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 5, AF5)>,
/* SPI1_CLK */
<STM32_PINMUX('B', 5, AF5)>;
/* SPI1_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <2>;
};
pins2 {
pinmux = <STM32_PINMUX('G', 9, AF5)>;
/* SPI1_MISO */
bias-disable;
};
};
uart4_pins: uart4-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('I', 9, AF8)>; /* UART4_RX */
bias-disable;
};
};
usart1_pins: usart1-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */
bias-disable;
};
};
usart2_pins: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
bias-disable;
};
};
usart3_pins: usart3-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
<STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
<STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
bias-disable;
};
};
usbotg_hs_pins_a: usbotg-hs-0 {
pins {
pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */
<STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */
<STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */
<STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */
<STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */
<STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */
<STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */
<STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */
<STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */
<STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */
<STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */
<STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */
bias-disable;
drive-push-pull;
slew-rate = <2>;
};
};
};

306
arch/arm/boot/dts/stm32h743-pinctrl.dtsi
View file

@ -1,306 +0,0 @@
/*
* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
/ {
soc {
pin-controller {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,stm32h743-pinctrl";
ranges = <0 0x58020000 0x3000>;
interrupt-parent = <&exti>;
st,syscfg = <&syscfg 0x8>;
pins-are-numbered;
gpioa: gpio@58020000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x0 0x400>;
clocks = <&rcc GPIOA_CK>;
st,bank-name = "GPIOA";
interrupt-controller;
#interrupt-cells = <2>;
};
gpiob: gpio@58020400 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x400 0x400>;
clocks = <&rcc GPIOB_CK>;
st,bank-name = "GPIOB";
interrupt-controller;
#interrupt-cells = <2>;
};
gpioc: gpio@58020800 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x800 0x400>;
clocks = <&rcc GPIOC_CK>;
st,bank-name = "GPIOC";
interrupt-controller;
#interrupt-cells = <2>;
};
gpiod: gpio@58020c00 {
gpio-controller;
#gpio-cells = <2>;
reg = <0xc00 0x400>;
clocks = <&rcc GPIOD_CK>;
st,bank-name = "GPIOD";
interrupt-controller;
#interrupt-cells = <2>;
};
gpioe: gpio@58021000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x1000 0x400>;
clocks = <&rcc GPIOE_CK>;
st,bank-name = "GPIOE";
interrupt-controller;
#interrupt-cells = <2>;
};
gpiof: gpio@58021400 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x1400 0x400>;
clocks = <&rcc GPIOF_CK>;
st,bank-name = "GPIOF";
interrupt-controller;
#interrupt-cells = <2>;
};
gpiog: gpio@58021800 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x1800 0x400>;
clocks = <&rcc GPIOG_CK>;
st,bank-name = "GPIOG";
interrupt-controller;
#interrupt-cells = <2>;
};
gpioh: gpio@58021c00 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x1c00 0x400>;
clocks = <&rcc GPIOH_CK>;
st,bank-name = "GPIOH";
interrupt-controller;
#interrupt-cells = <2>;
};
gpioi: gpio@58022000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x2000 0x400>;
clocks = <&rcc GPIOI_CK>;
st,bank-name = "GPIOI";
interrupt-controller;
#interrupt-cells = <2>;
};
gpioj: gpio@58022400 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x2400 0x400>;
clocks = <&rcc GPIOJ_CK>;
st,bank-name = "GPIOJ";
interrupt-controller;
#interrupt-cells = <2>;
};
gpiok: gpio@58022800 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x2800 0x400>;
clocks = <&rcc GPIOK_CK>;
st,bank-name = "GPIOK";
interrupt-controller;
#interrupt-cells = <2>;
};
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */
<STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */
bias-disable;
drive-open-drain;
slew-rate = <0>;
};
};
ethernet_rmii: rmii-0 {
pins {
pinmux = <STM32_PINMUX('G', 11, AF11)>,
<STM32_PINMUX('G', 13, AF11)>,
<STM32_PINMUX('G', 12, AF11)>,
<STM32_PINMUX('C', 4, AF11)>,
<STM32_PINMUX('C', 5, AF11)>,
<STM32_PINMUX('A', 7, AF11)>,
<STM32_PINMUX('C', 1, AF11)>,
<STM32_PINMUX('A', 2, AF11)>,
<STM32_PINMUX('A', 1, AF11)>;
slew-rate = <2>;
};
};
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-push-pull;
bias-disable;
};
};
sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
slew-rate = <3>;
drive-push-pull;
bias-disable;
};
pins2{
pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-open-drain;
bias-disable;
};
};
sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
<STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
};
};
sdmmc1_dir_pins_a: sdmmc1-dir-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
<STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
slew-rate = <3>;
drive-push-pull;
bias-pull-up;
};
pins2{
pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
bias-pull-up;
};
};
sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
<STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
<STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */
};
};
usart1_pins: usart1-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */
bias-disable;
};
};
usart2_pins: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
bias-disable;
};
};
usbotg_hs_pins_a: usbotg-hs-0 {
pins {
pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */
<STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */
<STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */
<STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */
<STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */
<STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */
<STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */
<STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */
<STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */
<STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */
<STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */
<STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */
bias-disable;
drive-push-pull;
slew-rate = <2>;
};
};
};
};
};

177
arch/arm/boot/dts/stm32h743.dtsi
View file

@ -135,6 +135,22 @@ usart2: serial@40004400 {
clocks = <&rcc USART2_CK>;
};
usart3: serial@40004800 {
compatible = "st,stm32h7-uart";
reg = <0x40004800 0x400>;
interrupts = <39>;
status = "disabled";
clocks = <&rcc USART3_CK>;
};
uart4: serial@40004c00 {
compatible = "st,stm32h7-uart";
reg = <0x40004c00 0x400>;
interrupts = <52>;
status = "disabled";
clocks = <&rcc UART4_CK>;
};
i2c1: i2c@40005400 {
compatible = "st,stm32f7-i2c";
#address-cells = <1>;
@ -159,7 +175,7 @@ i2c2: i2c@40005800 {
status = "disabled";
};
i2c3: i2c@40005C00 {
i2c3: i2c@40005c00 {
compatible = "st,stm32f7-i2c";
#address-cells = <1>;
#size-cells = <0>;
@ -368,6 +384,21 @@ sdmmc1: mmc@52007000 {
max-frequency = <120000000>;
};
sdmmc2: mmc@48022400 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x10153180>;
reg = <0x48022400 0x400>;
interrupts = <124>;
interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC2_CK>;
clock-names = "apb_pclk";
resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <120000000>;
status = "disabled";
};
exti: interrupt-controller@58000000 {
compatible = "st,stm32h7-exti";
interrupt-controller;
@ -392,7 +423,7 @@ spi6: spi@58001400 {
status = "disabled";
};
i2c4: i2c@58001C00 {
i2c4: i2c@58001c00 {
compatible = "st,stm32f7-i2c";
#address-cells = <1>;
#size-cells = <0>;
@ -555,6 +586,148 @@ mac: ethernet@40028000 {
snps,pbl = <8>;
status = "disabled";
};
pinctrl: pin-controller@58020000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,stm32h743-pinctrl";
ranges = <0 0x58020000 0x3000>;
interrupt-parent = <&exti>;
st,syscfg = <&syscfg 0x8>;
pins-are-numbered;
gpioa: gpio@58020000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x0 0x400>;
clocks = <&rcc GPIOA_CK>;
st,bank-name = "GPIOA";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 0 16>;
};
gpiob: gpio@58020400 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x400 0x400>;
clocks = <&rcc GPIOB_CK>;
st,bank-name = "GPIOB";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 16 16>;
};
gpioc: gpio@58020800 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x800 0x400>;
clocks = <&rcc GPIOC_CK>;
st,bank-name = "GPIOC";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 32 16>;
};
gpiod: gpio@58020c00 {
gpio-controller;
#gpio-cells = <2>;
reg = <0xc00 0x400>;
clocks = <&rcc GPIOD_CK>;
st,bank-name = "GPIOD";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 48 16>;
};
gpioe: gpio@58021000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x1000 0x400>;
clocks = <&rcc GPIOE_CK>;
st,bank-name = "GPIOE";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 64 16>;
};
gpiof: gpio@58021400 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x1400 0x400>;
clocks = <&rcc GPIOF_CK>;
st,bank-name = "GPIOF";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 80 16>;
};
gpiog: gpio@58021800 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x1800 0x400>;
clocks = <&rcc GPIOG_CK>;
st,bank-name = "GPIOG";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 96 16>;
};
gpioh: gpio@58021c00 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x1c00 0x400>;
clocks = <&rcc GPIOH_CK>;
st,bank-name = "GPIOH";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 112 16>;
};
gpioi: gpio@58022000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x2000 0x400>;
clocks = <&rcc GPIOI_CK>;
st,bank-name = "GPIOI";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 128 16>;
};
gpioj: gpio@58022400 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x2400 0x400>;
clocks = <&rcc GPIOJ_CK>;
st,bank-name = "GPIOJ";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 144 16>;
};
gpiok: gpio@58022800 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x2800 0x400>;
clocks = <&rcc GPIOK_CK>;
st,bank-name = "GPIOK";
interrupt-controller;
#interrupt-cells = <2>;
ngpios = <8>;
gpio-ranges = <&pinctrl 0 160 8>;
};
};
};
};

2
arch/arm/boot/dts/stm32h743i-disco.dts
View file

@ -42,7 +42,7 @@
/dts-v1/;
#include "stm32h743.dtsi"
#include "stm32h743-pinctrl.dtsi"
#include "stm32h7-pinctrl.dtsi"
/ {
model = "STMicroelectronics STM32H743i-Discovery board";

2
arch/arm/boot/dts/stm32h743i-eval.dts
View file

@ -42,7 +42,7 @@
/dts-v1/;
#include "stm32h743.dtsi"
#include "stm32h743-pinctrl.dtsi"
#include "stm32h7-pinctrl.dtsi"
/ {
model = "STMicroelectronics STM32H743i-EVAL board";

6
arch/arm/boot/dts/stm32h750.dtsi Normal file
View file

@ -0,0 +1,6 @@
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
/* Copyright (C) STMicroelectronics 2021 - All Rights Reserved */
#include "stm32h743.dtsi"

229
arch/arm/boot/dts/stm32h750i-art-pi.dts Normal file
View file

@ -0,0 +1,229 @@
/*
* Copyright 2021 - Dillon Min <dillon.minfei@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* For art-pi board resources, you can refer to link:
* https://art-pi.gitee.io/website/
*/
/dts-v1/;
#include "stm32h750.dtsi"
#include "stm32h7-pinctrl.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "RT-Thread STM32H750i-ART-PI board";
compatible = "st,stm32h750i-art-pi", "st,stm32h750";
chosen {
bootargs = "root=/dev/ram";
stdout-path = "serial0:2000000n8";
};
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x2000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
no-map;
size = <0x100000>;
linux,dma-default;
};
};
aliases {
serial0 = &uart4;
serial1 = &usart3;
};
leds {
compatible = "gpio-leds";
led-red {
gpios = <&gpioi 8 0>;
};
led-green {
gpios = <&gpioc 15 0>;
linux,default-trigger = "heartbeat";
};
};
v3v3: regulator-v3v3 {
compatible = "regulator-fixed";
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
wlan_pwr: regulator-wlan {
compatible = "regulator-fixed";
regulator-name = "wl-reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&clk_hse {
clock-frequency = <25000000>;
};
&dma1 {
status = "okay";
};
&dma2 {
status = "okay";
};
&mac {
status = "disabled";
pinctrl-0 = <&ethernet_rmii>;
pinctrl-names = "default";
phy-mode = "rmii";
phy-handle = <&phy0>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
broken-cd;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&v3v3>;
status = "okay";
};
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a>;
pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
broken-cd;
non-removable;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&wlan_pwr>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_pins>;
pinctrl-names = "default";
cs-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;
dmas = <&dmamux1 37 0x400 0x05>,
<&dmamux1 38 0x400 0x05>;
dma-names = "rx", "tx";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q128", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
partition@0 {
label = "root filesystem";
reg = <0 0x1000000>;
};
};
};
&usart2 {
pinctrl-0 = <&usart2_pins>;
pinctrl-names = "default";
status = "disabled";
};
&usart3 {
pinctrl-names = "default";
pinctrl-0 = <&usart3_pins>;
dmas = <&dmamux1 45 0x400 0x05>,
<&dmamux1 46 0x400 0x05>;
dma-names = "rx", "tx";
st,hw-flow-ctrl;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
host-wakeup-gpios = <&gpioc 0 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
shutdown-gpios = <&gpioi 11 GPIO_ACTIVE_HIGH>;
max-speed = <115200>;
};
};
&uart4 {
pinctrl-0 = <&uart4_pins>;
pinctrl-names = "default";
status = "okay";
};

21
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
View file

@ -1891,10 +1891,15 @@ pins2 {
usart2_idle_pins_c: usart2-idle-2 {
pins1 {
pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
<STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
<STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
};
pins2 {
pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <3>;
};
pins3 {
pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
bias-disable;
};
@ -1940,10 +1945,15 @@ pins2 {
usart3_idle_pins_b: usart3-idle-1 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
<STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
<STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
};
pins2 {
pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
bias-disable;
};
@ -1976,10 +1986,15 @@ pins2 {
usart3_idle_pins_c: usart3-idle-2 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
<STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
<STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
};
pins2 {
pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
bias-disable;
};

8
arch/arm/boot/dts/stm32mp151.dtsi
View file

@ -493,6 +493,7 @@ i2c1: i2c@40012000 {
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x1>;
wakeup-source;
i2c-analog-filter;
status = "disabled";
};
@ -508,6 +509,7 @@ i2c2: i2c@40013000 {
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x2>;
wakeup-source;
i2c-analog-filter;
status = "disabled";
};
@ -523,6 +525,7 @@ i2c3: i2c@40014000 {
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x4>;
wakeup-source;
i2c-analog-filter;
status = "disabled";
};
@ -538,6 +541,7 @@ i2c5: i2c@40015000 {
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x10>;
wakeup-source;
i2c-analog-filter;
status = "disabled";
};
@ -1421,11 +1425,13 @@ ethernet0: ethernet@5800a000 {
"mac-clk-tx",
"mac-clk-rx",
"eth-ck",
"ptp_ref",
"ethstp";
clocks = <&rcc ETHMAC>,
<&rcc ETHTX>,
<&rcc ETHRX>,
<&rcc ETHCK_K>,
<&rcc ETHPTP_K>,
<&rcc ETHSTP>;
st,syscon = <&syscfg 0x4>;
snps,mixed-burst;
@ -1536,6 +1542,7 @@ i2c4: i2c@5c002000 {
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x8>;
wakeup-source;
i2c-analog-filter;
status = "disabled";
};
@ -1573,6 +1580,7 @@ i2c6: i2c@5c009000 {
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x20>;
wakeup-source;
i2c-analog-filter;
status = "disabled";
};

4
arch/arm/boot/dts/stm32mp153c-dhcom-drc02.dts
View file

@ -20,6 +20,10 @@ / {
"st,stm32mp153";
};
&cryp1 {
status = "okay";
};
&m_can1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&m_can1_pins_a>;

47
arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2.dts Normal file
View file

@ -0,0 +1,47 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) STMicroelectronics 2019 - All Rights Reserved
* Copyright (c) 2020 Engicam srl
* Copyright (c) 2020 Amarula Solutons(India)
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp157a-icore-stm32mp1.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Engicam i.Core STM32MP1 C.TOUCH 2.0";
compatible = "engicam,icore-stm32mp1-ctouch2",
"engicam,icore-stm32mp1", "st,stm32mp157";
aliases {
serial0 = &uart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&sdmmc1 {
bus-width = <4>;
disable-wp;
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
st,neg-edge;
vmmc-supply = <&v3v3>;
status = "okay";
};
&uart4 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
status = "okay";
};

47
arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts Normal file
View file

@ -0,0 +1,47 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) STMicroelectronics 2019 - All Rights Reserved
* Copyright (c) 2020 Engicam srl
* Copyright (c) 2020 Amarula Solutons(India)
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp157a-icore-stm32mp1.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit";
compatible = "engicam,icore-stm32mp1-edimm2.2",
"engicam,icore-stm32mp1", "st,stm32mp157";
aliases {
serial0 = &uart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&sdmmc1 {
bus-width = <4>;
disable-wp;
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
st,neg-edge;
vmmc-supply = <&v3v3>;
status = "okay";
};
&uart4 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
status = "okay";
};

196
arch/arm/boot/dts/stm32mp157a-icore-stm32mp1.dtsi Normal file
View file

@ -0,0 +1,196 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) STMicroelectronics 2019 - All Rights Reserved
* Copyright (c) 2020 Engicam srl
* Copyright (c) 2020 Amarula Solutons(India)
*/
/ {
compatible = "engicam,icore-stm32mp1", "st,stm32mp157";
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
mcuram2: mcuram2@10000000 {
compatible = "shared-dma-pool";
reg = <0x10000000 0x40000>;
no-map;
};
vdev0vring0: vdev0vring0@10040000 {
compatible = "shared-dma-pool";
reg = <0x10040000 0x1000>;
no-map;
};
vdev0vring1: vdev0vring1@10041000 {
compatible = "shared-dma-pool";
reg = <0x10041000 0x1000>;
no-map;
};
vdev0buffer: vdev0buffer@10042000 {
compatible = "shared-dma-pool";
reg = <0x10042000 0x4000>;
no-map;
};
mcuram: mcuram@30000000 {
compatible = "shared-dma-pool";
reg = <0x30000000 0x40000>;
no-map;
};
retram: retram@38000000 {
compatible = "shared-dma-pool";
reg = <0x38000000 0x10000>;
no-map;
};
};
vddcore: regulator-vddcore {
compatible = "regulator-fixed";
regulator-name = "vddcore";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
vdd: regulator-vdd {
compatible = "regulator-fixed";
regulator-name = "vdd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_usb: regulator-vdd-usb {
compatible = "regulator-fixed";
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdda: regulator-vdda {
compatible = "regulator-fixed";
regulator-name = "vdda";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_ddr: regulator-vdd-ddr {
compatible = "regulator-fixed";
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
};
vtt_ddr: regulator-vtt-ddr {
compatible = "regulator-fixed";
regulator-name = "vtt_ddr";
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <675000>;
regulator-always-on;
vin-supply = <&vdd>;
};
vref_ddr: regulator-vref-ddr {
compatible = "regulator-fixed";
regulator-name = "vref_ddr";
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <675000>;
regulator-always-on;
vin-supply = <&vdd>;
};
vdd_sd: regulator-vdd-sd {
compatible = "regulator-fixed";
regulator-name = "vdd_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
v3v3: regulator-v3v3 {
compatible = "regulator-fixed";
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
v2v8: regulator-v2v8 {
compatible = "regulator-fixed";
regulator-name = "v2v8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
vin-supply = <&v3v3>;
};
v1v8: regulator-v1v8 {
compatible = "regulator-fixed";
regulator-name = "v1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
vin-supply = <&v3v3>;
};
};
&dts {
status = "okay";
};
&i2c2 {
i2c-scl-falling-time-ns = <20>;
i2c-scl-rising-time-ns = <185>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_pins_a>;
pinctrl-1 = <&i2c2_sleep_pins_a>;
status = "okay";
};
&ipcc {
status = "okay";
};
&iwdg2{
timeout-sec = <32>;
status = "okay";
};
&m4_rproc{
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";
};
&rng1 {
status = "okay";
};
&rtc{
status = "okay";
};
&vrefbuf {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
vdda-supply = <&vdd>;
status = "okay";
};

154
arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts Normal file
View file

@ -0,0 +1,154 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) STMicroelectronics 2019 - All Rights Reserved
* Copyright (c) 2020 Engicam srl
* Copyright (c) 2020 Amarula Solutons(India)
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp157a-microgea-stm32mp1.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 7\" Open Frame";
compatible = "engicam,microgea-stm32mp1-microdev2.0-of7",
"engicam,microgea-stm32mp1", "st,stm32mp157";
aliases {
serial0 = &uart4;
serial1 = &uart8;
};
chosen {
stdout-path = "serial0:115200n8";
};
backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
default-on;
};
lcd_3v3: regulator-lcd-3v3 {
compatible = "regulator-fixed";
regulator-name = "lcd_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpiof 10 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
power-supply = <&panel_pwr>;
};
panel_pwr: regulator-panel-pwr {
compatible = "regulator-fixed";
regulator-name = "panel_pwr";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpiob 10 GPIO_ACTIVE_HIGH>;
regulator-always-on;
};
panel {
compatible = "auo,b101aw03";
backlight = <&backlight>;
enable-gpios = <&gpiof 2 GPIO_ACTIVE_HIGH>;
power-supply = <&lcd_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&ltdc_ep0_out>;
};
};
};
};
&i2c2 {
i2c-scl-falling-time-ns = <20>;
i2c-scl-rising-time-ns = <185>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_pins_a>;
pinctrl-1 = <&i2c2_sleep_pins_a>;
status = "okay";
};
&ltdc {
pinctrl-names = "default";
pinctrl-0 = <&ltdc_pins>;
status = "okay";
port {
ltdc_ep0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_in>;
};
};
};
&pinctrl {
ltdc_pins: ltdc {
pins {
pinmux = <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */
<STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */
<STM32_PINMUX('H', 11, AF14)>, /* LTDC_R5 */
<STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
<STM32_PINMUX('D', 9, AF14)>, /* LTDC_B0 */
<STM32_PINMUX('E', 5, AF14)>, /* LTDC_G0 */
<STM32_PINMUX('E', 6, AF14)>, /* LTDC_G1 */
<STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
<STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
<STM32_PINMUX('G', 7, AF14)>, /* LTDC_CLK */
<STM32_PINMUX('G', 12, AF14)>, /* LTDC_B1 */
<STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */
<STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */
<STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
<STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
<STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
<STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
<STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */
<STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
<STM32_PINMUX('I', 0, AF14)>, /* LTDC_G5 */
<STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
<STM32_PINMUX('I', 2, AF14)>, /* LTDC_G7 */
<STM32_PINMUX('I', 4, AF14)>, /* LTDC_B4 */
<STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
<STM32_PINMUX('B', 8, AF14)>, /* LTDC_B6 */
<STM32_PINMUX('I', 7, AF14)>, /* LTDC_B7 */
<STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
<STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
bias-disable;
drive-push-pull;
slew-rate = <3>;
};
};
};
&sdmmc1 {
bus-width = <4>;
disable-wp;
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
st,neg-edge;
vmmc-supply = <&vdd>;
status = "okay";
};
&uart4 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
status = "okay";
};
/* J31: RS323 */
&uart8 {
pinctrl-names = "default";
pinctrl-0 = <&uart8_pins_a>;
status = "okay";
};

55
arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dts Normal file
View file

@ -0,0 +1,55 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) STMicroelectronics 2019 - All Rights Reserved
* Copyright (c) 2020 Engicam srl
* Copyright (c) 2020 Amarula Solutons(India)
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp157a-microgea-stm32mp1.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 Carrier Board";
compatible = "engicam,microgea-stm32mp1-microdev2.0",
"engicam,microgea-stm32mp1", "st,stm32mp157";
aliases {
serial0 = &uart4;
serial1 = &uart8;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&sdmmc1 {
bus-width = <4>;
disable-wp;
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
st,neg-edge;
vmmc-supply = <&vdd>;
status = "okay";
};
&uart4 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
status = "okay";
};
/* J31: RS323 */
&uart8 {
pinctrl-names = "default";
pinctrl-0 = <&uart8_pins_a>;
status = "okay";
};

148
arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi Normal file
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@ -0,0 +1,148 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) STMicroelectronics 2019 - All Rights Reserved
* Copyright (c) 2020 Engicam srl
* Copyright (c) 2020 Amarula Solutons(India)
*/
/ {
compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x10000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
mcuram2: mcuram2@10000000 {
compatible = "shared-dma-pool";
reg = <0x10000000 0x40000>;
no-map;
};
vdev0vring0: vdev0vring0@10040000 {
compatible = "shared-dma-pool";
reg = <0x10040000 0x1000>;
no-map;
};
vdev0vring1: vdev0vring1@10041000 {
compatible = "shared-dma-pool";
reg = <0x10041000 0x1000>;
no-map;
};
vdev0buffer: vdev0buffer@10042000 {
compatible = "shared-dma-pool";
reg = <0x10042000 0x4000>;
no-map;
};
mcuram: mcuram@30000000 {
compatible = "shared-dma-pool";
reg = <0x30000000 0x40000>;
no-map;
};
retram: retram@38000000 {
compatible = "shared-dma-pool";
reg = <0x38000000 0x10000>;
no-map;
};
};
vin: regulator-vin {
compatible = "regulator-fixed";
regulator-name = "vin";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vddcore: regulator-vddcore {
compatible = "regulator-fixed";
regulator-name = "vddcore";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
vin-supply = <&vin>;
};
vdd: regulator-vdd {
compatible = "regulator-fixed";
regulator-name = "vdd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <&vin>;
};
vddq_ddr: regulator-vddq-ddr {
compatible = "regulator-fixed";
regulator-name = "vddq_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
vin-supply = <&vin>;
};
};
&dts {
status = "okay";
};
&fmc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&fmc_pins_a>;
pinctrl-1 = <&fmc_sleep_pins_a>;
status = "okay";
nand-controller@4,0 {
status = "okay";
nand@0 {
reg = <0>;
nand-on-flash-bbt;
#address-cells = <1>;
#size-cells = <1>;
};
};
};
&ipcc {
status = "okay";
};
&iwdg2{
timeout-sec = <32>;
status = "okay";
};
&m4_rproc{
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";
};
&rng1 {
status = "okay";
};
&rtc{
status = "okay";
};
&vrefbuf {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
vdda-supply = <&vdd>;
status = "okay";
};

4
arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dts
View file

@ -20,6 +20,10 @@ / {
"st,stm32mp157";
};
&cryp1 {
status = "okay";
};
&m_can1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&m_can1_pins_a>;

4
arch/arm/boot/dts/stm32mp157c-dhcom-picoitx.dts
View file

@ -20,6 +20,10 @@ / {
"st,stm32mp157";
};
&cryp1 {
status = "okay";
};
&m_can1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&m_can1_pins_a>;

12
arch/arm/boot/dts/stm32mp15xx-dhcom-drc02.dtsi
View file

@ -43,15 +43,15 @@ rs485-rx-en-hog {
&gpiod {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "", "Out1",
"Out2", "", "", "";
"", "", "DHCOM-B", "",
"", "", "", "DRC02-Out1",
"DRC02-Out2", "", "", "";
};
&gpioi {
gpio-line-names = "In1", "", "", "",
"", "", "", "",
"In2", "", "", "",
gpio-line-names = "DRC02-In1", "DHCOM-O", "DHCOM-H", "DHCOM-I",
"DHCOM-R", "DHCOM-M", "", "",
"DRC02-In2", "", "", "",
"", "", "", "";
/*

12
arch/arm/boot/dts/stm32mp15xx-dhcom-picoitx.dtsi
View file

@ -57,22 +57,22 @@ usb-port-power-hog {
&gpioc {
gpio-line-names = "", "", "", "",
"", "", "In1", "",
"", "", "PicoITX-In1", "",
"", "", "", "",
"", "", "", "";
};
&gpiod {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "", "Out1",
"Out2", "", "", "";
"", "", "DHCOM-B", "",
"", "", "", "PicoITX-Out1",
"PicoITX-Out2", "", "", "";
};
&gpiog {
gpio-line-names = "In2", "", "", "",
"", "", "", "",
gpio-line-names = "PicoITX-In2", "", "", "",
"", "", "", "",
"DHCOM-L", "", "", "",
"", "", "", "";
};

64
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
View file

@ -92,6 +92,10 @@ adc2: adc@100 {
};
};
&crc1 {
status = "okay";
};
&dac {
pinctrl-names = "default";
pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
@ -164,10 +168,70 @@ ksz8851: ks8851mll@1,0 {
};
};
&gpioa {
gpio-line-names = "", "", "", "",
"", "", "DHCOM-K", "",
"", "", "", "",
"", "", "", "";
};
&gpiob {
gpio-line-names = "", "", "", "",
"", "", "", "",
"DHCOM-Q", "", "", "",
"", "", "", "";
};
&gpioc {
gpio-line-names = "", "", "", "",
"", "", "DHCOM-E", "",
"", "", "", "",
"", "", "", "";
status = "okay";
};
&gpiod {
gpio-line-names = "", "", "", "",
"", "", "DHCOM-B", "",
"", "", "", "DHCOM-F",
"DHCOM-D", "", "", "";
};
&gpioe {
gpio-line-names = "", "", "", "",
"", "", "DHCOM-P", "",
"", "", "", "",
"", "", "", "";
};
&gpiof {
gpio-line-names = "", "", "", "DHCOM-A",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpiog {
gpio-line-names = "DHCOM-C", "", "", "",
"", "", "", "",
"DHCOM-L", "", "", "",
"", "", "", "";
};
&gpioh {
gpio-line-names = "", "", "", "",
"", "", "", "DHCOM-N",
"DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U",
"DHCOM-T", "", "DHCOM-S", "";
};
&gpioi {
gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I",
"DHCOM-R", "DHCOM-M", "", "",
"", "", "", "",
"", "", "", "";
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins_a>;

35
arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi
View file

@ -162,6 +162,41 @@ phy0: ethernet-phy@7 {
};
};
&gpioa {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "", "AV96-K",
"AV96-I", "", "AV96-A", "";
};
&gpiob {
gpio-line-names = "", "", "", "",
"", "AV96-J", "", "",
"", "", "", "AV96-B",
"", "AV96-L", "", "";
};
&gpioc {
gpio-line-names = "", "", "", "AV96-C",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpiod {
gpio-line-names = "", "", "", "",
"", "", "", "",
"AV96-D", "", "", "",
"", "", "AV96-E", "AV96-F";
};
&gpiof {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "", "",
"AV96-G", "AV96-H", "", "";
};
&i2c1 { /* X6 I2C1 */
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_b>;

4
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
View file

@ -21,6 +21,10 @@ memory@c0000000 {
};
};
&crc1 {
status = "okay";
};
&dts {
status = "okay";
};

1
arch/arm/mach-stm32/board-dt.c
View file

@ -17,6 +17,7 @@ static const char *const stm32_compat[] __initconst = {
"st,stm32f746",
"st,stm32f769",
"st,stm32h743",
"st,stm32h750",
"st,stm32mp157",
NULL
};