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[POWERPC] spufs: wrap mfc sdr access
SPRN_SDR1 and the SPE's MFC SDR are hypervisor resources and are not accessible from a logical partition. This change adds an access wrapper. When running on bare H/W, the spufs needs to only set the SPE's MFC SDR to the value of the PPE's SPRN_SDR1 once at SPE initialization, so this change renames mfc_sdr_set() to mfc_sdr_setup() and moves the access of SPRN_SDR1 into the mmio wrapper. It also removes the now unneeded member mfc_sdr_RW from struct spu_priv1_collapsed. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> -- Signed-off-by: Paul Mackerras <paulus@samba.org>
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parent
5414c6be57
commit
24f43b33f7
5 changed files with 7 additions and 11 deletions
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@ -805,7 +805,7 @@ static int __init create_spu(struct device_node *spe)
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if (ret)
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goto out_unmap;
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spin_lock_init(&spu->register_lock);
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spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1));
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spu_mfc_sdr_setup(spu);
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spu_mfc_sr1_set(spu, 0x33);
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mutex_lock(&spu_mutex);
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@ -84,9 +84,9 @@ static void mfc_dsisr_set(struct spu *spu, u64 dsisr)
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out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
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}
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static void mfc_sdr_set(struct spu *spu, u64 sdr)
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static void mfc_sdr_setup(struct spu *spu)
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{
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out_be64(&spu->priv1->mfc_sdr_RW, sdr);
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out_be64(&spu->priv1->mfc_sdr_RW, mfspr(SPRN_SDR1));
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}
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static void mfc_sr1_set(struct spu *spu, u64 sr1)
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@ -146,7 +146,7 @@ const struct spu_priv1_ops spu_priv1_mmio_ops =
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.mfc_dar_get = mfc_dar_get,
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.mfc_dsisr_get = mfc_dsisr_get,
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.mfc_dsisr_set = mfc_dsisr_set,
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.mfc_sdr_set = mfc_sdr_set,
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.mfc_sdr_setup = mfc_sdr_setup,
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.mfc_sr1_set = mfc_sr1_set,
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.mfc_sr1_get = mfc_sr1_get,
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.mfc_tclass_id_set = mfc_tclass_id_set,
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@ -2165,9 +2165,6 @@ static void init_priv1(struct spu_state *csa)
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MFC_STATE1_PROBLEM_STATE_MASK |
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MFC_STATE1_RELOCATE_MASK | MFC_STATE1_BUS_TLBIE_MASK;
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/* Set storage description. */
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csa->priv1.mfc_sdr_RW = mfspr(SPRN_SDR1);
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/* Enable OS-specific set of interrupts. */
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csa->priv1.int_mask_class0_RW = CLASS0_ENABLE_DMA_ALIGNMENT_INTR |
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CLASS0_ENABLE_INVALID_DMA_COMMAND_INTR |
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@ -151,7 +151,6 @@ struct spu_priv1_collapsed {
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u64 mfc_fir_chkstp_enable_RW;
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u64 smf_sbi_signal_sel;
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u64 smf_ato_signal_sel;
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u64 mfc_sdr_RW;
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u64 tlb_index_hint_RO;
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u64 tlb_index_W;
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u64 tlb_vpn_RW;
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@ -37,7 +37,7 @@ struct spu_priv1_ops
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u64 (*mfc_dar_get) (struct spu *spu);
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u64 (*mfc_dsisr_get) (struct spu *spu);
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void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
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void (*mfc_sdr_set) (struct spu *spu, u64 sdr);
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void (*mfc_sdr_setup) (struct spu *spu);
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void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
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u64 (*mfc_sr1_get) (struct spu *spu);
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void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id);
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@ -112,9 +112,9 @@ spu_mfc_dsisr_set (struct spu *spu, u64 dsisr)
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}
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static inline void
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spu_mfc_sdr_set (struct spu *spu, u64 sdr)
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spu_mfc_sdr_setup (struct spu *spu)
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{
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spu_priv1_ops->mfc_sdr_set(spu, sdr);
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spu_priv1_ops->mfc_sdr_setup(spu);
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}
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static inline void
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