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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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parisc architecture fixes for kernel v5.17-rc5
- Fix miscompilations when function calls are made from inside a put_user() call - Drop __init from map_pages() declaration to avoid random boot crashes - Added #error messages if a 64-bit compiler was used to build a 32-bit kernel (and vice versa) - Fix out-of-bound data TLB miss faults in sba_iommu and ccio-dma drivers - Add ioread64_lo_hi() and iowrite64_lo_hi() functions to avoid kernel test robot errors - Fix link failure when 8250_gsc driver is built without CONFIG_IOSAPIC -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCYgu/DwAKCRD3ErUQojoP X5+oAP4qsrVJZHrzalqJoGlDHZKGRKH5b9t5JQb09d1XmgFcZgD5AedIEX3sIS4X zOIY5500TQqqbqLn7pvQDXYc1S7LtgM= =Zwfn -----END PGP SIGNATURE----- Merge tag 'for-5.17/parisc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc architecture fixes from Helge Deller: - Fix miscompilations when function calls are made from inside a put_user() call - Drop __init from map_pages() declaration to avoid random boot crashes - Added #error messages if a 64-bit compiler was used to build a 32-bit kernel (and vice versa) - Fix out-of-bound data TLB miss faults in sba_iommu and ccio-dma drivers - Add ioread64_lo_hi() and iowrite64_lo_hi() functions to avoid kernel test robot errors - Fix link failure when 8250_gsc driver is built without CONFIG_IOSAPIC * tag 'for-5.17/parisc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: serial: parisc: GSC: fix build when IOSAPIC is not set parisc: Fix some apparent put_user() failures parisc: Show error if wrong 32/64-bit compiler is being used parisc: Add ioread64_lo_hi() and iowrite64_lo_hi() parisc: Fix sglist access in ccio-dma.c parisc: Fix data TLB miss in sba_unmap_sg parisc: Drop __init from map_pages declaration
This commit is contained in:
commit
2572da44a5
7 changed files with 50 additions and 22 deletions
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@ -12,6 +12,14 @@
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#include <asm/barrier.h>
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#include <linux/atomic.h>
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/* compiler build environment sanity checks: */
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#if !defined(CONFIG_64BIT) && defined(__LP64__)
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#error "Please use 'ARCH=parisc' to build the 32-bit kernel."
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#endif
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#if defined(CONFIG_64BIT) && !defined(__LP64__)
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#error "Please use 'ARCH=parisc64' to build the 64-bit kernel."
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#endif
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/* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion
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* on use of volatile and __*_bit() (set/clear/change):
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* *_bit() want use of volatile.
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@ -89,8 +89,8 @@ struct exception_table_entry {
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__asm__("1: " ldx " 0(" sr "%2),%0\n" \
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"9:\n" \
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ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
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: "=r"(__gu_val), "=r"(__gu_err) \
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: "r"(ptr), "1"(__gu_err)); \
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: "=r"(__gu_val), "+r"(__gu_err) \
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: "r"(ptr)); \
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\
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(val) = (__force __typeof__(*(ptr))) __gu_val; \
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}
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@ -123,8 +123,8 @@ struct exception_table_entry {
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"9:\n" \
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ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
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ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \
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: "=&r"(__gu_tmp.l), "=r"(__gu_err) \
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: "r"(ptr), "1"(__gu_err)); \
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: "=&r"(__gu_tmp.l), "+r"(__gu_err) \
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: "r"(ptr)); \
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\
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(val) = __gu_tmp.t; \
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}
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@ -135,13 +135,12 @@ struct exception_table_entry {
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#define __put_user_internal(sr, x, ptr) \
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({ \
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ASM_EXCEPTIONTABLE_VAR(__pu_err); \
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__typeof__(*(ptr)) __x = (__typeof__(*(ptr)))(x); \
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\
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switch (sizeof(*(ptr))) { \
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case 1: __put_user_asm(sr, "stb", __x, ptr); break; \
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case 2: __put_user_asm(sr, "sth", __x, ptr); break; \
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case 4: __put_user_asm(sr, "stw", __x, ptr); break; \
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case 8: STD_USER(sr, __x, ptr); break; \
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case 1: __put_user_asm(sr, "stb", x, ptr); break; \
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case 2: __put_user_asm(sr, "sth", x, ptr); break; \
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case 4: __put_user_asm(sr, "stw", x, ptr); break; \
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case 8: STD_USER(sr, x, ptr); break; \
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default: BUILD_BUG(); \
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} \
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\
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@ -150,7 +149,9 @@ struct exception_table_entry {
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#define __put_user(x, ptr) \
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({ \
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__put_user_internal("%%sr3,", x, ptr); \
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__typeof__(&*(ptr)) __ptr = ptr; \
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__typeof__(*(__ptr)) __x = (__typeof__(*(__ptr)))(x); \
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__put_user_internal("%%sr3,", __x, __ptr); \
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})
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#define __put_kernel_nofault(dst, src, type, err_label) \
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@ -180,8 +181,8 @@ struct exception_table_entry {
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"1: " stx " %2,0(" sr "%1)\n" \
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"9:\n" \
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ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
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: "=r"(__pu_err) \
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: "r"(ptr), "r"(x), "0"(__pu_err))
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: "+r"(__pu_err) \
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: "r"(ptr), "r"(x))
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#if !defined(CONFIG_64BIT)
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@ -193,8 +194,8 @@ struct exception_table_entry {
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"9:\n" \
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ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
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ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \
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: "=r"(__pu_err) \
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: "r"(ptr), "r"(__val), "0"(__pu_err)); \
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: "+r"(__pu_err) \
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: "r"(ptr), "r"(__val)); \
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} while (0)
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#endif /* !defined(CONFIG_64BIT) */
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@ -346,6 +346,16 @@ u64 ioread64be(const void __iomem *addr)
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return *((u64 *)addr);
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}
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u64 ioread64_lo_hi(const void __iomem *addr)
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{
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u32 low, high;
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low = ioread32(addr);
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high = ioread32(addr + sizeof(u32));
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return low + ((u64)high << 32);
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}
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u64 ioread64_hi_lo(const void __iomem *addr)
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{
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u32 low, high;
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@ -419,6 +429,12 @@ void iowrite64be(u64 datum, void __iomem *addr)
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}
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}
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void iowrite64_lo_hi(u64 val, void __iomem *addr)
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{
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iowrite32(val, addr);
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iowrite32(val >> 32, addr + sizeof(u32));
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}
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void iowrite64_hi_lo(u64 val, void __iomem *addr)
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{
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iowrite32(val >> 32, addr + sizeof(u32));
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@ -530,6 +546,7 @@ EXPORT_SYMBOL(ioread32);
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EXPORT_SYMBOL(ioread32be);
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EXPORT_SYMBOL(ioread64);
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EXPORT_SYMBOL(ioread64be);
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EXPORT_SYMBOL(ioread64_lo_hi);
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EXPORT_SYMBOL(ioread64_hi_lo);
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EXPORT_SYMBOL(iowrite8);
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EXPORT_SYMBOL(iowrite16);
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@ -538,6 +555,7 @@ EXPORT_SYMBOL(iowrite32);
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EXPORT_SYMBOL(iowrite32be);
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EXPORT_SYMBOL(iowrite64);
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EXPORT_SYMBOL(iowrite64be);
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EXPORT_SYMBOL(iowrite64_lo_hi);
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EXPORT_SYMBOL(iowrite64_hi_lo);
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EXPORT_SYMBOL(ioread8_rep);
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EXPORT_SYMBOL(ioread16_rep);
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@ -337,9 +337,9 @@ static void __init setup_bootmem(void)
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static bool kernel_set_to_readonly;
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static void __init map_pages(unsigned long start_vaddr,
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unsigned long start_paddr, unsigned long size,
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pgprot_t pgprot, int force)
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static void __ref map_pages(unsigned long start_vaddr,
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unsigned long start_paddr, unsigned long size,
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pgprot_t pgprot, int force)
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{
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pmd_t *pmd;
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pte_t *pg_table;
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@ -449,7 +449,7 @@ void __init set_kernel_text_rw(int enable_read_write)
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flush_tlb_all();
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}
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void __ref free_initmem(void)
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void free_initmem(void)
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{
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unsigned long init_begin = (unsigned long)__init_begin;
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unsigned long init_end = (unsigned long)__init_end;
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@ -463,7 +463,6 @@ void __ref free_initmem(void)
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/* The init text pages are marked R-X. We have to
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* flush the icache and mark them RW-
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*
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* This is tricky, because map_pages is in the init section.
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* Do a dummy remap of the data section first (the data
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* section is already PAGE_KERNEL) to pull in the TLB entries
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* for map_kernel */
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@ -1003,7 +1003,7 @@ ccio_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents,
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ioc->usg_calls++;
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#endif
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while(sg_dma_len(sglist) && nents--) {
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while (nents && sg_dma_len(sglist)) {
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#ifdef CCIO_COLLECT_STATS
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ioc->usg_pages += sg_dma_len(sglist) >> PAGE_SHIFT;
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ccio_unmap_page(dev, sg_dma_address(sglist),
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sg_dma_len(sglist), direction, 0);
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++sglist;
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nents--;
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}
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DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents);
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@ -1047,7 +1047,7 @@ sba_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents,
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spin_unlock_irqrestore(&ioc->res_lock, flags);
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#endif
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while (sg_dma_len(sglist) && nents--) {
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while (nents && sg_dma_len(sglist)) {
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sba_unmap_page(dev, sg_dma_address(sglist), sg_dma_len(sglist),
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direction, 0);
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ioc->usingle_calls--; /* kluge since call is unmap_sg() */
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#endif
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++sglist;
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nents--;
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}
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DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents);
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@ -26,7 +26,7 @@ static int __init serial_init_chip(struct parisc_device *dev)
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unsigned long address;
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int err;
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#ifdef CONFIG_64BIT
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#if defined(CONFIG_64BIT) && defined(CONFIG_IOSAPIC)
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if (!dev->irq && (dev->id.sversion == 0xad))
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dev->irq = iosapic_serial_irq(dev);
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#endif
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