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ath10k: pci: use mutex for diagnostic window CE polling
The DIAG copy engine is only used via polling, but it holds a spinlock with softirqs disabled. Each iteration of our read/write loops can theoretically take 20ms (two 10ms timeout loops), and this loop can be run an unbounded number of times while holding the spinlock -- dependent on the request size given by the caller. As of commit39501ea641
("ath10k: download firmware via diag Copy Engine for QCA6174 and QCA9377."), we transfer large chunks of firmware memory using this mechanism. With large enough firmware segments, this becomes an exceedingly long period for disabling soft IRQs. For example, with a 500KiB firmware segment, in testing QCA6174A, I see 200 loop iterations of about 50-100us each, which can total about 10-20ms. In reality, we don't really need to block softirqs for this duration. The DIAG CE is only used in polling mode, and we only need to hold ce_lock to make sure any CE bookkeeping is done without screwing up another CE. Otherwise, we only need to ensure exclusion between ath10k_pci_diag_{read,write}_mem() contexts. This patch moves to use fine-grained locking for the shared ce_lock, while adding a new mutex just to ensure mutual exclusion of diag read/write operations. Tested on QCA6174A, firmware version WLAN.RM.4.4.1-00132-QCARMSWPZ-1. Fixes:39501ea641
("ath10k: download firmware via diag Copy Engine for QCA6174 and QCA9377.") Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
parent
c40e448e0b
commit
25733c4e67
2 changed files with 18 additions and 26 deletions
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@ -913,7 +913,6 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data,
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int nbytes)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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struct ath10k_ce *ce = ath10k_ce_priv(ar);
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int ret = 0;
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u32 *buf;
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unsigned int completed_nbytes, alloc_nbytes, remaining_bytes;
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@ -924,8 +923,7 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data,
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void *data_buf = NULL;
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int i;
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spin_lock_bh(&ce->ce_lock);
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mutex_lock(&ar_pci->ce_diag_mutex);
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ce_diag = ar_pci->ce_diag;
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/*
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@ -960,19 +958,17 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data,
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nbytes = min_t(unsigned int, remaining_bytes,
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DIAG_TRANSFER_LIMIT);
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ret = ce_diag->ops->ce_rx_post_buf(ce_diag, &ce_data, ce_data);
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ret = ath10k_ce_rx_post_buf(ce_diag, &ce_data, ce_data);
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if (ret != 0)
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goto done;
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/* Request CE to send from Target(!) address to Host buffer */
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ret = ath10k_ce_send_nolock(ce_diag, NULL, (u32)address, nbytes, 0,
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0);
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ret = ath10k_ce_send(ce_diag, NULL, (u32)address, nbytes, 0, 0);
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if (ret)
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goto done;
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i = 0;
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while (ath10k_ce_completed_send_next_nolock(ce_diag,
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NULL) != 0) {
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while (ath10k_ce_completed_send_next(ce_diag, NULL) != 0) {
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udelay(DIAG_ACCESS_CE_WAIT_US);
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i += DIAG_ACCESS_CE_WAIT_US;
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@ -983,10 +979,8 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data,
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}
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i = 0;
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while (ath10k_ce_completed_recv_next_nolock(ce_diag,
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(void **)&buf,
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&completed_nbytes)
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!= 0) {
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while (ath10k_ce_completed_recv_next(ce_diag, (void **)&buf,
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&completed_nbytes) != 0) {
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udelay(DIAG_ACCESS_CE_WAIT_US);
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i += DIAG_ACCESS_CE_WAIT_US;
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@ -1019,7 +1013,7 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data,
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dma_free_coherent(ar->dev, alloc_nbytes, data_buf,
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ce_data_base);
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spin_unlock_bh(&ce->ce_lock);
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mutex_unlock(&ar_pci->ce_diag_mutex);
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return ret;
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}
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@ -1067,7 +1061,6 @@ int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address,
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const void *data, int nbytes)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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struct ath10k_ce *ce = ath10k_ce_priv(ar);
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int ret = 0;
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u32 *buf;
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unsigned int completed_nbytes, alloc_nbytes, remaining_bytes;
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@ -1076,8 +1069,7 @@ int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address,
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dma_addr_t ce_data_base = 0;
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int i;
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spin_lock_bh(&ce->ce_lock);
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mutex_lock(&ar_pci->ce_diag_mutex);
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ce_diag = ar_pci->ce_diag;
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/*
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@ -1118,7 +1110,7 @@ int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address,
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memcpy(data_buf, data, nbytes);
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/* Set up to receive directly into Target(!) address */
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ret = ce_diag->ops->ce_rx_post_buf(ce_diag, &address, address);
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ret = ath10k_ce_rx_post_buf(ce_diag, &address, address);
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if (ret != 0)
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goto done;
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@ -1126,14 +1118,12 @@ int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address,
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* Request CE to send caller-supplied data that
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* was copied to bounce buffer to Target(!) address.
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*/
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ret = ath10k_ce_send_nolock(ce_diag, NULL, ce_data_base,
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nbytes, 0, 0);
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ret = ath10k_ce_send(ce_diag, NULL, ce_data_base, nbytes, 0, 0);
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if (ret != 0)
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goto done;
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i = 0;
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while (ath10k_ce_completed_send_next_nolock(ce_diag,
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NULL) != 0) {
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while (ath10k_ce_completed_send_next(ce_diag, NULL) != 0) {
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udelay(DIAG_ACCESS_CE_WAIT_US);
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i += DIAG_ACCESS_CE_WAIT_US;
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@ -1144,10 +1134,8 @@ int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address,
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}
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i = 0;
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while (ath10k_ce_completed_recv_next_nolock(ce_diag,
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(void **)&buf,
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&completed_nbytes)
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!= 0) {
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while (ath10k_ce_completed_recv_next(ce_diag, (void **)&buf,
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&completed_nbytes) != 0) {
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udelay(DIAG_ACCESS_CE_WAIT_US);
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i += DIAG_ACCESS_CE_WAIT_US;
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@ -1182,7 +1170,7 @@ int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address,
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ath10k_warn(ar, "failed to write diag value at 0x%x: %d\n",
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address, ret);
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spin_unlock_bh(&ce->ce_lock);
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mutex_unlock(&ar_pci->ce_diag_mutex);
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return ret;
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}
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@ -3462,6 +3450,7 @@ int ath10k_pci_setup_resource(struct ath10k *ar)
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spin_lock_init(&ce->ce_lock);
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spin_lock_init(&ar_pci->ps_lock);
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mutex_init(&ar_pci->ce_diag_mutex);
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timer_setup(&ar_pci->rx_post_retry, ath10k_pci_rx_replenish_retry, 0);
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@ -19,6 +19,7 @@
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#define _PCI_H_
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include "hw.h"
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#include "ce.h"
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@ -128,6 +129,8 @@ struct ath10k_pci {
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/* Copy Engine used for Diagnostic Accesses */
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struct ath10k_ce_pipe *ce_diag;
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/* For protecting ce_diag */
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struct mutex ce_diag_mutex;
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struct ath10k_ce ce;
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struct timer_list rx_post_retry;
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