KVM: x86/pmu: Zero out PMU metadata on AMD if PMU is disabled
[ Upstream commitf933b88e20
] Move the purging of common PMU metadata from intel_pmu_refresh() to kvm_pmu_refresh(), and invoke the vendor refresh() hook if and only if the VM is supposed to have a vPMU. KVM already denies access to the PMU based on kvm->arch.enable_pmu, as get_gp_pmc_amd() returns NULL for all PMCs in that case, i.e. KVM already violates AMD's architecture by not virtualizing a PMU (kernels have long since learned to not panic when the PMU is unavailable). But configuring the PMU as if it were enabled causes unwanted side effects, e.g. calls to kvm_pmu_trigger_event() waste an absurd number of cycles due to the all_valid_pmc_idx bitmap being non-zero. Fixes:b1d66dad65
("KVM: x86/svm: Add module param to control PMU virtualization") Reported-by: Konstantin Khorenko <khorenko@virtuozzo.com> Closes: https://lore.kernel.org/all/20231109180646.2963718-2-khorenko@virtuozzo.com Link: https://lore.kernel.org/r/20231110022857.1273836-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com> Stable-dep-of:de120e1d69
("KVM: x86/pmu: Set enable bits for GP counters in PERF_GLOBAL_CTRL at "RESET"") Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -741,6 +741,8 @@ static void kvm_pmu_reset(struct kvm_vcpu *vcpu)
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*/
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void kvm_pmu_refresh(struct kvm_vcpu *vcpu)
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{
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struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
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if (KVM_BUG_ON(kvm_vcpu_has_run(vcpu), vcpu->kvm))
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return;
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@ -750,8 +752,22 @@ void kvm_pmu_refresh(struct kvm_vcpu *vcpu)
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*/
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kvm_pmu_reset(vcpu);
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bitmap_zero(vcpu_to_pmu(vcpu)->all_valid_pmc_idx, X86_PMC_IDX_MAX);
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static_call(kvm_x86_pmu_refresh)(vcpu);
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pmu->version = 0;
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pmu->nr_arch_gp_counters = 0;
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pmu->nr_arch_fixed_counters = 0;
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pmu->counter_bitmask[KVM_PMC_GP] = 0;
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pmu->counter_bitmask[KVM_PMC_FIXED] = 0;
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pmu->reserved_bits = 0xffffffff00200000ull;
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pmu->raw_event_mask = X86_RAW_EVENT_MASK;
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pmu->global_ctrl_mask = ~0ull;
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pmu->global_status_mask = ~0ull;
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pmu->fixed_ctr_ctrl_mask = ~0ull;
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pmu->pebs_enable_mask = ~0ull;
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pmu->pebs_data_cfg_mask = ~0ull;
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bitmap_zero(pmu->all_valid_pmc_idx, X86_PMC_IDX_MAX);
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if (vcpu->kvm->arch.enable_pmu)
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static_call(kvm_x86_pmu_refresh)(vcpu);
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}
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void kvm_pmu_init(struct kvm_vcpu *vcpu)
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@ -491,19 +491,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
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u64 counter_mask;
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int i;
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pmu->nr_arch_gp_counters = 0;
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pmu->nr_arch_fixed_counters = 0;
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pmu->counter_bitmask[KVM_PMC_GP] = 0;
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pmu->counter_bitmask[KVM_PMC_FIXED] = 0;
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pmu->version = 0;
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pmu->reserved_bits = 0xffffffff00200000ull;
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pmu->raw_event_mask = X86_RAW_EVENT_MASK;
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pmu->global_ctrl_mask = ~0ull;
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pmu->global_status_mask = ~0ull;
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pmu->fixed_ctr_ctrl_mask = ~0ull;
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pmu->pebs_enable_mask = ~0ull;
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pmu->pebs_data_cfg_mask = ~0ull;
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memset(&lbr_desc->records, 0, sizeof(lbr_desc->records));
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/*
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@ -515,8 +502,9 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
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return;
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entry = kvm_find_cpuid_entry(vcpu, 0xa);
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if (!entry || !vcpu->kvm->arch.enable_pmu)
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if (!entry)
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return;
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eax.full = entry->eax;
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edx.full = entry->edx;
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