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be2net: use PCI MMIO read instead of config read for errors
When an EEH error occurs, the device/slot is disconnected. This condition is more reliably detected (i.e., returns all ones) with an MMIO read rather than a config read -- especially on power platforms. Hence, this patch fixes EEH error detection by replacing config reads with MMIO reads for reading the error registers. The error registers in Skyhawk-R/BE2/BE3 are accessible both via the config space and the PCICFG (BAR0) memory space. Reported-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Suresh Reddy <Suresh.Reddy@emulex.com> Signed-off-by: Sathya Perla <sathya.perla@emulex.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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parent
c8ba4ad0b5
commit
25848c9015
2 changed files with 23 additions and 11 deletions
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@ -424,6 +424,7 @@ struct be_adapter {
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u8 __iomem *csr; /* CSR BAR used only for BE2/3 */
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u8 __iomem *db; /* Door Bell */
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u8 __iomem *pcicfg; /* On SH,BEx only. Shadow of PCI config space */
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struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
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struct be_dma_mem mbox_mem;
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@ -2823,14 +2823,12 @@ void be_detect_error(struct be_adapter *adapter)
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}
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}
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} else {
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pci_read_config_dword(adapter->pdev,
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PCICFG_UE_STATUS_LOW, &ue_lo);
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pci_read_config_dword(adapter->pdev,
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PCICFG_UE_STATUS_HIGH, &ue_hi);
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pci_read_config_dword(adapter->pdev,
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PCICFG_UE_STATUS_LOW_MASK, &ue_lo_mask);
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pci_read_config_dword(adapter->pdev,
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PCICFG_UE_STATUS_HI_MASK, &ue_hi_mask);
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ue_lo = ioread32(adapter->pcicfg + PCICFG_UE_STATUS_LOW);
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ue_hi = ioread32(adapter->pcicfg + PCICFG_UE_STATUS_HIGH);
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ue_lo_mask = ioread32(adapter->pcicfg +
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PCICFG_UE_STATUS_LOW_MASK);
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ue_hi_mask = ioread32(adapter->pcicfg +
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PCICFG_UE_STATUS_HI_MASK);
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ue_lo = (ue_lo & ~ue_lo_mask);
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ue_hi = (ue_hi & ~ue_hi_mask);
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@ -4874,24 +4872,37 @@ static int be_roce_map_pci_bars(struct be_adapter *adapter)
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static int be_map_pci_bars(struct be_adapter *adapter)
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{
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struct pci_dev *pdev = adapter->pdev;
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u8 __iomem *addr;
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if (BEx_chip(adapter) && be_physfn(adapter)) {
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adapter->csr = pci_iomap(adapter->pdev, 2, 0);
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adapter->csr = pci_iomap(pdev, 2, 0);
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if (!adapter->csr)
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return -ENOMEM;
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}
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addr = pci_iomap(adapter->pdev, db_bar(adapter), 0);
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addr = pci_iomap(pdev, db_bar(adapter), 0);
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if (!addr)
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goto pci_map_err;
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adapter->db = addr;
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if (skyhawk_chip(adapter) || BEx_chip(adapter)) {
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if (be_physfn(adapter)) {
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/* PCICFG is the 2nd BAR in BE2 */
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addr = pci_iomap(pdev, BE2_chip(adapter) ? 1 : 0, 0);
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if (!addr)
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goto pci_map_err;
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adapter->pcicfg = addr;
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} else {
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adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
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}
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}
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be_roce_map_pci_bars(adapter);
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return 0;
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pci_map_err:
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dev_err(&adapter->pdev->dev, "Error in mapping PCI BARs\n");
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dev_err(&pdev->dev, "Error in mapping PCI BARs\n");
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be_unmap_pci_bars(adapter);
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return -ENOMEM;
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}
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