A single GPIO patch fixing the compatible string for the

MVEBU PWM controller embedded in the GPIO controller before
 we release v4.12. Hopefully.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJZTQM9AAoJEEEQszewGV1zdOYP/1GN7dCIE2VemdGDVkt52WUm
 8NOy7PMe6XtrfLXQMxpS8ezXH3ag1CegEynuoEnjreZGWji6yYjr7vzXYPVAHgAj
 mSnvRt+t+KkaQ1nTRLaVH/DjSfMCZiqBAsJakyvrcnV7GuHrzVOJYiSLhHFu4XXI
 ak2Xb4pO8bc32aNVGH24vmvNEZBglJ6jn2YOBNHvkc7IJTvLKZ93nZ+LZaa2pJPz
 gWv/Mcz0j1KcyXAY7c0QdZYkY/Rr2RuD/ZTUWpfUJJpPHuD8122S0rDoAc+6abaN
 bXjCI7tYW2Pj1u6+4Ky0g/A26Cph3ELc2XZ8spBcr40qKLyAJe/nZpbWE0wpmGCR
 0m0pHMwejyFXac6a9aV90gZmzl2aG3YgNNDR2ea6AhBepPfFVUj9fJ1/hi2AD3F9
 n+XZw2Q+0MKMlvIct6+f8gtNYro7emHx+U7+4zsqgGM8BvdXQiumDs+2uWLXVjo4
 oWjvGXJM/FaK5Qu6iH92dojBIole9ncvCVa4T+OMT5WCFAB19x8ukjeLGJvQq7EM
 pj8fouAYQXGZV6jP1rEU1EBuCYtDCz7CmN6lLBVvf6KGwkKt2pgDRCp7feCwvL63
 vtBYclEiVjf6uY5JBe2Px2JwjM5BX5b9+NoQyTX8VIvjJTVmTZL6UFSxb6kGFfzB
 8TE1rAxwXMF75hsk1wug
 =+/4l
 -----END PGP SIGNATURE-----

Merge tag 'gpio-v4.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO fix from Linus Walleij:
 "A single GPIO patch fixing the compatible string for the MVEBU PWM
  controller embedded in the GPIO controller before we release v4.12.
  Hopefully"

* tag 'gpio-v4.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio:
  gpio: mvebu: change compatible string for PWM support
This commit is contained in:
Linus Torvalds 2017-06-23 17:40:41 -07:00
commit 25b2398f5c
2 changed files with 6 additions and 6 deletions

View file

@ -41,9 +41,9 @@ Required properties:
Optional properties: Optional properties:
In order to use the GPIO lines in PWM mode, some additional optional In order to use the GPIO lines in PWM mode, some additional optional
properties are required. Only Armada 370 and XP support these properties. properties are required.
- compatible: Must contain "marvell,armada-370-xp-gpio" - compatible: Must contain "marvell,armada-370-gpio"
- reg: an additional register set is needed, for the GPIO Blink - reg: an additional register set is needed, for the GPIO Blink
Counter on/off registers. Counter on/off registers.
@ -71,7 +71,7 @@ Example:
}; };
gpio1: gpio@18140 { gpio1: gpio@18140 {
compatible = "marvell,armada-370-xp-gpio"; compatible = "marvell,armada-370-gpio";
reg = <0x18140 0x40>, <0x181c8 0x08>; reg = <0x18140 0x40>, <0x181c8 0x08>;
reg-names = "gpio", "pwm"; reg-names = "gpio", "pwm";
ngpios = <17>; ngpios = <17>;

View file

@ -721,7 +721,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
u32 set; u32 set;
if (!of_device_is_compatible(mvchip->chip.of_node, if (!of_device_is_compatible(mvchip->chip.of_node,
"marvell,armada-370-xp-gpio")) "marvell,armada-370-gpio"))
return 0; return 0;
if (IS_ERR(mvchip->clk)) if (IS_ERR(mvchip->clk))
@ -852,7 +852,7 @@ static const struct of_device_id mvebu_gpio_of_match[] = {
.data = (void *) MVEBU_GPIO_SOC_VARIANT_ARMADAXP, .data = (void *) MVEBU_GPIO_SOC_VARIANT_ARMADAXP,
}, },
{ {
.compatible = "marvell,armada-370-xp-gpio", .compatible = "marvell,armada-370-gpio",
.data = (void *) MVEBU_GPIO_SOC_VARIANT_ORION, .data = (void *) MVEBU_GPIO_SOC_VARIANT_ORION,
}, },
{ {
@ -1128,7 +1128,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
mvchip); mvchip);
} }
/* Armada 370/XP has simple PWM support for GPIO lines */ /* Some MVEBU SoCs have simple PWM support for GPIO lines */
if (IS_ENABLED(CONFIG_PWM)) if (IS_ENABLED(CONFIG_PWM))
return mvebu_pwm_probe(pdev, mvchip, id); return mvebu_pwm_probe(pdev, mvchip, id);