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synced 2024-08-23 09:19:51 +00:00
rtc-s3c: add variants for S3C2443 and S3C2416
Especially the TICNT registers are different from the two rtc types that currently exists. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
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d2524caac3
commit
25c1a24660
2 changed files with 53 additions and 4 deletions
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@ -22,11 +22,28 @@
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#define S3C2410_RTCCON_RTCEN (1 << 0)
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#define S3C2410_RTCCON_RTCEN (1 << 0)
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#define S3C2410_RTCCON_CNTSEL (1 << 2)
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#define S3C2410_RTCCON_CNTSEL (1 << 2)
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#define S3C2410_RTCCON_CLKRST (1 << 3)
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#define S3C2410_RTCCON_CLKRST (1 << 3)
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#define S3C2443_RTCCON_TICSEL (1 << 4)
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#define S3C64XX_RTCCON_TICEN (1 << 8)
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#define S3C64XX_RTCCON_TICEN (1 << 8)
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#define S3C2410_TICNT S3C2410_RTCREG(0x44)
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#define S3C2410_TICNT S3C2410_RTCREG(0x44)
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#define S3C2410_TICNT_ENABLE (1 << 7)
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#define S3C2410_TICNT_ENABLE (1 << 7)
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/* S3C2443: tick count is 15 bit wide
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* TICNT[6:0] contains upper 7 bits
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* TICNT1[7:0] contains lower 8 bits
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*/
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#define S3C2443_TICNT_PART(x) ((x & 0x7f00) >> 8)
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#define S3C2443_TICNT1 S3C2410_RTCREG(0x4C)
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#define S3C2443_TICNT1_PART(x) (x & 0xff)
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/* S3C2416: tick count is 32 bit wide
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* TICNT[6:0] contains bits [14:8]
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* TICNT1[7:0] contains lower 8 bits
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* TICNT2[16:0] contains upper 17 bits
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*/
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#define S3C2416_TICNT2 S3C2410_RTCREG(0x48)
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#define S3C2416_TICNT2_PART(x) ((x & 0xffff8000) >> 15)
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#define S3C2410_RTCALM S3C2410_RTCREG(0x50)
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#define S3C2410_RTCALM S3C2410_RTCREG(0x50)
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#define S3C2410_RTCALM_ALMEN (1 << 6)
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#define S3C2410_RTCALM_ALMEN (1 << 6)
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#define S3C2410_RTCALM_YEAREN (1 << 5)
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#define S3C2410_RTCALM_YEAREN (1 << 5)
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@ -35,6 +35,8 @@
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enum s3c_cpu_type {
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enum s3c_cpu_type {
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TYPE_S3C2410,
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TYPE_S3C2410,
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TYPE_S3C2416,
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TYPE_S3C2443,
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TYPE_S3C64XX,
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TYPE_S3C64XX,
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};
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};
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@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
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struct platform_device *pdev = to_platform_device(dev);
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struct platform_device *pdev = to_platform_device(dev);
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struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
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struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
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unsigned int tmp = 0;
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unsigned int tmp = 0;
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int val;
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if (!is_power_of_2(freq))
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if (!is_power_of_2(freq))
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return -EINVAL;
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return -EINVAL;
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@ -139,12 +142,22 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
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clk_enable(rtc_clk);
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clk_enable(rtc_clk);
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spin_lock_irq(&s3c_rtc_pie_lock);
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spin_lock_irq(&s3c_rtc_pie_lock);
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if (s3c_rtc_cpu_type == TYPE_S3C2410) {
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if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
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tmp = readb(s3c_rtc_base + S3C2410_TICNT);
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tmp = readb(s3c_rtc_base + S3C2410_TICNT);
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tmp &= S3C2410_TICNT_ENABLE;
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tmp &= S3C2410_TICNT_ENABLE;
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}
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}
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tmp |= (rtc_dev->max_user_freq / freq)-1;
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val = (rtc_dev->max_user_freq / freq) - 1;
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if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
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tmp |= S3C2443_TICNT_PART(val);
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writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
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if (s3c_rtc_cpu_type == TYPE_S3C2416)
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writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
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} else {
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tmp |= val;
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}
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writel(tmp, s3c_rtc_base + S3C2410_TICNT);
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writel(tmp, s3c_rtc_base + S3C2410_TICNT);
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spin_unlock_irq(&s3c_rtc_pie_lock);
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spin_unlock_irq(&s3c_rtc_pie_lock);
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@ -371,7 +384,7 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
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tmp &= ~S3C2410_RTCCON_RTCEN;
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tmp &= ~S3C2410_RTCCON_RTCEN;
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writew(tmp, base + S3C2410_RTCCON);
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writew(tmp, base + S3C2410_RTCCON);
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if (s3c_rtc_cpu_type == TYPE_S3C2410) {
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if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
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tmp = readb(base + S3C2410_TICNT);
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tmp = readb(base + S3C2410_TICNT);
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tmp &= ~S3C2410_TICNT_ENABLE;
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tmp &= ~S3C2410_TICNT_ENABLE;
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writeb(tmp, base + S3C2410_TICNT);
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writeb(tmp, base + S3C2410_TICNT);
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@ -448,6 +461,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
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struct rtc_time rtc_tm;
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struct rtc_time rtc_tm;
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struct resource *res;
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struct resource *res;
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int ret;
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int ret;
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int tmp;
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pr_debug("%s: probe=%p\n", __func__, pdev);
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pr_debug("%s: probe=%p\n", __func__, pdev);
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@ -541,11 +555,17 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
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dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
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dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
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}
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}
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if (s3c_rtc_cpu_type == TYPE_S3C64XX)
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if (s3c_rtc_cpu_type != TYPE_S3C2410)
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rtc->max_user_freq = 32768;
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rtc->max_user_freq = 32768;
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else
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else
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rtc->max_user_freq = 128;
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rtc->max_user_freq = 128;
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if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
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tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
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tmp |= S3C2443_RTCCON_TICSEL;
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writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
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}
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platform_set_drvdata(pdev, rtc);
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platform_set_drvdata(pdev, rtc);
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s3c_rtc_setfreq(&pdev->dev, 1);
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s3c_rtc_setfreq(&pdev->dev, 1);
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@ -649,6 +669,12 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
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{
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{
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.compatible = "samsung,s3c2410-rtc"
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.compatible = "samsung,s3c2410-rtc"
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.data = TYPE_S3C2410,
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.data = TYPE_S3C2410,
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}, {
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.compatible = "samsung,s3c2416-rtc"
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.data = TYPE_S3C2416,
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}, {
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.compatible = "samsung,s3c2443-rtc"
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.data = TYPE_S3C2443,
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}, {
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}, {
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.compatible = "samsung,s3c6410-rtc"
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.compatible = "samsung,s3c6410-rtc"
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.data = TYPE_S3C64XX,
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.data = TYPE_S3C64XX,
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@ -664,6 +690,12 @@ static struct platform_device_id s3c_rtc_driver_ids[] = {
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{
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{
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.name = "s3c2410-rtc",
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.name = "s3c2410-rtc",
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.driver_data = TYPE_S3C2410,
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.driver_data = TYPE_S3C2410,
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}, {
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.name = "s3c2416-rtc",
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.driver_data = TYPE_S3C2416,
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}, {
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.name = "s3c2443-rtc",
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.driver_data = TYPE_S3C2443,
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}, {
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}, {
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.name = "s3c64xx-rtc",
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.name = "s3c64xx-rtc",
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.driver_data = TYPE_S3C64XX,
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.driver_data = TYPE_S3C64XX,
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