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spi: imx: set spi_bus_clk for mx1, mx31 and mx35
Modify spi_imx_clkdiv_2() to return the resulting bus clock frequency when the selected clock divider is applied. Set spi_imx->spi_bus_clk to this frequency. If spi_bus_clk is unset, spi_imx_calculate_timeout() causes a division by 0. Signed-off-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Mark Brown <broonie@kernel.org>
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parent
29b4817d40
commit
2636ba8fa3
1 changed files with 12 additions and 5 deletions
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@ -186,17 +186,19 @@ static unsigned int spi_imx_clkdiv_1(unsigned int fin,
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/* MX1, MX31, MX35, MX51 CSPI */
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static unsigned int spi_imx_clkdiv_2(unsigned int fin,
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unsigned int fspi)
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unsigned int fspi, unsigned int *fres)
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{
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int i, div = 4;
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for (i = 0; i < 7; i++) {
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if (fspi * div >= fin)
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return i;
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goto out;
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div <<= 1;
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}
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return 7;
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out:
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*fres = fin / div;
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return i;
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}
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static int spi_imx_bytes_per_word(const int bpw)
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@ -482,9 +484,11 @@ static int mx31_config(struct spi_device *spi, struct spi_imx_config *config)
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{
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struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
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unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
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unsigned int clk;
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz, &clk) <<
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MX31_CSPICTRL_DR_SHIFT;
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spi_imx->spi_bus_clk = clk;
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if (is_imx35_cspi(spi_imx)) {
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reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT;
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@ -625,9 +629,12 @@ static int mx1_config(struct spi_device *spi, struct spi_imx_config *config)
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{
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struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
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unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER;
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unsigned int clk;
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz, &clk) <<
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MX1_CSPICTRL_DR_SHIFT;
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spi_imx->spi_bus_clk = clk;
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reg |= config->bpw - 1;
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if (spi->mode & SPI_CPHA)
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