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drm/i915: Disable LTTPR support when the DPCD rev < 1.4
By the specification the 0xF0000-0xF02FF range is only valid when the
DPCD revision is 1.4 or higher. Disable LTTPR support if this isn't so.
Trying to detect LTTPRs returned corrupted values for the above DPCD
range at least on a Skylake host with an LG 43UD79-B monitor with a DPCD
revision 1.2 connected.
v2: Add the actual version check.
v3: Fix s/DRPX/DPRX/ typo.
Fixes: 7b2a4ab8b0
("drm/i915: Switch to LTTPR transparent mode link training")
Cc: <stable@vger.kernel.org> # v5.11
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210317190149.4032966-1-imre.deak@intel.com
This commit is contained in:
parent
984982f3ef
commit
264613b406
3 changed files with 39 additions and 15 deletions
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@ -3709,9 +3709,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
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{
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{
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int ret;
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int ret;
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intel_dp_lttpr_init(intel_dp);
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if (intel_dp_init_lttpr_and_dprx_caps(intel_dp) < 0)
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if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd))
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return false;
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return false;
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/*
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/*
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@ -35,6 +35,11 @@ intel_dp_dump_link_status(struct drm_device *drm,
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link_status[3], link_status[4], link_status[5]);
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link_status[3], link_status[4], link_status[5]);
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}
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}
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static void intel_dp_reset_lttpr_common_caps(struct intel_dp *intel_dp)
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{
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memset(&intel_dp->lttpr_common_caps, 0, sizeof(intel_dp->lttpr_common_caps));
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}
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static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
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static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
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{
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{
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intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
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intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
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@ -96,8 +101,7 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp)
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if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
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if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
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intel_dp->lttpr_common_caps) < 0) {
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intel_dp->lttpr_common_caps) < 0) {
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memset(intel_dp->lttpr_common_caps, 0,
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intel_dp_reset_lttpr_common_caps(intel_dp);
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sizeof(intel_dp->lttpr_common_caps));
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return false;
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return false;
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}
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}
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@ -119,30 +123,49 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp *intel_dp, bool enable)
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}
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}
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/**
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/**
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* intel_dp_lttpr_init - detect LTTPRs and init the LTTPR link training mode
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* intel_dp_init_lttpr_and_dprx_caps - detect LTTPR and DPRX caps, init the LTTPR link training mode
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* @intel_dp: Intel DP struct
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* @intel_dp: Intel DP struct
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*
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*
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* Read the LTTPR common capabilities, switch to non-transparent link training
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* Read the LTTPR common and DPRX capabilities and switch to non-transparent
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* mode if any is detected and read the PHY capabilities for all detected
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* link training mode if any is detected and read the PHY capabilities for all
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* LTTPRs. In case of an LTTPR detection error or if the number of
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* detected LTTPRs. In case of an LTTPR detection error or if the number of
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* LTTPRs is more than is supported (8), fall back to the no-LTTPR,
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* LTTPRs is more than is supported (8), fall back to the no-LTTPR,
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* transparent mode link training mode.
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* transparent mode link training mode.
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*
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*
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* Returns:
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* Returns:
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* >0 if LTTPRs were detected and the non-transparent LT mode was set
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* >0 if LTTPRs were detected and the non-transparent LT mode was set. The
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* DPRX capabilities are read out.
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* 0 if no LTTPRs or more than 8 LTTPRs were detected or in case of a
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* 0 if no LTTPRs or more than 8 LTTPRs were detected or in case of a
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* detection failure and the transparent LT mode was set
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* detection failure and the transparent LT mode was set. The DPRX
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* capabilities are read out.
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* <0 Reading out the DPRX capabilities failed.
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*/
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*/
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int intel_dp_lttpr_init(struct intel_dp *intel_dp)
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int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp)
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{
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{
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int lttpr_count;
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int lttpr_count;
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bool ret;
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bool ret;
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int i;
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int i;
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ret = intel_dp_read_lttpr_common_caps(intel_dp);
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ret = intel_dp_read_lttpr_common_caps(intel_dp);
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/* The DPTX shall read the DPRX caps after LTTPR detection. */
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if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd)) {
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intel_dp_reset_lttpr_common_caps(intel_dp);
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return -EIO;
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}
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if (!ret)
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if (!ret)
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return 0;
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return 0;
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/*
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* The 0xF0000-0xF02FF range is only valid if the DPCD revision is
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* at least 1.4.
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*/
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if (intel_dp->dpcd[DP_DPCD_REV] < 0x14) {
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intel_dp_reset_lttpr_common_caps(intel_dp);
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return 0;
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}
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lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
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lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
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/*
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/*
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* Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
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* Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
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@ -182,7 +205,7 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
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return lttpr_count;
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return lttpr_count;
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}
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}
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EXPORT_SYMBOL(intel_dp_lttpr_init);
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EXPORT_SYMBOL(intel_dp_init_lttpr_and_dprx_caps);
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static u8 dp_voltage_max(u8 preemph)
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static u8 dp_voltage_max(u8 preemph)
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{
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{
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@ -817,7 +840,10 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
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* TODO: Reiniting LTTPRs here won't be needed once proper connector
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* TODO: Reiniting LTTPRs here won't be needed once proper connector
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* HW state readout is added.
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* HW state readout is added.
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*/
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*/
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int lttpr_count = intel_dp_lttpr_init(intel_dp);
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int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
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if (lttpr_count < 0)
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return;
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if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
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if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
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intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
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intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
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@ -11,7 +11,7 @@
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struct intel_crtc_state;
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struct intel_crtc_state;
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struct intel_dp;
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struct intel_dp;
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int intel_dp_lttpr_init(struct intel_dp *intel_dp);
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int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
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void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
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void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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const struct intel_crtc_state *crtc_state,
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