ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC
The Yosemite V2 is a facebook multi-node server platform that host four OCP server. The BMC in the Yosemite V2 platform based on AST2500 SoC. This patch adds linux device tree entry related to Yosemite V2 specific devices connected to BMC SoC. Signed-off-by: Manikandan Elumalai <manikandan.hcl.ers.epl@gmail.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Vijay Khemka <vkhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
Manikandan Elumalai
Joel Stanley
parent
697538bd65
commit
266056d3c6
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@ -1339,6 +1339,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
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aspeed-bmc-facebook-wedge40.dtb \
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aspeed-bmc-facebook-wedge100.dtb \
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aspeed-bmc-facebook-yamp.dtb \
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aspeed-bmc-facebook-yosemitev2.dtb \
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aspeed-bmc-ibm-rainier.dtb \
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aspeed-bmc-intel-s2600wf.dtb \
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aspeed-bmc-inspur-fp5280g2.dtb \
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@ -0,0 +1,231 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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// Copyright (c) 2018 Facebook Inc.
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/dts-v1/;
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#include "aspeed-g5.dtsi"
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#include <dt-bindings/i2c/i2c.h>
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/ {
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model = "Facebook Yosemitev2 BMC";
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compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
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aliases {
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serial4 = &uart5;
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};
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chosen {
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stdout-path = &uart5;
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};
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memory@80000000 {
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reg = <0x80000000 0x20000000>;
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};
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iio-hwmon {
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// VOLATAGE SENSOR
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compatible = "iio-hwmon";
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io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
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<&adc 4> , <&adc 5> , <&adc 6> , <&adc 7> ,
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<&adc 8> , <&adc 9> , <&adc 10>, <&adc 11> ,
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<&adc 12> , <&adc 13> , <&adc 14> , <&adc 15> ;
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};
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};
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&fmc {
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status = "okay";
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flash@0 {
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status = "okay";
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m25p,fast-read;
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#include "openbmc-flash-layout.dtsi"
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};
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};
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&spi1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1_default>;
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flash@0 {
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status = "okay";
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m25p,fast-read;
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label = "pnor";
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};
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};
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&uart1 {
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// Host1 Console
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_txd1_default
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&pinctrl_rxd1_default>;
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};
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&uart2 {
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// Host2 Console
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_txd2_default
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&pinctrl_rxd2_default>;
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};
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&uart3 {
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// Host3 Console
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_txd3_default
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&pinctrl_rxd3_default>;
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};
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&uart4 {
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// Host4 Console
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_txd4_default
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&pinctrl_rxd4_default>;
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};
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&uart5 {
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// BMC Console
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status = "okay";
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};
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&vuart {
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// Virtual UART
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status = "okay";
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};
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&mac0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rmii1_default>;
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use-ncsi;
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mlx,multi-host;
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};
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&adc {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adc0_default
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&pinctrl_adc1_default
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&pinctrl_adc2_default
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&pinctrl_adc3_default
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&pinctrl_adc4_default
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&pinctrl_adc5_default
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&pinctrl_adc6_default
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&pinctrl_adc7_default
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&pinctrl_adc8_default
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&pinctrl_adc9_default
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&pinctrl_adc10_default
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&pinctrl_adc11_default
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&pinctrl_adc12_default
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&pinctrl_adc13_default
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&pinctrl_adc14_default
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&pinctrl_adc15_default>;
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};
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&i2c1 {
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//Host1 IPMB bus
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status = "okay";
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multi-master;
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ipmb1@10 {
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compatible = "ipmb-dev";
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reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
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i2c-protocol;
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};
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};
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&i2c3 {
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//Host2 IPMB bus
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status = "okay";
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multi-master;
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ipmb3@10 {
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compatible = "ipmb-dev";
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reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
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i2c-protocol;
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};
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};
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&i2c5 {
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//Host3 IPMB bus
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status = "okay";
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multi-master;
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ipmb5@10 {
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compatible = "ipmb-dev";
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reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
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i2c-protocol;
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};
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};
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&i2c7 {
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//Host4 IPMB bus
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status = "okay";
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multi-master;
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ipmb7@10 {
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compatible = "ipmb-dev";
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reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
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i2c-protocol;
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};
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};
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&i2c8 {
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status = "okay";
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//FRU EEPROM
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eeprom@51 {
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compatible = "atmel,24c64";
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reg = <0x51>;
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pagesize = <32>;
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};
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};
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&i2c9 {
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status = "okay";
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tmp421@4e {
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//INLET TEMP
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compatible = "ti,tmp421";
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reg = <0x4e>;
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};
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//OUTLET TEMP
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tmp421@4f {
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compatible = "ti,tmp421";
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reg = <0x4f>;
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};
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};
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&i2c10 {
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status = "okay";
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//HSC
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adm1278@40 {
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compatible = "adi,adm1278";
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reg = <0x40>;
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};
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};
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&i2c11 {
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status = "okay";
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//MEZZ_TEMP_SENSOR
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tmp421@1f {
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compatible = "ti,tmp421";
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reg = <0x1f>;
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};
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};
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&i2c12 {
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status = "okay";
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//MEZZ_FRU
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eeprom@51 {
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compatible = "atmel,24c64";
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reg = <0x51>;
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pagesize = <32>;
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};
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};
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&pwm_tacho {
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status = "okay";
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//FSC
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
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fan@0 {
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reg = <0x00>;
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aspeed,fan-tach-ch = /bits/ 8 <0x00>;
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};
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fan@1 {
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reg = <0x01>;
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aspeed,fan-tach-ch = /bits/ 8 <0x01>;
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};
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};
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