ARM: dts: r8a7742-iwg21m: Add iWave RZ/G1H Qseven SOM

Add support for iWave RZ/G1H Qseven System On Module.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1588542414-14826-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2020-05-03 22:46:53 +01:00 committed by Geert Uytterhoeven
parent eb4cdda7a3
commit 269785eaba

View file

@ -0,0 +1,53 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the iWave RZ/G1H Qseven SOM
*
* Copyright (C) 2020 Renesas Electronics Corp.
*/
#include "r8a7742.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "iwave,g21m", "renesas,r8a7742";
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
memory@200000000 {
device_type = "memory";
reg = <2 0x00000000 0 0x40000000>;
};
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
};
&extal_clk {
clock-frequency = <20000000>;
};
&pfc {
mmc1_pins: mmc1 {
groups = "mmc1_data4", "mmc1_ctrl";
function = "mmc1";
};
};
&mmcif1 {
pinctrl-0 = <&mmc1_pins>;
pinctrl-names = "default";
vmmc-supply = <&reg_3p3v>;
bus-width = <4>;
non-removable;
status = "okay";
};