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ARM: dts: NSP: Add Ax stepping modifications

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While uncommon, some Ax NSP SoCs exist in the wild. This stepping
requires a modified secondary CPU boot-reg and removal of DMA coherency
properties. Without these modifications, the secondary CPU will be
inactive and many peripherals will exhibit undefined behaviour.

Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit is contained in:
Matthew Hagan 2021-08-06 21:44:33 +01:00 committed by Florian Fainelli
parent f509d4a78a
commit 2698fbb457
1 changed files with 70 additions and 0 deletions
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70
arch/arm/boot/dts/bcm-nsp-ax.dtsi Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom Northstar Plus Ax stepping-specific bindings.
* Notable differences from B0+ are the secondary-boot-reg and
* lack of DMA coherency.
*/
&cpu1 {
secondary-boot-reg = <0xffff042c>;
};
&dma {
/delete-property/ dma-coherent;
};
&sdio {
/delete-property/ dma-coherent;
};
&amac0 {
/delete-property/ dma-coherent;
};
&amac1 {
/delete-property/ dma-coherent;
};
&amac2 {
/delete-property/ dma-coherent;
};
&ehci0 {
/delete-property/ dma-coherent;
};
&mailbox {
/delete-property/ dma-coherent;
};
&xhci {
/delete-property/ dma-coherent;
};
&ehci0 {
/delete-property/ dma-coherent;
};
&ohci0 {
/delete-property/ dma-coherent;
};
&i2c0 {
/delete-property/ dma-coherent;
};
&sata {
/delete-property/ dma-coherent;
};
&pcie0 {
/delete-property/ dma-coherent;
};
&pcie1 {
/delete-property/ dma-coherent;
};
&pcie2 {
/delete-property/ dma-coherent;
};