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Blackfin arch: Update some inline assembly, tweak some register constraints
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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parent
2377feb4ce
commit
26fe19f760
3 changed files with 10 additions and 5 deletions
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@ -43,6 +43,11 @@ __attribute__((__noreturn__))
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static inline void bfrom_SoftReset(void *new_stack)
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{
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while (1)
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/*
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* We don't declare the SP as clobbered on purpose, since
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* it confuses the heck out of the compiler, and this function
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* never returns
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*/
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__asm__ __volatile__(
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"sp = %[stack];"
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"jump (%[bfrom_syscontrol]);"
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@ -44,10 +44,10 @@
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/*
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* Force strict CPU ordering.
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*/
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#define nop() asm volatile ("nop;\n\t"::)
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#define mb() asm volatile ("" : : :"memory")
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#define rmb() asm volatile ("" : : :"memory")
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#define wmb() asm volatile ("" : : :"memory")
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#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
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#define mb() __asm__ __volatile__ ("" : : : "memory")
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#define rmb() __asm__ __volatile__ ("" : : : "memory")
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#define wmb() __asm__ __volatile__ ("" : : : "memory")
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#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
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#define read_barrier_depends() do { } while(0)
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@ -91,7 +91,7 @@ __attribute_const__
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static inline struct thread_info *current_thread_info(void)
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{
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struct thread_info *ti;
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__asm__("%0 = sp;": "=&d"(ti):
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__asm__("%0 = sp;" : "=da"(ti) :
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);
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return (struct thread_info *)((long)ti & ~((long)THREAD_SIZE-1));
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}
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