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dt-bindings: mips: Add bindings for Microsemi SoCs

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Add bindings for Microsemi SoCs. Currently only Ocelot is supported.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Rob Herring <robh+dt@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Allan Nielsen <Allan.Nielsen@microsemi.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18854/
Signed-off-by: James Hogan <jhogan@kernel.org>
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Alexandre Belloni 2018-03-20 14:07:57 +01:00 committed by James Hogan
parent b3fd27e915
commit 2707177e86
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1 changed files with 43 additions and 0 deletions
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Documentation/devicetree/bindings/mips/mscc.txt Normal file
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* Microsemi MIPS CPUs
Boards with a SoC of the Microsemi MIPS family shall have the following
properties:
Required properties:
- compatible: "mscc,ocelot"
* Other peripherals:
o CPU chip regs:
The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous
functionalities: chip ID, general purpose register for software use, reset
controller, hardware status and configuration, efuses.
Required properties:
- compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
- reg : Should contain registers location and length
Example:
syscon@71070000 {
compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
reg = <0x71070000 0x1c>;
};
o CPU system control:
The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of
the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU
endianness, CPU bus control, CPU status.
Required properties:
- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
- reg : Should contain registers location and length
Example:
syscon@70000000 {
compatible = "mscc,ocelot-cpu-syscon", "syscon";
reg = <0x70000000 0x2c>;
};