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serial: stm32-usart: Correct CSIZE, bits, and parity

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[ Upstream commit 1deeda8d28 ]

Add CSIZE sanitization for unsupported CSIZE configurations. In
addition, if parity is asked for but CSx was unsupported, the sensible
result is CS8+parity which requires setting USART_CR1_M0 like with 9
bits.

Incorrect CSIZE results in miscalculation of the frame bits in
tty_get_char_size() or in its predecessor where the roughly the same
code is directly within uart_update_timeout().

Fixes: c8a9d04394 (serial: stm32: fix word length configuration)
Cc: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20220519081808.3776-9-ilpo.jarvinen@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Ilpo Järvinen 2022-05-19 11:18:07 +03:00 committed by Greg Kroah-Hartman
parent 2b5a7b222d
commit 27edfc4a97
1 changed files with 12 additions and 3 deletions
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15
drivers/tty/serial/stm32-usart.c
View file

@ -1037,13 +1037,22 @@ static void stm32_usart_set_termios(struct uart_port *port,
* CS8 or (CS7 + parity), 8 bits word aka [M1:M0] = 0b00
* M0 and M1 already cleared by cr1 initialization.
*/
if (bits == 9)
if (bits == 9) {
cr1 |= USART_CR1_M0;
else if ((bits == 7) && cfg->has_7bits_data)
} else if ((bits == 7) && cfg->has_7bits_data) {
cr1 |= USART_CR1_M1;
else if (bits != 8)
} else if (bits != 8) {
dev_dbg(port->dev, "Unsupported data bits config: %u bits\n"
, bits);
cflag &= ~CSIZE;
cflag |= CS8;
termios->c_cflag = cflag;
bits = 8;
if (cflag & PARENB) {
bits++;
cr1 |= USART_CR1_M0;
}
}
if (ofs->rtor != UNDEF_REG && (stm32_port->rx_ch ||
(stm32_port->fifoen &&