mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-24 01:41:39 +00:00
Merge remote-tracking branch 'takashi/topic/drm-sync-audio-rate' into drm-intel-next-queued
Pull in the i915/hda changes for N/CTS setting so I can apply the follow-up documentation work for drm/i915. Some conflicts because ofc we had to rework i915 while that N/CTS work was going on. But not more than adjacent changes really. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
This commit is contained in:
commit
2844659842
5 changed files with 220 additions and 1 deletions
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@ -925,6 +925,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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mutex_init(&dev_priv->sb_lock);
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mutex_init(&dev_priv->modeset_restore_lock);
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mutex_init(&dev_priv->csr_lock);
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mutex_init(&dev_priv->av_mutex);
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intel_pm_setup(dev);
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@ -1888,6 +1888,11 @@ struct drm_i915_private {
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/* hda/i915 audio component */
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struct i915_audio_component *audio_component;
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bool audio_component_registered;
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/**
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* av_mutex - mutex for audio/video sync
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*
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*/
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struct mutex av_mutex;
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uint32_t hw_context_size;
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struct list_head context_list;
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@ -68,6 +68,31 @@ static const struct {
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{ 148500, AUD_CONFIG_PIXEL_CLOCK_HDMI_148500 },
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};
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/* HDMI N/CTS table */
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#define TMDS_297M 297000
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#define TMDS_296M DIV_ROUND_UP(297000 * 1000, 1001)
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static const struct {
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int sample_rate;
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int clock;
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int n;
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int cts;
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} aud_ncts[] = {
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{ 44100, TMDS_296M, 4459, 234375 },
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{ 44100, TMDS_297M, 4704, 247500 },
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{ 48000, TMDS_296M, 5824, 281250 },
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{ 48000, TMDS_297M, 5120, 247500 },
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{ 32000, TMDS_296M, 5824, 421875 },
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{ 32000, TMDS_297M, 3072, 222750 },
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{ 88200, TMDS_296M, 8918, 234375 },
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{ 88200, TMDS_297M, 9408, 247500 },
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{ 96000, TMDS_296M, 11648, 281250 },
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{ 96000, TMDS_297M, 10240, 247500 },
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{ 176400, TMDS_296M, 17836, 234375 },
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{ 176400, TMDS_297M, 18816, 247500 },
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{ 192000, TMDS_296M, 23296, 281250 },
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{ 192000, TMDS_297M, 20480, 247500 },
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};
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/* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */
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static u32 audio_config_hdmi_pixel_clock(const struct drm_display_mode *adjusted_mode)
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{
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@ -91,6 +116,45 @@ static u32 audio_config_hdmi_pixel_clock(const struct drm_display_mode *adjusted
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return hdmi_audio_clock[i].config;
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}
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static int audio_config_get_n(const struct drm_display_mode *mode, int rate)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(aud_ncts); i++) {
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if ((rate == aud_ncts[i].sample_rate) &&
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(mode->clock == aud_ncts[i].clock)) {
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return aud_ncts[i].n;
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}
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}
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return 0;
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}
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static uint32_t audio_config_setup_n_reg(int n, uint32_t val)
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{
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int n_low, n_up;
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uint32_t tmp = val;
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n_low = n & 0xfff;
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n_up = (n >> 12) & 0xff;
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tmp &= ~(AUD_CONFIG_UPPER_N_MASK | AUD_CONFIG_LOWER_N_MASK);
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tmp |= ((n_up << AUD_CONFIG_UPPER_N_SHIFT) |
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(n_low << AUD_CONFIG_LOWER_N_SHIFT) |
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AUD_CONFIG_N_PROG_ENABLE);
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return tmp;
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}
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/* check whether N/CTS/M need be set manually */
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static bool audio_rate_need_prog(struct intel_crtc *crtc,
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const struct drm_display_mode *mode)
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{
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if (((mode->clock == TMDS_297M) ||
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(mode->clock == TMDS_296M)) &&
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intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI))
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return true;
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else
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return false;
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}
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static bool intel_eld_uptodate(struct drm_connector *connector,
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int reg_eldv, uint32_t bits_eldv,
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int reg_elda, uint32_t bits_elda,
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@ -185,6 +249,8 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder)
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DRM_DEBUG_KMS("Disable audio codec on pipe %c\n", pipe_name(pipe));
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mutex_lock(&dev_priv->av_mutex);
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/* Disable timestamps */
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tmp = I915_READ(HSW_AUD_CFG(pipe));
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tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
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@ -200,6 +266,8 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder)
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tmp &= ~AUDIO_ELD_VALID(pipe);
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tmp &= ~AUDIO_OUTPUT_ENABLE(pipe);
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I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
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mutex_unlock(&dev_priv->av_mutex);
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}
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static void hsw_audio_codec_enable(struct drm_connector *connector,
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@ -209,13 +277,20 @@ static void hsw_audio_codec_enable(struct drm_connector *connector,
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struct drm_i915_private *dev_priv = connector->dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
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enum pipe pipe = intel_crtc->pipe;
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struct i915_audio_component *acomp = dev_priv->audio_component;
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const uint8_t *eld = connector->eld;
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struct intel_digital_port *intel_dig_port =
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enc_to_dig_port(&encoder->base);
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enum port port = intel_dig_port->port;
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uint32_t tmp;
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int len, i;
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int n, rate;
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DRM_DEBUG_KMS("Enable audio codec on pipe %c, %u bytes ELD\n",
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pipe_name(pipe), drm_eld_size(eld));
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mutex_lock(&dev_priv->av_mutex);
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/* Enable audio presence detect, invalidate ELD */
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tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
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tmp |= AUDIO_OUTPUT_ENABLE(pipe);
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@ -247,13 +322,32 @@ static void hsw_audio_codec_enable(struct drm_connector *connector,
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/* Enable timestamps */
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tmp = I915_READ(HSW_AUD_CFG(pipe));
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tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
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tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
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tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
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if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT))
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tmp |= AUD_CONFIG_N_VALUE_INDEX;
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else
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tmp |= audio_config_hdmi_pixel_clock(adjusted_mode);
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tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
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if (audio_rate_need_prog(intel_crtc, adjusted_mode)) {
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if (!acomp)
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rate = 0;
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else if (port >= PORT_A && port <= PORT_E)
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rate = acomp->aud_sample_rate[port];
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else {
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DRM_ERROR("invalid port: %d\n", port);
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rate = 0;
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}
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n = audio_config_get_n(adjusted_mode, rate);
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if (n != 0)
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tmp = audio_config_setup_n_reg(n, tmp);
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else
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DRM_DEBUG_KMS("no suitable N value is found\n");
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}
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I915_WRITE(HSW_AUD_CFG(pipe), tmp);
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mutex_unlock(&dev_priv->av_mutex);
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}
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static void ilk_audio_codec_disable(struct intel_encoder *encoder)
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@ -529,12 +623,91 @@ static int i915_audio_component_get_cdclk_freq(struct device *dev)
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return ret;
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}
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static int i915_audio_component_sync_audio_rate(struct device *dev,
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int port, int rate)
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{
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struct drm_i915_private *dev_priv = dev_to_i915(dev);
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struct drm_device *drm_dev = dev_priv->dev;
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struct intel_encoder *intel_encoder;
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struct intel_digital_port *intel_dig_port;
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struct intel_crtc *crtc;
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struct drm_display_mode *mode;
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struct i915_audio_component *acomp = dev_priv->audio_component;
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enum pipe pipe = -1;
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u32 tmp;
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int n;
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/* HSW, BDW SKL need this fix */
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if (!IS_SKYLAKE(dev_priv) &&
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!IS_BROADWELL(dev_priv) &&
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!IS_HASWELL(dev_priv))
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return 0;
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mutex_lock(&dev_priv->av_mutex);
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/* 1. get the pipe */
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for_each_intel_encoder(drm_dev, intel_encoder) {
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if (intel_encoder->type != INTEL_OUTPUT_HDMI)
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continue;
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intel_dig_port = enc_to_dig_port(&intel_encoder->base);
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if (port == intel_dig_port->port) {
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crtc = to_intel_crtc(intel_encoder->base.crtc);
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if (!crtc) {
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DRM_DEBUG_KMS("%s: crtc is NULL\n", __func__);
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continue;
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}
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pipe = crtc->pipe;
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break;
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}
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}
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if (pipe == INVALID_PIPE) {
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DRM_DEBUG_KMS("no pipe for the port %c\n", port_name(port));
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mutex_unlock(&dev_priv->av_mutex);
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return -ENODEV;
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}
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DRM_DEBUG_KMS("pipe %c connects port %c\n",
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pipe_name(pipe), port_name(port));
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mode = &crtc->config->base.adjusted_mode;
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/* port must be valid now, otherwise the pipe will be invalid */
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acomp->aud_sample_rate[port] = rate;
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/* 2. check whether to set the N/CTS/M manually or not */
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if (!audio_rate_need_prog(crtc, mode)) {
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tmp = I915_READ(HSW_AUD_CFG(pipe));
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tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
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I915_WRITE(HSW_AUD_CFG(pipe), tmp);
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mutex_unlock(&dev_priv->av_mutex);
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return 0;
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}
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n = audio_config_get_n(mode, rate);
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if (n == 0) {
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DRM_DEBUG_KMS("Using automatic mode for N value on port %c\n",
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port_name(port));
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tmp = I915_READ(HSW_AUD_CFG(pipe));
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tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
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I915_WRITE(HSW_AUD_CFG(pipe), tmp);
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mutex_unlock(&dev_priv->av_mutex);
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return 0;
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}
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/* 3. set the N/CTS/M */
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tmp = I915_READ(HSW_AUD_CFG(pipe));
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tmp = audio_config_setup_n_reg(n, tmp);
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I915_WRITE(HSW_AUD_CFG(pipe), tmp);
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mutex_unlock(&dev_priv->av_mutex);
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return 0;
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}
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static const struct i915_audio_component_ops i915_audio_component_ops = {
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.owner = THIS_MODULE,
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.get_power = i915_audio_component_get_power,
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.put_power = i915_audio_component_put_power,
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.codec_wake_override = i915_audio_component_codec_wake_override,
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.get_cdclk_freq = i915_audio_component_get_cdclk_freq,
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.sync_audio_rate = i915_audio_component_sync_audio_rate,
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};
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static int i915_audio_component_bind(struct device *i915_dev,
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@ -542,6 +715,7 @@ static int i915_audio_component_bind(struct device *i915_dev,
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{
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struct i915_audio_component *acomp = data;
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struct drm_i915_private *dev_priv = dev_to_i915(i915_dev);
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int i;
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if (WARN_ON(acomp->ops || acomp->dev))
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return -EEXIST;
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@ -549,6 +723,9 @@ static int i915_audio_component_bind(struct device *i915_dev,
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drm_modeset_lock_all(dev_priv->dev);
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acomp->ops = &i915_audio_component_ops;
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acomp->dev = i915_dev;
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BUILD_BUG_ON(MAX_PORTS != I915_MAX_PORTS);
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for (i = 0; i < ARRAY_SIZE(acomp->aud_sample_rate); i++)
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acomp->aud_sample_rate[i] = 0;
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dev_priv->audio_component = acomp;
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drm_modeset_unlock_all(dev_priv->dev);
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@ -24,8 +24,18 @@
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#ifndef _I915_COMPONENT_H_
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#define _I915_COMPONENT_H_
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/* MAX_PORT is the number of port
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* It must be sync with I915_MAX_PORTS defined i915_drv.h
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* 5 should be enough as only HSW, BDW, SKL need such fix.
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*/
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#define MAX_PORTS 5
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struct i915_audio_component {
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struct device *dev;
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/**
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* @aud_sample_rate: the array of audio sample rate per port
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*/
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int aud_sample_rate[MAX_PORTS];
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const struct i915_audio_component_ops {
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struct module *owner;
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@ -33,6 +43,13 @@ struct i915_audio_component {
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void (*put_power)(struct device *);
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void (*codec_wake_override)(struct device *, bool enable);
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int (*get_cdclk_freq)(struct device *);
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/**
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* @sync_audio_rate: set n/cts based on the sample rate
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*
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* Called from audio driver. After audio driver sets the
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* sample rate, it will call this function to set n/cts
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*/
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int (*sync_audio_rate)(struct device *, int port, int rate);
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} *ops;
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const struct i915_audio_component_audio_ops {
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@ -1775,6 +1775,16 @@ static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
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return non_pcm;
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}
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/* There is a fixed mapping between audio pin node and display port
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* on current Intel platforms:
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* Pin Widget 5 - PORT B (port = 1 in i915 driver)
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* Pin Widget 6 - PORT C (port = 2 in i915 driver)
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* Pin Widget 7 - PORT D (port = 3 in i915 driver)
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*/
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static int intel_pin2port(hda_nid_t pin_nid)
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{
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return pin_nid - 4;
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}
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/*
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* HDMI callbacks
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@ -1791,6 +1801,8 @@ static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
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int pin_idx = hinfo_to_pin_index(codec, hinfo);
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struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
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hda_nid_t pin_nid = per_pin->pin_nid;
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct i915_audio_component *acomp = codec->bus->core.audio_component;
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bool non_pcm;
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int pinctl;
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@ -1807,6 +1819,13 @@ static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
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intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
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}
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/* Call sync_audio_rate to set the N/CTS/M manually if necessary */
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/* Todo: add DP1.2 MST audio support later */
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if (acomp && acomp->ops && acomp->ops->sync_audio_rate)
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acomp->ops->sync_audio_rate(acomp->dev,
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intel_pin2port(pin_nid),
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runtime->rate);
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non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
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mutex_lock(&per_pin->lock);
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per_pin->channels = substream->runtime->channels;
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