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arm64: dts: qcom: sm8550: Separate out X3 idle state
The X3 core has different entry/exit/residency time requirements than
the big cluster. Denote them to stop confusing the scheduler.
Fixes: ffc50b2d38
("arm64: dts: qcom: Add base SM8550 dtsi")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-11-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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parent
5c0dbe8b05
commit
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1 changed files with 11 additions and 1 deletions
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@ -300,6 +300,16 @@ BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
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min-residency-us = <4791>;
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local-timer-stop;
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};
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PRIME_CPU_SLEEP_0: cpu-sleep-2-0 {
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compatible = "arm,idle-state";
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idle-state-name = "goldplus-rail-power-collapse";
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arm,psci-suspend-param = <0x40000004>;
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entry-latency-us = <500>;
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exit-latency-us = <1350>;
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min-residency-us = <7480>;
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local-timer-stop;
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};
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};
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domain-idle-states {
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@ -401,7 +411,7 @@ CPU_PD6: power-domain-cpu6 {
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CPU_PD7: power-domain-cpu7 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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domain-idle-states = <&BIG_CPU_SLEEP_0>;
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domain-idle-states = <&PRIME_CPU_SLEEP_0>;
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};
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CLUSTER_PD: power-domain-cluster {
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