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Code Issues Releases Wiki Activity

drm/msm/dpu: use devres-managed allocation for HW blocks

Browse source 
[ Upstream commit a106ed98af ]

Use devm_kzalloc to create HW block structure. This allows us to remove
corresponding kfree and drop all dpu_hw_*_destroy() functions as well as
dpu_rm_destroy(), which becomes empty afterwards.

Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/570041/
Link: https://lore.kernel.org/r/20231201211845.1026967-7-dmitry.baryshkov@linaro.org
Stable-dep-of: 49e27d3c9c ("drm/msm/dpu: finalise global state object")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2023-12-02 00:18:38 +03:00 committed by Sasha Levin
parent 5ac7a24d0a
commit 28cbb296c8
23 changed files with 127 additions and 247 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
View file

@ -4,6 +4,9 @@
*/
#include <linux/delay.h>
#include <drm/drm_managed.h>
#include "dpu_hwio.h"
#include "dpu_hw_ctl.h"
#include "dpu_kms.h"
@ -680,14 +683,15 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops,
ops->set_active_pipes = dpu_hw_ctl_set_fetch_pipe_active;
};
struct dpu_hw_ctl *dpu_hw_ctl_init(const struct dpu_ctl_cfg *cfg,
void __iomem *addr,
u32 mixer_count,
const struct dpu_lm_cfg *mixer)
struct dpu_hw_ctl *dpu_hw_ctl_init(struct drm_device *dev,
const struct dpu_ctl_cfg *cfg,
void __iomem *addr,
u32 mixer_count,
const struct dpu_lm_cfg *mixer)
{
struct dpu_hw_ctl *c;
c = kzalloc(sizeof(*c), GFP_KERNEL);
c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
@ -702,8 +706,3 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(const struct dpu_ctl_cfg *cfg,
return c;
}
void dpu_hw_ctl_destroy(struct dpu_hw_ctl *ctx)
{
kfree(ctx);
}

16
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
View file

@ -274,20 +274,16 @@ static inline struct dpu_hw_ctl *to_dpu_hw_ctl(struct dpu_hw_blk *hw)
/**
* dpu_hw_ctl_init() - Initializes the ctl_path hw driver object.
* Should be called before accessing any ctl_path register.
* @dev: Corresponding device for devres management
* @cfg: ctl_path catalog entry for which driver object is required
* @addr: mapped register io address of MDP
* @mixer_count: Number of mixers in @mixer
* @mixer: Pointer to an array of Layer Mixers defined in the catalog
*/
struct dpu_hw_ctl *dpu_hw_ctl_init(const struct dpu_ctl_cfg *cfg,
void __iomem *addr,
u32 mixer_count,
const struct dpu_lm_cfg *mixer);
/**
* dpu_hw_ctl_destroy(): Destroys ctl driver context
* should be called to free the context
*/
void dpu_hw_ctl_destroy(struct dpu_hw_ctl *ctx);
struct dpu_hw_ctl *dpu_hw_ctl_init(struct drm_device *dev,
const struct dpu_ctl_cfg *cfg,
void __iomem *addr,
u32 mixer_count,
const struct dpu_lm_cfg *mixer);
#endif /*_DPU_HW_CTL_H */

12
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
View file

@ -3,6 +3,8 @@
* Copyright (c) 2020-2022, Linaro Limited
*/
#include <drm/drm_managed.h>
#include <drm/display/drm_dsc_helper.h>
#include "dpu_kms.h"
@ -188,12 +190,13 @@ static void _setup_dsc_ops(struct dpu_hw_dsc_ops *ops,
ops->dsc_bind_pingpong_blk = dpu_hw_dsc_bind_pingpong_blk;
};
struct dpu_hw_dsc *dpu_hw_dsc_init(const struct dpu_dsc_cfg *cfg,
struct dpu_hw_dsc *dpu_hw_dsc_init(struct drm_device *dev,
const struct dpu_dsc_cfg *cfg,
void __iomem *addr)
{
struct dpu_hw_dsc *c;
c = kzalloc(sizeof(*c), GFP_KERNEL);
c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
@ -206,8 +209,3 @@ struct dpu_hw_dsc *dpu_hw_dsc_init(const struct dpu_dsc_cfg *cfg,
return c;
}
void dpu_hw_dsc_destroy(struct dpu_hw_dsc *dsc)
{
kfree(dsc);
}

10
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
View file

@ -64,20 +64,24 @@ struct dpu_hw_dsc {
/**
* dpu_hw_dsc_init() - Initializes the DSC hw driver object.
* @dev: Corresponding device for devres management
* @cfg: DSC catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
* Return: Error code or allocated dpu_hw_dsc context
*/
struct dpu_hw_dsc *dpu_hw_dsc_init(const struct dpu_dsc_cfg *cfg,
void __iomem *addr);
struct dpu_hw_dsc *dpu_hw_dsc_init(struct drm_device *dev,
const struct dpu_dsc_cfg *cfg,
void __iomem *addr);
/**
* dpu_hw_dsc_init_1_2() - initializes the v1.2 DSC hw driver object
* @dev: Corresponding device for devres management
* @cfg: DSC catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
* Returns: Error code or allocated dpu_hw_dsc context
*/
struct dpu_hw_dsc *dpu_hw_dsc_init_1_2(const struct dpu_dsc_cfg *cfg,
struct dpu_hw_dsc *dpu_hw_dsc_init_1_2(struct drm_device *dev,
const struct dpu_dsc_cfg *cfg,
void __iomem *addr);
/**

7
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c
View file

@ -4,6 +4,8 @@
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved
*/
#include <drm/drm_managed.h>
#include <drm/display/drm_dsc_helper.h>
#include "dpu_kms.h"
@ -367,12 +369,13 @@ static void _setup_dcs_ops_1_2(struct dpu_hw_dsc_ops *ops,
ops->dsc_bind_pingpong_blk = dpu_hw_dsc_bind_pingpong_blk_1_2;
}
struct dpu_hw_dsc *dpu_hw_dsc_init_1_2(const struct dpu_dsc_cfg *cfg,
struct dpu_hw_dsc *dpu_hw_dsc_init_1_2(struct drm_device *dev,
const struct dpu_dsc_cfg *cfg,
void __iomem *addr)
{
struct dpu_hw_dsc *c;
c = kzalloc(sizeof(*c), GFP_KERNEL);
c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);

16
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
View file

@ -2,6 +2,8 @@
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*/
#include <drm/drm_managed.h>
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
#include "dpu_hw_lm.h"
@ -68,15 +70,16 @@ static void _setup_dspp_ops(struct dpu_hw_dspp *c,
c->ops.setup_pcc = dpu_setup_dspp_pcc;
}
struct dpu_hw_dspp *dpu_hw_dspp_init(const struct dpu_dspp_cfg *cfg,
void __iomem *addr)
struct dpu_hw_dspp *dpu_hw_dspp_init(struct drm_device *dev,
const struct dpu_dspp_cfg *cfg,
void __iomem *addr)
{
struct dpu_hw_dspp *c;
if (!addr)
return ERR_PTR(-EINVAL);
c = kzalloc(sizeof(*c), GFP_KERNEL);
c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
@ -90,10 +93,3 @@ struct dpu_hw_dspp *dpu_hw_dspp_init(const struct dpu_dspp_cfg *cfg,
return c;
}
void dpu_hw_dspp_destroy(struct dpu_hw_dspp *dspp)
{
kfree(dspp);
}

12
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.h
View file

@ -81,18 +81,14 @@ static inline struct dpu_hw_dspp *to_dpu_hw_dspp(struct dpu_hw_blk *hw)
/**
* dpu_hw_dspp_init() - Initializes the DSPP hw driver object.
* should be called once before accessing every DSPP.
* @dev: Corresponding device for devres management
* @cfg: DSPP catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
* Return: pointer to structure or ERR_PTR
*/
struct dpu_hw_dspp *dpu_hw_dspp_init(const struct dpu_dspp_cfg *cfg,
void __iomem *addr);
/**
* dpu_hw_dspp_destroy(): Destroys DSPP driver context
* @dspp: Pointer to DSPP driver context
*/
void dpu_hw_dspp_destroy(struct dpu_hw_dspp *dspp);
struct dpu_hw_dspp *dpu_hw_dspp_init(struct drm_device *dev,
const struct dpu_dspp_cfg *cfg,
void __iomem *addr);
#endif /*_DPU_HW_DSPP_H */

16
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
View file

@ -12,6 +12,8 @@
#include <linux/iopoll.h>
#include <drm/drm_managed.h>
#define INTF_TIMING_ENGINE_EN 0x000
#define INTF_CONFIG 0x004
#define INTF_HSYNC_CTL 0x008
@ -530,8 +532,10 @@ static void dpu_hw_intf_program_intf_cmd_cfg(struct dpu_hw_intf *ctx,
DPU_REG_WRITE(&ctx->hw, INTF_CONFIG2, intf_cfg2);
}
struct dpu_hw_intf *dpu_hw_intf_init(const struct dpu_intf_cfg *cfg,
void __iomem *addr, const struct dpu_mdss_version *mdss_rev)
struct dpu_hw_intf *dpu_hw_intf_init(struct drm_device *dev,
const struct dpu_intf_cfg *cfg,
void __iomem *addr,
const struct dpu_mdss_version *mdss_rev)
{
struct dpu_hw_intf *c;
@ -540,7 +544,7 @@ struct dpu_hw_intf *dpu_hw_intf_init(const struct dpu_intf_cfg *cfg,
return NULL;
}
c = kzalloc(sizeof(*c), GFP_KERNEL);
c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
@ -584,9 +588,3 @@ struct dpu_hw_intf *dpu_hw_intf_init(const struct dpu_intf_cfg *cfg,
return c;
}
void dpu_hw_intf_destroy(struct dpu_hw_intf *intf)
{
kfree(intf);
}

13
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
View file

@ -132,17 +132,14 @@ struct dpu_hw_intf {
/**
* dpu_hw_intf_init() - Initializes the INTF driver for the passed
* interface catalog entry.
* @dev: Corresponding device for devres management
* @cfg: interface catalog entry for which driver object is required
* @addr: mapped register io address of MDP
* @mdss_rev: dpu core's major and minor versions
*/
struct dpu_hw_intf *dpu_hw_intf_init(const struct dpu_intf_cfg *cfg,
void __iomem *addr, const struct dpu_mdss_version *mdss_rev);
/**
* dpu_hw_intf_destroy(): Destroys INTF driver context
* @intf: Pointer to INTF driver context
*/
void dpu_hw_intf_destroy(struct dpu_hw_intf *intf);
struct dpu_hw_intf *dpu_hw_intf_init(struct drm_device *dev,
const struct dpu_intf_cfg *cfg,
void __iomem *addr,
const struct dpu_mdss_version *mdss_rev);
#endif /*_DPU_HW_INTF_H */

14
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
View file

@ -4,6 +4,8 @@
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
*/
#include <drm/drm_managed.h>
#include "dpu_kms.h"
#include "dpu_hw_catalog.h"
#include "dpu_hwio.h"
@ -156,8 +158,9 @@ static void _setup_mixer_ops(struct dpu_hw_lm_ops *ops,
ops->collect_misr = dpu_hw_lm_collect_misr;
}
struct dpu_hw_mixer *dpu_hw_lm_init(const struct dpu_lm_cfg *cfg,
void __iomem *addr)
struct dpu_hw_mixer *dpu_hw_lm_init(struct drm_device *dev,
const struct dpu_lm_cfg *cfg,
void __iomem *addr)
{
struct dpu_hw_mixer *c;
@ -166,7 +169,7 @@ struct dpu_hw_mixer *dpu_hw_lm_init(const struct dpu_lm_cfg *cfg,
return NULL;
}
c = kzalloc(sizeof(*c), GFP_KERNEL);
c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
@ -180,8 +183,3 @@ struct dpu_hw_mixer *dpu_hw_lm_init(const struct dpu_lm_cfg *cfg,
return c;
}
void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm)
{
kfree(lm);
}

12
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
View file

@ -96,16 +96,12 @@ static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw)
/**
* dpu_hw_lm_init() - Initializes the mixer hw driver object.
* should be called once before accessing every mixer.
* @dev: Corresponding device for devres management
* @cfg: mixer catalog entry for which driver object is required
* @addr: mapped register io address of MDP
*/
struct dpu_hw_mixer *dpu_hw_lm_init(const struct dpu_lm_cfg *cfg,
void __iomem *addr);
/**
* dpu_hw_lm_destroy(): Destroys layer mixer driver context
* @lm: Pointer to LM driver context
*/
void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm);
struct dpu_hw_mixer *dpu_hw_lm_init(struct drm_device *dev,
const struct dpu_lm_cfg *cfg,
void __iomem *addr);
#endif /*_DPU_HW_LM_H */

14
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
View file

@ -4,6 +4,8 @@
#include <linux/iopoll.h>
#include <drm/drm_managed.h>
#include "dpu_hw_mdss.h"
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
@ -37,12 +39,13 @@ static void _setup_merge_3d_ops(struct dpu_hw_merge_3d *c,
c->ops.setup_3d_mode = dpu_hw_merge_3d_setup_3d_mode;
};
struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(const struct dpu_merge_3d_cfg *cfg,
void __iomem *addr)
struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(struct drm_device *dev,
const struct dpu_merge_3d_cfg *cfg,
void __iomem *addr)
{
struct dpu_hw_merge_3d *c;
c = kzalloc(sizeof(*c), GFP_KERNEL);
c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
@ -55,8 +58,3 @@ struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(const struct dpu_merge_3d_cfg *cfg,
return c;
}
void dpu_hw_merge_3d_destroy(struct dpu_hw_merge_3d *hw)
{
kfree(hw);
}

13
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.h
View file

@ -48,18 +48,13 @@ static inline struct dpu_hw_merge_3d *to_dpu_hw_merge_3d(struct dpu_hw_blk *hw)
/**
* dpu_hw_merge_3d_init() - Initializes the merge_3d driver for the passed
* merge3d catalog entry.
* @dev: Corresponding device for devres management
* @cfg: Pingpong catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
* Return: Error code or allocated dpu_hw_merge_3d context
*/
struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(const struct dpu_merge_3d_cfg *cfg,
void __iomem *addr);
/**
* dpu_hw_merge_3d_destroy - destroys merge_3d driver context
* should be called to free the context
* @pp: Pointer to PP driver context returned by dpu_hw_merge_3d_init
*/
void dpu_hw_merge_3d_destroy(struct dpu_hw_merge_3d *pp);
struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(struct drm_device *dev,
const struct dpu_merge_3d_cfg *cfg,
void __iomem *addr);
#endif /*_DPU_HW_MERGE3D_H */

15
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
View file

@ -4,6 +4,8 @@
#include <linux/iopoll.h>
#include <drm/drm_managed.h>
#include "dpu_hw_mdss.h"
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
@ -281,12 +283,14 @@ static int dpu_hw_pp_setup_dsc(struct dpu_hw_pingpong *pp)
return 0;
}
struct dpu_hw_pingpong *dpu_hw_pingpong_init(const struct dpu_pingpong_cfg *cfg,
void __iomem *addr, const struct dpu_mdss_version *mdss_rev)
struct dpu_hw_pingpong *dpu_hw_pingpong_init(struct drm_device *dev,
const struct dpu_pingpong_cfg *cfg,
void __iomem *addr,
const struct dpu_mdss_version *mdss_rev)
{
struct dpu_hw_pingpong *c;
c = kzalloc(sizeof(*c), GFP_KERNEL);
c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
@ -317,8 +321,3 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(const struct dpu_pingpong_cfg *cfg,
return c;
}
void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp)
{
kfree(pp);
}

14
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h
View file

@ -121,19 +121,15 @@ static inline struct dpu_hw_pingpong *to_dpu_hw_pingpong(struct dpu_hw_blk *hw)
/**
* dpu_hw_pingpong_init() - initializes the pingpong driver for the passed
* pingpong catalog entry.
* @dev: Corresponding device for devres management
* @cfg: Pingpong catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
* @mdss_rev: dpu core's major and minor versions
* Return: Error code or allocated dpu_hw_pingpong context
*/
struct dpu_hw_pingpong *dpu_hw_pingpong_init(const struct dpu_pingpong_cfg *cfg,
void __iomem *addr, const struct dpu_mdss_version *mdss_rev);
/**
* dpu_hw_pingpong_destroy - destroys pingpong driver context
* should be called to free the context
* @pp: Pointer to PP driver context returned by dpu_hw_pingpong_init
*/
void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp);
struct dpu_hw_pingpong *dpu_hw_pingpong_init(struct drm_device *dev,
const struct dpu_pingpong_cfg *cfg,
void __iomem *addr,
const struct dpu_mdss_version *mdss_rev);
#endif /*_DPU_HW_PINGPONG_H */

17
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
View file

@ -11,6 +11,7 @@
#include "msm_mdss.h"
#include <drm/drm_file.h>
#include <drm/drm_managed.h>
#define DPU_FETCH_CONFIG_RESET_VALUE 0x00000087
@ -685,16 +686,18 @@ int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp *hw_pipe, struct dpu_kms *kms,
}
#endif
struct dpu_hw_sspp *dpu_hw_sspp_init(const struct dpu_sspp_cfg *cfg,
void __iomem *addr, const struct msm_mdss_data *mdss_data,
const struct dpu_mdss_version *mdss_rev)
struct dpu_hw_sspp *dpu_hw_sspp_init(struct drm_device *dev,
const struct dpu_sspp_cfg *cfg,
void __iomem *addr,
const struct msm_mdss_data *mdss_data,
const struct dpu_mdss_version *mdss_rev)
{
struct dpu_hw_sspp *hw_pipe;
if (!addr)
return ERR_PTR(-EINVAL);
hw_pipe = kzalloc(sizeof(*hw_pipe), GFP_KERNEL);
hw_pipe = drmm_kzalloc(dev, sizeof(*hw_pipe), GFP_KERNEL);
if (!hw_pipe)
return ERR_PTR(-ENOMEM);
@ -709,9 +712,3 @@ struct dpu_hw_sspp *dpu_hw_sspp_init(const struct dpu_sspp_cfg *cfg,
return hw_pipe;
}
void dpu_hw_sspp_destroy(struct dpu_hw_sspp *ctx)
{
kfree(ctx);
}

16
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
View file

@ -339,21 +339,17 @@ struct dpu_kms;
/**
* dpu_hw_sspp_init() - Initializes the sspp hw driver object.
* Should be called once before accessing every pipe.
* @dev: Corresponding device for devres management
* @cfg: Pipe catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
* @mdss_data: UBWC / MDSS configuration data
* @mdss_rev: dpu core's major and minor versions
*/
struct dpu_hw_sspp *dpu_hw_sspp_init(const struct dpu_sspp_cfg *cfg,
void __iomem *addr, const struct msm_mdss_data *mdss_data,
const struct dpu_mdss_version *mdss_rev);
/**
* dpu_hw_sspp_destroy(): Destroys SSPP driver context
* should be called during Hw pipe cleanup.
* @ctx: Pointer to SSPP driver context returned by dpu_hw_sspp_init
*/
void dpu_hw_sspp_destroy(struct dpu_hw_sspp *ctx);
struct dpu_hw_sspp *dpu_hw_sspp_init(struct drm_device *dev,
const struct dpu_sspp_cfg *cfg,
void __iomem *addr,
const struct msm_mdss_data *mdss_data,
const struct dpu_mdss_version *mdss_rev);
int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp *hw_pipe, struct dpu_kms *kms,
struct dentry *entry);

15
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
View file

@ -3,6 +3,8 @@
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved
*/
#include <drm/drm_managed.h>
#include "dpu_hw_mdss.h"
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
@ -211,15 +213,17 @@ static void _setup_wb_ops(struct dpu_hw_wb_ops *ops,
ops->setup_clk_force_ctrl = dpu_hw_wb_setup_clk_force_ctrl;
}
struct dpu_hw_wb *dpu_hw_wb_init(const struct dpu_wb_cfg *cfg,
void __iomem *addr, const struct dpu_mdss_version *mdss_rev)
struct dpu_hw_wb *dpu_hw_wb_init(struct drm_device *dev,
const struct dpu_wb_cfg *cfg,
void __iomem *addr,
const struct dpu_mdss_version *mdss_rev)
{
struct dpu_hw_wb *c;
if (!addr)
return ERR_PTR(-EINVAL);
c = kzalloc(sizeof(*c), GFP_KERNEL);
c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
@ -233,8 +237,3 @@ struct dpu_hw_wb *dpu_hw_wb_init(const struct dpu_wb_cfg *cfg,
return c;
}
void dpu_hw_wb_destroy(struct dpu_hw_wb *hw_wb)
{
kfree(hw_wb);
}

13
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h
View file

@ -76,18 +76,15 @@ struct dpu_hw_wb {
/**
* dpu_hw_wb_init() - Initializes the writeback hw driver object.
* @dev: Corresponding device for devres management
* @cfg: wb_path catalog entry for which driver object is required
* @addr: mapped register io address of MDP
* @mdss_rev: dpu core's major and minor versions
* Return: Error code or allocated dpu_hw_wb context
*/
struct dpu_hw_wb *dpu_hw_wb_init(const struct dpu_wb_cfg *cfg,
void __iomem *addr, const struct dpu_mdss_version *mdss_rev);
/**
* dpu_hw_wb_destroy(): Destroy writeback hw driver object.
* @hw_wb: Pointer to writeback hw driver object
*/
void dpu_hw_wb_destroy(struct dpu_hw_wb *hw_wb);
struct dpu_hw_wb *dpu_hw_wb_init(struct drm_device *dev,
const struct dpu_wb_cfg *cfg,
void __iomem *addr,
const struct dpu_mdss_version *mdss_rev);
#endif /*_DPU_HW_WB_H */

8
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
View file

@ -822,10 +822,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
}
}
if (dpu_kms->rm_init)
dpu_rm_destroy(&dpu_kms->rm);
dpu_kms->rm_init = false;
dpu_kms->catalog = NULL;
dpu_kms->hw_mdp = NULL;
@ -1102,14 +1098,12 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
goto power_error;
}
rc = dpu_rm_init(&dpu_kms->rm, dpu_kms->catalog, dpu_kms->mdss, dpu_kms->mmio);
rc = dpu_rm_init(dev, &dpu_kms->rm, dpu_kms->catalog, dpu_kms->mdss, dpu_kms->mmio);
if (rc) {
DPU_ERROR("rm init failed: %d\n", rc);
goto power_error;
}
dpu_kms->rm_init = true;
dpu_kms->hw_mdp = dpu_hw_mdptop_init(dev,
dpu_kms->catalog->mdp,
dpu_kms->mmio,

1
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
View file

@ -89,7 +89,6 @@ struct dpu_kms {
struct drm_private_obj global_state;
struct dpu_rm rm;
bool rm_init;
struct dpu_hw_vbif *hw_vbif[VBIF_MAX];
struct dpu_hw_mdp *hw_mdp;

90
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
View file

@ -34,72 +34,8 @@ struct dpu_rm_requirements {
struct msm_display_topology topology;
};
int dpu_rm_destroy(struct dpu_rm *rm)
{
int i;
for (i = 0; i < ARRAY_SIZE(rm->dspp_blks); i++) {
struct dpu_hw_dspp *hw;
if (rm->dspp_blks[i]) {
hw = to_dpu_hw_dspp(rm->dspp_blks[i]);
dpu_hw_dspp_destroy(hw);
}
}
for (i = 0; i < ARRAY_SIZE(rm->pingpong_blks); i++) {
struct dpu_hw_pingpong *hw;
if (rm->pingpong_blks[i]) {
hw = to_dpu_hw_pingpong(rm->pingpong_blks[i]);
dpu_hw_pingpong_destroy(hw);
}
}
for (i = 0; i < ARRAY_SIZE(rm->merge_3d_blks); i++) {
struct dpu_hw_merge_3d *hw;
if (rm->merge_3d_blks[i]) {
hw = to_dpu_hw_merge_3d(rm->merge_3d_blks[i]);
dpu_hw_merge_3d_destroy(hw);
}
}
for (i = 0; i < ARRAY_SIZE(rm->mixer_blks); i++) {
struct dpu_hw_mixer *hw;
if (rm->mixer_blks[i]) {
hw = to_dpu_hw_mixer(rm->mixer_blks[i]);
dpu_hw_lm_destroy(hw);
}
}
for (i = 0; i < ARRAY_SIZE(rm->ctl_blks); i++) {
struct dpu_hw_ctl *hw;
if (rm->ctl_blks[i]) {
hw = to_dpu_hw_ctl(rm->ctl_blks[i]);
dpu_hw_ctl_destroy(hw);
}
}
for (i = 0; i < ARRAY_SIZE(rm->hw_intf); i++)
dpu_hw_intf_destroy(rm->hw_intf[i]);
for (i = 0; i < ARRAY_SIZE(rm->dsc_blks); i++) {
struct dpu_hw_dsc *hw;
if (rm->dsc_blks[i]) {
hw = to_dpu_hw_dsc(rm->dsc_blks[i]);
dpu_hw_dsc_destroy(hw);
}
}
for (i = 0; i < ARRAY_SIZE(rm->hw_wb); i++)
dpu_hw_wb_destroy(rm->hw_wb[i]);
for (i = 0; i < ARRAY_SIZE(rm->hw_sspp); i++)
dpu_hw_sspp_destroy(rm->hw_sspp[i]);
return 0;
}
int dpu_rm_init(struct dpu_rm *rm,
int dpu_rm_init(struct drm_device *dev,
struct dpu_rm *rm,
const struct dpu_mdss_cfg *cat,
const struct msm_mdss_data *mdss_data,
void __iomem *mmio)
@ -119,7 +55,7 @@ int dpu_rm_init(struct dpu_rm *rm,
struct dpu_hw_mixer *hw;
const struct dpu_lm_cfg *lm = &cat->mixer[i];
hw = dpu_hw_lm_init(lm, mmio);
hw = dpu_hw_lm_init(dev, lm, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed lm object creation: err %d\n", rc);
@ -132,7 +68,7 @@ int dpu_rm_init(struct dpu_rm *rm,
struct dpu_hw_merge_3d *hw;
const struct dpu_merge_3d_cfg *merge_3d = &cat->merge_3d[i];
hw = dpu_hw_merge_3d_init(merge_3d, mmio);
hw = dpu_hw_merge_3d_init(dev, merge_3d, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed merge_3d object creation: err %d\n",
@ -146,7 +82,7 @@ int dpu_rm_init(struct dpu_rm *rm,
struct dpu_hw_pingpong *hw;
const struct dpu_pingpong_cfg *pp = &cat->pingpong[i];
hw = dpu_hw_pingpong_init(pp, mmio, cat->mdss_ver);
hw = dpu_hw_pingpong_init(dev, pp, mmio, cat->mdss_ver);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed pingpong object creation: err %d\n",
@ -162,7 +98,7 @@ int dpu_rm_init(struct dpu_rm *rm,
struct dpu_hw_intf *hw;
const struct dpu_intf_cfg *intf = &cat->intf[i];
hw = dpu_hw_intf_init(intf, mmio, cat->mdss_ver);
hw = dpu_hw_intf_init(dev, intf, mmio, cat->mdss_ver);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed intf object creation: err %d\n", rc);
@ -175,7 +111,7 @@ int dpu_rm_init(struct dpu_rm *rm,
struct dpu_hw_wb *hw;
const struct dpu_wb_cfg *wb = &cat->wb[i];
hw = dpu_hw_wb_init(wb, mmio, cat->mdss_ver);
hw = dpu_hw_wb_init(dev, wb, mmio, cat->mdss_ver);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed wb object creation: err %d\n", rc);
@ -188,7 +124,7 @@ int dpu_rm_init(struct dpu_rm *rm,
struct dpu_hw_ctl *hw;
const struct dpu_ctl_cfg *ctl = &cat->ctl[i];
hw = dpu_hw_ctl_init(ctl, mmio, cat->mixer_count, cat->mixer);
hw = dpu_hw_ctl_init(dev, ctl, mmio, cat->mixer_count, cat->mixer);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed ctl object creation: err %d\n", rc);
@ -201,7 +137,7 @@ int dpu_rm_init(struct dpu_rm *rm,
struct dpu_hw_dspp *hw;
const struct dpu_dspp_cfg *dspp = &cat->dspp[i];
hw = dpu_hw_dspp_init(dspp, mmio);
hw = dpu_hw_dspp_init(dev, dspp, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed dspp object creation: err %d\n", rc);
@ -215,9 +151,9 @@ int dpu_rm_init(struct dpu_rm *rm,
const struct dpu_dsc_cfg *dsc = &cat->dsc[i];
if (test_bit(DPU_DSC_HW_REV_1_2, &dsc->features))
hw = dpu_hw_dsc_init_1_2(dsc, mmio);
hw = dpu_hw_dsc_init_1_2(dev, dsc, mmio);
else
hw = dpu_hw_dsc_init(dsc, mmio);
hw = dpu_hw_dsc_init(dev, dsc, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
@ -231,7 +167,7 @@ int dpu_rm_init(struct dpu_rm *rm,
struct dpu_hw_sspp *hw;
const struct dpu_sspp_cfg *sspp = &cat->sspp[i];
hw = dpu_hw_sspp_init(sspp, mmio, mdss_data, cat->mdss_ver);
hw = dpu_hw_sspp_init(dev, sspp, mmio, mdss_data, cat->mdss_ver);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed sspp object creation: err %d\n", rc);
@ -243,8 +179,6 @@ int dpu_rm_init(struct dpu_rm *rm,
return 0;
fail:
dpu_rm_destroy(rm);
return rc ? rc : -EFAULT;
}

11
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
View file

@ -38,24 +38,19 @@ struct dpu_rm {
/**
* dpu_rm_init - Read hardware catalog and create reservation tracking objects
* for all HW blocks.
* @dev: Corresponding device for devres management
* @rm: DPU Resource Manager handle
* @cat: Pointer to hardware catalog
* @mdss_data: Pointer to MDSS / UBWC configuration
* @mmio: mapped register io address of MDP
* @Return: 0 on Success otherwise -ERROR
*/
int dpu_rm_init(struct dpu_rm *rm,
int dpu_rm_init(struct drm_device *dev,
struct dpu_rm *rm,
const struct dpu_mdss_cfg *cat,
const struct msm_mdss_data *mdss_data,
void __iomem *mmio);
/**
* dpu_rm_destroy - Free all memory allocated by dpu_rm_init
* @rm: DPU Resource Manager handle
* @Return: 0 on Success otherwise -ERROR
*/
int dpu_rm_destroy(struct dpu_rm *rm);
/**
* dpu_rm_reserve - Given a CRTC->Encoder->Connector display chain, analyze
* the use connections and user requirements, specified through related