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sparc: Support all ultra3 and ultra4 derivatives.
For the generic events we support, all of these chips have the same encodings as ultra3i. Signed-off-by: David S. Miller <davem@davemloft.net>
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28e8f9bead
1 changed files with 13 additions and 10 deletions
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@ -91,19 +91,19 @@ struct sparc_pmu {
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int lower_nop;
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};
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static const struct perf_event_map ultra3i_perfmon_event_map[] = {
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static const struct perf_event_map ultra3_perfmon_event_map[] = {
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[PERF_COUNT_HW_CPU_CYCLES] = { 0x0000, PIC_UPPER | PIC_LOWER },
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[PERF_COUNT_HW_INSTRUCTIONS] = { 0x0001, PIC_UPPER | PIC_LOWER },
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[PERF_COUNT_HW_CACHE_REFERENCES] = { 0x0009, PIC_LOWER },
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[PERF_COUNT_HW_CACHE_MISSES] = { 0x0009, PIC_UPPER },
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};
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static const struct perf_event_map *ultra3i_event_map(int event_id)
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static const struct perf_event_map *ultra3_event_map(int event_id)
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{
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return &ultra3i_perfmon_event_map[event_id];
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return &ultra3_perfmon_event_map[event_id];
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}
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static const cache_map_t ultra3i_cache_map = {
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static const cache_map_t ultra3_cache_map = {
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[C(L1D)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { 0x09, PIC_LOWER, },
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@ -190,10 +190,10 @@ static const cache_map_t ultra3i_cache_map = {
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},
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};
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static const struct sparc_pmu ultra3i_pmu = {
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.event_map = ultra3i_event_map,
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.cache_map = &ultra3i_cache_map,
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.max_events = ARRAY_SIZE(ultra3i_perfmon_event_map),
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static const struct sparc_pmu ultra3_pmu = {
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.event_map = ultra3_event_map,
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.cache_map = &ultra3_cache_map,
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.max_events = ARRAY_SIZE(ultra3_perfmon_event_map),
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.upper_shift = 11,
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.lower_shift = 4,
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.event_mask = 0x3f,
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@ -658,8 +658,11 @@ static __read_mostly struct notifier_block perf_event_nmi_notifier = {
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static bool __init supported_pmu(void)
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{
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if (!strcmp(sparc_pmu_type, "ultra3i")) {
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sparc_pmu = &ultra3i_pmu;
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if (!strcmp(sparc_pmu_type, "ultra3") ||
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!strcmp(sparc_pmu_type, "ultra3+") ||
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!strcmp(sparc_pmu_type, "ultra3i") ||
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!strcmp(sparc_pmu_type, "ultra4+")) {
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sparc_pmu = &ultra3_pmu;
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return true;
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}
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if (!strcmp(sparc_pmu_type, "niagara2")) {
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