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clk: mvebu: introduce per-clock-gate flags
Clock gates found on MVEBU SoCs get registered by a common function. To allow specific SoCs to provide tweaks introduce flags to the clock gate descriptor instead of filling up the common function SoC specific tweaks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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3d9939c92e
commit
29020c9a40
1 changed files with 78 additions and 87 deletions
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@ -28,6 +28,7 @@ struct mvebu_soc_descr {
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const char *name;
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const char *parent;
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int bit_idx;
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unsigned long flags;
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};
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#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
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@ -88,21 +89,11 @@ static void __init mvebu_clk_gating_setup(
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}
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for (n = 0; n < ctrl->num_gates; n++) {
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u8 flags = 0;
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const char *parent =
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(descr[n].parent) ? descr[n].parent : default_parent;
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/*
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* On Armada 370, the DDR clock is a special case: it
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* isn't taken by any driver, but should anyway be
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* kept enabled, so we mark it as IGNORE_UNUSED for
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* now.
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*/
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if (!strcmp(descr[n].name, "ddr"))
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flags |= CLK_IGNORE_UNUSED;
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ctrl->gates[n] = clk_register_gate(NULL, descr[n].name, parent,
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flags, base, descr[n].bit_idx, 0, &ctrl->lock);
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descr[n].flags, base, descr[n].bit_idx,
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0, &ctrl->lock);
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WARN_ON(IS_ERR(ctrl->gates[n]));
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}
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of_clk_add_provider(np, mvebu_clk_gating_get_src, ctrl);
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@ -114,99 +105,99 @@ static void __init mvebu_clk_gating_setup(
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#ifdef CONFIG_MACH_ARMADA_370
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static const struct mvebu_soc_descr __initconst armada_370_gating_descr[] = {
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{ "audio", NULL, 0 },
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{ "pex0_en", NULL, 1 },
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{ "pex1_en", NULL, 2 },
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{ "ge1", NULL, 3 },
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{ "ge0", NULL, 4 },
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{ "pex0", "pex0_en", 5 },
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{ "pex1", "pex1_en", 9 },
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{ "sata0", NULL, 15 },
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{ "sdio", NULL, 17 },
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{ "tdm", NULL, 25 },
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{ "ddr", NULL, 28 },
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{ "sata1", NULL, 30 },
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{ "audio", NULL, 0, 0 },
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{ "pex0_en", NULL, 1, 0 },
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{ "pex1_en", NULL, 2, 0 },
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{ "ge1", NULL, 3, 0 },
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{ "ge0", NULL, 4, 0 },
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{ "pex0", "pex0_en", 5, 0 },
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{ "pex1", "pex1_en", 9, 0 },
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{ "sata0", NULL, 15, 0 },
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{ "sdio", NULL, 17, 0 },
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{ "tdm", NULL, 25, 0 },
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{ "ddr", NULL, 28, CLK_IGNORE_UNUSED },
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{ "sata1", NULL, 30, 0 },
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{ }
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};
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#endif
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#ifdef CONFIG_MACH_ARMADA_XP
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static const struct mvebu_soc_descr __initconst armada_xp_gating_descr[] = {
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{ "audio", NULL, 0 },
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{ "ge3", NULL, 1 },
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{ "ge2", NULL, 2 },
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{ "ge1", NULL, 3 },
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{ "ge0", NULL, 4 },
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{ "pex00", NULL, 5 },
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{ "pex01", NULL, 6 },
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{ "pex02", NULL, 7 },
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{ "pex03", NULL, 8 },
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{ "pex10", NULL, 9 },
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{ "pex11", NULL, 10 },
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{ "pex12", NULL, 11 },
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{ "pex13", NULL, 12 },
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{ "bp", NULL, 13 },
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{ "sata0lnk", NULL, 14 },
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{ "sata0", "sata0lnk", 15 },
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{ "lcd", NULL, 16 },
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{ "sdio", NULL, 17 },
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{ "usb0", NULL, 18 },
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{ "usb1", NULL, 19 },
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{ "usb2", NULL, 20 },
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{ "xor0", NULL, 22 },
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{ "crypto", NULL, 23 },
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{ "tdm", NULL, 25 },
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{ "pex20", NULL, 26 },
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{ "pex30", NULL, 27 },
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{ "xor1", NULL, 28 },
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{ "sata1lnk", NULL, 29 },
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{ "sata1", "sata1lnk", 30 },
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{ "audio", NULL, 0, 0 },
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{ "ge3", NULL, 1, 0 },
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{ "ge2", NULL, 2, 0 },
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{ "ge1", NULL, 3, 0 },
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{ "ge0", NULL, 4, 0 },
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{ "pex00", NULL, 5, 0 },
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{ "pex01", NULL, 6, 0 },
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{ "pex02", NULL, 7, 0 },
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{ "pex03", NULL, 8, 0 },
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{ "pex10", NULL, 9, 0 },
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{ "pex11", NULL, 10, 0 },
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{ "pex12", NULL, 11, 0 },
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{ "pex13", NULL, 12, 0 },
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{ "bp", NULL, 13, 0 },
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{ "sata0lnk", NULL, 14, 0 },
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{ "sata0", "sata0lnk", 15, 0 },
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{ "lcd", NULL, 16, 0 },
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{ "sdio", NULL, 17, 0 },
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{ "usb0", NULL, 18, 0 },
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{ "usb1", NULL, 19, 0 },
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{ "usb2", NULL, 20, 0 },
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{ "xor0", NULL, 22, 0 },
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{ "crypto", NULL, 23, 0 },
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{ "tdm", NULL, 25, 0 },
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{ "pex20", NULL, 26, 0 },
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{ "pex30", NULL, 27, 0 },
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{ "xor1", NULL, 28, 0 },
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{ "sata1lnk", NULL, 29, 0 },
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{ "sata1", "sata1lnk", 30, 0 },
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{ }
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};
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#endif
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#ifdef CONFIG_ARCH_DOVE
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static const struct mvebu_soc_descr __initconst dove_gating_descr[] = {
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{ "usb0", NULL, 0 },
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{ "usb1", NULL, 1 },
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{ "ge", "gephy", 2 },
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{ "sata", NULL, 3 },
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{ "pex0", NULL, 4 },
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{ "pex1", NULL, 5 },
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{ "sdio0", NULL, 8 },
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{ "sdio1", NULL, 9 },
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{ "nand", NULL, 10 },
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{ "camera", NULL, 11 },
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{ "i2s0", NULL, 12 },
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{ "i2s1", NULL, 13 },
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{ "crypto", NULL, 15 },
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{ "ac97", NULL, 21 },
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{ "pdma", NULL, 22 },
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{ "xor0", NULL, 23 },
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{ "xor1", NULL, 24 },
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{ "gephy", NULL, 30 },
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{ "usb0", NULL, 0, 0 },
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{ "usb1", NULL, 1, 0 },
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{ "ge", "gephy", 2, 0 },
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{ "sata", NULL, 3, 0 },
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{ "pex0", NULL, 4, 0 },
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{ "pex1", NULL, 5, 0 },
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{ "sdio0", NULL, 8, 0 },
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{ "sdio1", NULL, 9, 0 },
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{ "nand", NULL, 10, 0 },
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{ "camera", NULL, 11, 0 },
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{ "i2s0", NULL, 12, 0 },
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{ "i2s1", NULL, 13, 0 },
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{ "crypto", NULL, 15, 0 },
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{ "ac97", NULL, 21, 0 },
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{ "pdma", NULL, 22, 0 },
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{ "xor0", NULL, 23, 0 },
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{ "xor1", NULL, 24, 0 },
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{ "gephy", NULL, 30, 0 },
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{ }
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};
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#endif
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#ifdef CONFIG_ARCH_KIRKWOOD
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static const struct mvebu_soc_descr __initconst kirkwood_gating_descr[] = {
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{ "ge0", NULL, 0 },
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{ "pex0", NULL, 2 },
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{ "usb0", NULL, 3 },
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{ "sdio", NULL, 4 },
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{ "tsu", NULL, 5 },
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{ "runit", NULL, 7 },
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{ "xor0", NULL, 8 },
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{ "audio", NULL, 9 },
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{ "powersave", "cpuclk", 11 },
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{ "sata0", NULL, 14 },
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{ "sata1", NULL, 15 },
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{ "xor1", NULL, 16 },
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{ "crypto", NULL, 17 },
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{ "pex1", NULL, 18 },
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{ "ge1", NULL, 19 },
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{ "tdm", NULL, 20 },
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{ "ge0", NULL, 0, 0 },
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{ "pex0", NULL, 2, 0 },
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{ "usb0", NULL, 3, 0 },
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{ "sdio", NULL, 4, 0 },
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{ "tsu", NULL, 5, 0 },
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{ "runit", NULL, 7, 0 },
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{ "xor0", NULL, 8, 0 },
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{ "audio", NULL, 9, 0 },
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{ "powersave", "cpuclk", 11, 0 },
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{ "sata0", NULL, 14, 0 },
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{ "sata1", NULL, 15, 0 },
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{ "xor1", NULL, 16, 0 },
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{ "crypto", NULL, 17, 0 },
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{ "pex1", NULL, 18, 0 },
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{ "ge1", NULL, 19, 0 },
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{ "tdm", NULL, 20, 0 },
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{ }
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};
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#endif
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