mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-27 19:29:37 +00:00
net: qualcomm: new Ethernet over SPI driver for QCA7000
This patch adds the Ethernet over SPI driver for the Qualcomm QCA7000 HomePlug GreenPHY. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
7d50df8f72
commit
291ab06ecf
12 changed files with 2001 additions and 0 deletions
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@ -150,6 +150,7 @@ config ETHOC
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source "drivers/net/ethernet/packetengines/Kconfig"
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source "drivers/net/ethernet/pasemi/Kconfig"
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source "drivers/net/ethernet/qlogic/Kconfig"
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source "drivers/net/ethernet/qualcomm/Kconfig"
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source "drivers/net/ethernet/realtek/Kconfig"
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source "drivers/net/ethernet/renesas/Kconfig"
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source "drivers/net/ethernet/rdc/Kconfig"
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@ -60,6 +60,7 @@ obj-$(CONFIG_ETHOC) += ethoc.o
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obj-$(CONFIG_NET_PACKET_ENGINE) += packetengines/
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obj-$(CONFIG_NET_VENDOR_PASEMI) += pasemi/
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obj-$(CONFIG_NET_VENDOR_QLOGIC) += qlogic/
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obj-$(CONFIG_NET_VENDOR_QUALCOMM) += qualcomm/
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obj-$(CONFIG_NET_VENDOR_REALTEK) += realtek/
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obj-$(CONFIG_SH_ETH) += renesas/
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obj-$(CONFIG_NET_VENDOR_RDC) += rdc/
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30
drivers/net/ethernet/qualcomm/Kconfig
Normal file
30
drivers/net/ethernet/qualcomm/Kconfig
Normal file
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@ -0,0 +1,30 @@
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#
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# Qualcomm network device configuration
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#
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config NET_VENDOR_QUALCOMM
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bool "Qualcomm devices"
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default y
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depends on SPI_MASTER && OF_GPIO
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---help---
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If you have a network (Ethernet) card belonging to this class, say Y
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and read the Ethernet-HOWTO, available from
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<http://www.tldp.org/docs.html#howto>.
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Note that the answer to this question doesn't directly affect the
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kernel: saying N will just cause the configurator to skip all
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the questions about Qualcomm cards. If you say Y, you will be asked
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for your specific card in the following questions.
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if NET_VENDOR_QUALCOMM
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config QCA7000
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tristate "Qualcomm Atheros QCA7000 support"
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depends on SPI_MASTER && OF_GPIO
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---help---
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This SPI protocol driver supports the Qualcomm Atheros QCA7000.
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To compile this driver as a module, choose M here. The module
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will be called qcaspi.
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endif # NET_VENDOR_QUALCOMM
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6
drivers/net/ethernet/qualcomm/Makefile
Normal file
6
drivers/net/ethernet/qualcomm/Makefile
Normal file
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@ -0,0 +1,6 @@
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#
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# Makefile for the Qualcomm network device drivers.
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#
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obj-$(CONFIG_QCA7000) += qcaspi.o
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qcaspi-objs := qca_spi.o qca_framing.o qca_7k.o qca_debug.o
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149
drivers/net/ethernet/qualcomm/qca_7k.c
Normal file
149
drivers/net/ethernet/qualcomm/qca_7k.c
Normal file
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@ -0,0 +1,149 @@
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/*
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*
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* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
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* Copyright (c) 2014, I2SE GmbH
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*
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* Permission to use, copy, modify, and/or distribute this software
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* for any purpose with or without fee is hereby granted, provided
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* that the above copyright notice and this permission notice appear
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* in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
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* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
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* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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/* This module implements the Qualcomm Atheros SPI protocol for
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* kernel-based SPI device.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/spi/spi.h>
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#include <linux/version.h>
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#include "qca_7k.h"
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void
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qcaspi_spi_error(struct qcaspi *qca)
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{
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if (qca->sync != QCASPI_SYNC_READY)
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return;
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netdev_err(qca->net_dev, "spi error\n");
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qca->sync = QCASPI_SYNC_UNKNOWN;
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qca->stats.spi_err++;
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}
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int
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qcaspi_read_register(struct qcaspi *qca, u16 reg, u16 *result)
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{
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__be16 rx_data;
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__be16 tx_data;
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struct spi_transfer *transfer;
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struct spi_message *msg;
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int ret;
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tx_data = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_INTERNAL | reg);
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if (qca->legacy_mode) {
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msg = &qca->spi_msg1;
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transfer = &qca->spi_xfer1;
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transfer->tx_buf = &tx_data;
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transfer->rx_buf = NULL;
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transfer->len = QCASPI_CMD_LEN;
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spi_sync(qca->spi_dev, msg);
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} else {
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msg = &qca->spi_msg2;
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transfer = &qca->spi_xfer2[0];
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transfer->tx_buf = &tx_data;
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transfer->rx_buf = NULL;
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transfer->len = QCASPI_CMD_LEN;
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transfer = &qca->spi_xfer2[1];
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}
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transfer->tx_buf = NULL;
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transfer->rx_buf = &rx_data;
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transfer->len = QCASPI_CMD_LEN;
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ret = spi_sync(qca->spi_dev, msg);
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if (!ret)
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ret = msg->status;
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if (ret)
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qcaspi_spi_error(qca);
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else
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*result = be16_to_cpu(rx_data);
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return ret;
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}
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int
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qcaspi_write_register(struct qcaspi *qca, u16 reg, u16 value)
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{
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__be16 tx_data[2];
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struct spi_transfer *transfer;
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struct spi_message *msg;
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int ret;
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tx_data[0] = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_INTERNAL | reg);
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tx_data[1] = cpu_to_be16(value);
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if (qca->legacy_mode) {
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msg = &qca->spi_msg1;
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transfer = &qca->spi_xfer1;
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transfer->tx_buf = &tx_data[0];
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transfer->rx_buf = NULL;
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transfer->len = QCASPI_CMD_LEN;
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spi_sync(qca->spi_dev, msg);
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} else {
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msg = &qca->spi_msg2;
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transfer = &qca->spi_xfer2[0];
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transfer->tx_buf = &tx_data[0];
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transfer->rx_buf = NULL;
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transfer->len = QCASPI_CMD_LEN;
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transfer = &qca->spi_xfer2[1];
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}
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transfer->tx_buf = &tx_data[1];
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transfer->rx_buf = NULL;
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transfer->len = QCASPI_CMD_LEN;
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ret = spi_sync(qca->spi_dev, msg);
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if (!ret)
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ret = msg->status;
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if (ret)
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qcaspi_spi_error(qca);
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return ret;
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}
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int
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qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd)
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{
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__be16 tx_data;
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struct spi_message *msg = &qca->spi_msg1;
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struct spi_transfer *transfer = &qca->spi_xfer1;
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int ret;
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tx_data = cpu_to_be16(cmd);
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transfer->len = sizeof(tx_data);
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transfer->tx_buf = &tx_data;
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transfer->rx_buf = NULL;
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ret = spi_sync(qca->spi_dev, msg);
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if (!ret)
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ret = msg->status;
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if (ret)
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qcaspi_spi_error(qca);
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return ret;
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}
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72
drivers/net/ethernet/qualcomm/qca_7k.h
Normal file
72
drivers/net/ethernet/qualcomm/qca_7k.h
Normal file
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@ -0,0 +1,72 @@
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/*
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* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
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* Copyright (c) 2014, I2SE GmbH
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*
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* Permission to use, copy, modify, and/or distribute this software
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* for any purpose with or without fee is hereby granted, provided
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* that the above copyright notice and this permission notice appear
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* in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
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* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
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* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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/* Qualcomm Atheros SPI register definition.
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*
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* This module is designed to define the Qualcomm Atheros SPI
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* register placeholders.
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*/
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#ifndef _QCA_7K_H
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#define _QCA_7K_H
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#include <linux/types.h>
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#include "qca_spi.h"
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#define QCA7K_SPI_READ (1 << 15)
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#define QCA7K_SPI_WRITE (0 << 15)
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#define QCA7K_SPI_INTERNAL (1 << 14)
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#define QCA7K_SPI_EXTERNAL (0 << 14)
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#define QCASPI_CMD_LEN 2
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#define QCASPI_HW_PKT_LEN 4
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#define QCASPI_HW_BUF_LEN 0xC5B
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/* SPI registers; */
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#define SPI_REG_BFR_SIZE 0x0100
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#define SPI_REG_WRBUF_SPC_AVA 0x0200
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#define SPI_REG_RDBUF_BYTE_AVA 0x0300
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#define SPI_REG_SPI_CONFIG 0x0400
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#define SPI_REG_SPI_STATUS 0x0500
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#define SPI_REG_INTR_CAUSE 0x0C00
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#define SPI_REG_INTR_ENABLE 0x0D00
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#define SPI_REG_RDBUF_WATERMARK 0x1200
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#define SPI_REG_WRBUF_WATERMARK 0x1300
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#define SPI_REG_SIGNATURE 0x1A00
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#define SPI_REG_ACTION_CTRL 0x1B00
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/* SPI_CONFIG register definition; */
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#define QCASPI_SLAVE_RESET_BIT (1 << 6)
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/* INTR_CAUSE/ENABLE register definition. */
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#define SPI_INT_WRBUF_BELOW_WM (1 << 10)
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#define SPI_INT_CPU_ON (1 << 6)
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#define SPI_INT_ADDR_ERR (1 << 3)
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#define SPI_INT_WRBUF_ERR (1 << 2)
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#define SPI_INT_RDBUF_ERR (1 << 1)
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#define SPI_INT_PKT_AVLBL (1 << 0)
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void qcaspi_spi_error(struct qcaspi *qca);
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int qcaspi_read_register(struct qcaspi *qca, u16 reg, u16 *result);
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int qcaspi_write_register(struct qcaspi *qca, u16 reg, u16 value);
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int qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd);
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#endif /* _QCA_7K_H */
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311
drivers/net/ethernet/qualcomm/qca_debug.c
Normal file
311
drivers/net/ethernet/qualcomm/qca_debug.c
Normal file
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/*
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* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
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* Copyright (c) 2014, I2SE GmbH
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*
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* Permission to use, copy, modify, and/or distribute this software
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* for any purpose with or without fee is hereby granted, provided
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* that the above copyright notice and this permission notice appear
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* in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
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* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
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* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/* This file contains debugging routines for use in the QCA7K driver.
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*/
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#include <linux/debugfs.h>
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#include <linux/ethtool.h>
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#include <linux/seq_file.h>
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#include <linux/types.h>
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#include "qca_7k.h"
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#include "qca_debug.h"
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#define QCASPI_MAX_REGS 0x20
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static const u16 qcaspi_spi_regs[] = {
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SPI_REG_BFR_SIZE,
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SPI_REG_WRBUF_SPC_AVA,
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SPI_REG_RDBUF_BYTE_AVA,
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SPI_REG_SPI_CONFIG,
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SPI_REG_SPI_STATUS,
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SPI_REG_INTR_CAUSE,
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SPI_REG_INTR_ENABLE,
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SPI_REG_RDBUF_WATERMARK,
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SPI_REG_WRBUF_WATERMARK,
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SPI_REG_SIGNATURE,
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SPI_REG_ACTION_CTRL
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};
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/* The order of these strings must match the order of the fields in
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* struct qcaspi_stats
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* See qca_spi.h
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*/
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static const char qcaspi_gstrings_stats[][ETH_GSTRING_LEN] = {
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"Triggered resets",
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"Device resets",
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"Reset timeouts",
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"Read errors",
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"Write errors",
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"Read buffer errors",
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"Write buffer errors",
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"Out of memory",
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"Write buffer misses",
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"Transmit ring full",
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"SPI errors",
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};
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#ifdef CONFIG_DEBUG_FS
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static int
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qcaspi_info_show(struct seq_file *s, void *what)
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{
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struct qcaspi *qca = s->private;
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seq_printf(s, "RX buffer size : %lu\n",
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(unsigned long)qca->buffer_size);
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seq_puts(s, "TX ring state : ");
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if (qca->txr.skb[qca->txr.head] == NULL)
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seq_puts(s, "empty");
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else if (qca->txr.skb[qca->txr.tail])
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seq_puts(s, "full");
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else
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seq_puts(s, "in use");
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seq_puts(s, "\n");
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seq_printf(s, "TX ring size : %u\n",
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qca->txr.size);
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seq_printf(s, "Sync state : %u (",
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(unsigned int)qca->sync);
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switch (qca->sync) {
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case QCASPI_SYNC_UNKNOWN:
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seq_puts(s, "QCASPI_SYNC_UNKNOWN");
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break;
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case QCASPI_SYNC_RESET:
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seq_puts(s, "QCASPI_SYNC_RESET");
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break;
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case QCASPI_SYNC_READY:
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seq_puts(s, "QCASPI_SYNC_READY");
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break;
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default:
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seq_puts(s, "INVALID");
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break;
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}
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seq_puts(s, ")\n");
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seq_printf(s, "IRQ : %d\n",
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qca->spi_dev->irq);
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seq_printf(s, "INTR REQ : %u\n",
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qca->intr_req);
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seq_printf(s, "INTR SVC : %u\n",
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qca->intr_svc);
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seq_printf(s, "SPI max speed : %lu\n",
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(unsigned long)qca->spi_dev->max_speed_hz);
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seq_printf(s, "SPI mode : %x\n",
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qca->spi_dev->mode);
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seq_printf(s, "SPI chip select : %u\n",
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(unsigned int)qca->spi_dev->chip_select);
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seq_printf(s, "SPI legacy mode : %u\n",
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(unsigned int)qca->legacy_mode);
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seq_printf(s, "SPI burst length : %u\n",
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(unsigned int)qca->burst_len);
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return 0;
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}
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static int
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qcaspi_info_open(struct inode *inode, struct file *file)
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{
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return single_open(file, qcaspi_info_show, inode->i_private);
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}
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static const struct file_operations qcaspi_info_ops = {
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.open = qcaspi_info_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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void
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qcaspi_init_device_debugfs(struct qcaspi *qca)
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{
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struct dentry *device_root;
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device_root = debugfs_create_dir(dev_name(&qca->net_dev->dev), NULL);
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qca->device_root = device_root;
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if (IS_ERR(device_root) || !device_root) {
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pr_warn("failed to create debugfs directory for %s\n",
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dev_name(&qca->net_dev->dev));
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return;
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}
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debugfs_create_file("info", S_IFREG | S_IRUGO, device_root, qca,
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&qcaspi_info_ops);
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}
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void
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qcaspi_remove_device_debugfs(struct qcaspi *qca)
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{
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debugfs_remove_recursive(qca->device_root);
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}
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#else /* CONFIG_DEBUG_FS */
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void
|
||||
qcaspi_init_device_debugfs(struct qcaspi *qca)
|
||||
{
|
||||
}
|
||||
|
||||
void
|
||||
qcaspi_remove_device_debugfs(struct qcaspi *qca)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
static void
|
||||
qcaspi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *p)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
|
||||
strlcpy(p->driver, QCASPI_DRV_NAME, sizeof(p->driver));
|
||||
strlcpy(p->version, QCASPI_DRV_VERSION, sizeof(p->version));
|
||||
strlcpy(p->fw_version, "QCA7000", sizeof(p->fw_version));
|
||||
strlcpy(p->bus_info, dev_name(&qca->spi_dev->dev),
|
||||
sizeof(p->bus_info));
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
||||
{
|
||||
cmd->transceiver = XCVR_INTERNAL;
|
||||
cmd->supported = SUPPORTED_10baseT_Half;
|
||||
ethtool_cmd_speed_set(cmd, SPEED_10);
|
||||
cmd->duplex = DUPLEX_HALF;
|
||||
cmd->port = PORT_OTHER;
|
||||
cmd->autoneg = AUTONEG_DISABLE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
qcaspi_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *estats, u64 *data)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
struct qcaspi_stats *st = &qca->stats;
|
||||
|
||||
memcpy(data, st, ARRAY_SIZE(qcaspi_gstrings_stats) * sizeof(u64));
|
||||
}
|
||||
|
||||
static void
|
||||
qcaspi_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
|
||||
{
|
||||
switch (stringset) {
|
||||
case ETH_SS_STATS:
|
||||
memcpy(buf, &qcaspi_gstrings_stats,
|
||||
sizeof(qcaspi_gstrings_stats));
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_get_sset_count(struct net_device *dev, int sset)
|
||||
{
|
||||
switch (sset) {
|
||||
case ETH_SS_STATS:
|
||||
return ARRAY_SIZE(qcaspi_gstrings_stats);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_get_regs_len(struct net_device *dev)
|
||||
{
|
||||
return sizeof(u32) * QCASPI_MAX_REGS;
|
||||
}
|
||||
|
||||
static void
|
||||
qcaspi_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
u32 *regs_buff = p;
|
||||
unsigned int i;
|
||||
|
||||
regs->version = 1;
|
||||
memset(regs_buff, 0, sizeof(u32) * QCASPI_MAX_REGS);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(qcaspi_spi_regs); i++) {
|
||||
u16 offset, value;
|
||||
|
||||
qcaspi_read_register(qca, qcaspi_spi_regs[i], &value);
|
||||
offset = qcaspi_spi_regs[i] >> 8;
|
||||
regs_buff[offset] = value;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
qcaspi_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ring)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
|
||||
ring->rx_max_pending = 4;
|
||||
ring->tx_max_pending = TX_RING_MAX_LEN;
|
||||
ring->rx_pending = 4;
|
||||
ring->tx_pending = qca->txr.count;
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ring)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
|
||||
if ((ring->rx_pending) ||
|
||||
(ring->rx_mini_pending) ||
|
||||
(ring->rx_jumbo_pending))
|
||||
return -EINVAL;
|
||||
|
||||
if (netif_running(dev))
|
||||
qcaspi_netdev_close(dev);
|
||||
|
||||
qca->txr.count = max_t(u32, ring->tx_pending, TX_RING_MIN_LEN);
|
||||
qca->txr.count = min_t(u16, qca->txr.count, TX_RING_MAX_LEN);
|
||||
|
||||
if (netif_running(dev))
|
||||
qcaspi_netdev_open(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct ethtool_ops qcaspi_ethtool_ops = {
|
||||
.get_drvinfo = qcaspi_get_drvinfo,
|
||||
.get_link = ethtool_op_get_link,
|
||||
.get_settings = qcaspi_get_settings,
|
||||
.get_ethtool_stats = qcaspi_get_ethtool_stats,
|
||||
.get_strings = qcaspi_get_strings,
|
||||
.get_sset_count = qcaspi_get_sset_count,
|
||||
.get_regs_len = qcaspi_get_regs_len,
|
||||
.get_regs = qcaspi_get_regs,
|
||||
.get_ringparam = qcaspi_get_ringparam,
|
||||
.set_ringparam = qcaspi_set_ringparam,
|
||||
};
|
||||
|
||||
void qcaspi_set_ethtool_ops(struct net_device *dev)
|
||||
{
|
||||
dev->ethtool_ops = &qcaspi_ethtool_ops;
|
||||
}
|
34
drivers/net/ethernet/qualcomm/qca_debug.h
Normal file
34
drivers/net/ethernet/qualcomm/qca_debug.h
Normal file
|
@ -0,0 +1,34 @@
|
|||
/*
|
||||
* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
|
||||
* Copyright (c) 2014, I2SE GmbH
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software
|
||||
* for any purpose with or without fee is hereby granted, provided
|
||||
* that the above copyright notice and this permission notice appear
|
||||
* in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
|
||||
* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
|
||||
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/* This file contains debugging routines for use in the QCA7K driver.
|
||||
*/
|
||||
|
||||
#ifndef _QCA_DEBUG_H
|
||||
#define _QCA_DEBUG_H
|
||||
|
||||
#include "qca_spi.h"
|
||||
|
||||
void qcaspi_init_device_debugfs(struct qcaspi *qca);
|
||||
|
||||
void qcaspi_remove_device_debugfs(struct qcaspi *qca);
|
||||
|
||||
void qcaspi_set_ethtool_ops(struct net_device *dev);
|
||||
|
||||
#endif /* _QCA_DEBUG_H */
|
156
drivers/net/ethernet/qualcomm/qca_framing.c
Normal file
156
drivers/net/ethernet/qualcomm/qca_framing.c
Normal file
|
@ -0,0 +1,156 @@
|
|||
/*
|
||||
* Copyright (c) 2011, 2012, Atheros Communications Inc.
|
||||
* Copyright (c) 2014, I2SE GmbH
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software
|
||||
* for any purpose with or without fee is hereby granted, provided
|
||||
* that the above copyright notice and this permission notice appear
|
||||
* in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
|
||||
* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
|
||||
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/* Atheros ethernet framing. Every Ethernet frame is surrounded
|
||||
* by an atheros frame while transmitted over a serial channel;
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include "qca_framing.h"
|
||||
|
||||
u16
|
||||
qcafrm_create_header(u8 *buf, u16 length)
|
||||
{
|
||||
__le16 len;
|
||||
|
||||
if (!buf)
|
||||
return 0;
|
||||
|
||||
len = cpu_to_le16(length);
|
||||
|
||||
buf[0] = 0xAA;
|
||||
buf[1] = 0xAA;
|
||||
buf[2] = 0xAA;
|
||||
buf[3] = 0xAA;
|
||||
buf[4] = len & 0xff;
|
||||
buf[5] = (len >> 8) & 0xff;
|
||||
buf[6] = 0;
|
||||
buf[7] = 0;
|
||||
|
||||
return QCAFRM_HEADER_LEN;
|
||||
}
|
||||
|
||||
u16
|
||||
qcafrm_create_footer(u8 *buf)
|
||||
{
|
||||
if (!buf)
|
||||
return 0;
|
||||
|
||||
buf[0] = 0x55;
|
||||
buf[1] = 0x55;
|
||||
return QCAFRM_FOOTER_LEN;
|
||||
}
|
||||
|
||||
/* Gather received bytes and try to extract a full ethernet frame by
|
||||
* following a simple state machine.
|
||||
*
|
||||
* Return: QCAFRM_GATHER No ethernet frame fully received yet.
|
||||
* QCAFRM_NOHEAD Header expected but not found.
|
||||
* QCAFRM_INVLEN Atheros frame length is invalid
|
||||
* QCAFRM_NOTAIL Footer expected but not found.
|
||||
* > 0 Number of byte in the fully received
|
||||
* Ethernet frame
|
||||
*/
|
||||
|
||||
s32
|
||||
qcafrm_fsm_decode(struct qcafrm_handle *handle, u8 *buf, u16 buf_len, u8 recv_byte)
|
||||
{
|
||||
s32 ret = QCAFRM_GATHER;
|
||||
u16 len;
|
||||
|
||||
switch (handle->state) {
|
||||
case QCAFRM_HW_LEN0:
|
||||
case QCAFRM_HW_LEN1:
|
||||
/* by default, just go to next state */
|
||||
handle->state--;
|
||||
|
||||
if (recv_byte != 0x00) {
|
||||
/* first two bytes of length must be 0 */
|
||||
handle->state = QCAFRM_HW_LEN0;
|
||||
}
|
||||
break;
|
||||
case QCAFRM_HW_LEN2:
|
||||
case QCAFRM_HW_LEN3:
|
||||
handle->state--;
|
||||
break;
|
||||
/* 4 bytes header pattern */
|
||||
case QCAFRM_WAIT_AA1:
|
||||
case QCAFRM_WAIT_AA2:
|
||||
case QCAFRM_WAIT_AA3:
|
||||
case QCAFRM_WAIT_AA4:
|
||||
if (recv_byte != 0xAA) {
|
||||
ret = QCAFRM_NOHEAD;
|
||||
handle->state = QCAFRM_HW_LEN0;
|
||||
} else {
|
||||
handle->state--;
|
||||
}
|
||||
break;
|
||||
/* 2 bytes length. */
|
||||
/* Borrow offset field to hold length for now. */
|
||||
case QCAFRM_WAIT_LEN_BYTE0:
|
||||
handle->offset = recv_byte;
|
||||
handle->state = QCAFRM_WAIT_LEN_BYTE1;
|
||||
break;
|
||||
case QCAFRM_WAIT_LEN_BYTE1:
|
||||
handle->offset = handle->offset | (recv_byte << 8);
|
||||
handle->state = QCAFRM_WAIT_RSVD_BYTE1;
|
||||
break;
|
||||
case QCAFRM_WAIT_RSVD_BYTE1:
|
||||
handle->state = QCAFRM_WAIT_RSVD_BYTE2;
|
||||
break;
|
||||
case QCAFRM_WAIT_RSVD_BYTE2:
|
||||
len = handle->offset;
|
||||
if (len > buf_len || len < QCAFRM_ETHMINLEN) {
|
||||
ret = QCAFRM_INVLEN;
|
||||
handle->state = QCAFRM_HW_LEN0;
|
||||
} else {
|
||||
handle->state = (enum qcafrm_state)(len + 1);
|
||||
/* Remaining number of bytes. */
|
||||
handle->offset = 0;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
/* Receiving Ethernet frame itself. */
|
||||
buf[handle->offset] = recv_byte;
|
||||
handle->offset++;
|
||||
handle->state--;
|
||||
break;
|
||||
case QCAFRM_WAIT_551:
|
||||
if (recv_byte != 0x55) {
|
||||
ret = QCAFRM_NOTAIL;
|
||||
handle->state = QCAFRM_HW_LEN0;
|
||||
} else {
|
||||
handle->state = QCAFRM_WAIT_552;
|
||||
}
|
||||
break;
|
||||
case QCAFRM_WAIT_552:
|
||||
if (recv_byte != 0x55) {
|
||||
ret = QCAFRM_NOTAIL;
|
||||
handle->state = QCAFRM_HW_LEN0;
|
||||
} else {
|
||||
ret = handle->offset;
|
||||
/* Frame is fully received. */
|
||||
handle->state = QCAFRM_HW_LEN0;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
134
drivers/net/ethernet/qualcomm/qca_framing.h
Normal file
134
drivers/net/ethernet/qualcomm/qca_framing.h
Normal file
|
@ -0,0 +1,134 @@
|
|||
/*
|
||||
* Copyright (c) 2011, 2012, Atheros Communications Inc.
|
||||
* Copyright (c) 2014, I2SE GmbH
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software
|
||||
* for any purpose with or without fee is hereby granted, provided
|
||||
* that the above copyright notice and this permission notice appear
|
||||
* in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
|
||||
* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
|
||||
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/* Atheros Ethernet framing. Every Ethernet frame is surrounded by an atheros
|
||||
* frame while transmitted over a serial channel.
|
||||
*/
|
||||
|
||||
#ifndef _QCA_FRAMING_H
|
||||
#define _QCA_FRAMING_H
|
||||
|
||||
#include <linux/if_ether.h>
|
||||
#include <linux/if_vlan.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
/* Frame is currently being received */
|
||||
#define QCAFRM_GATHER 0
|
||||
|
||||
/* No header byte while expecting it */
|
||||
#define QCAFRM_NOHEAD (QCAFRM_ERR_BASE - 1)
|
||||
|
||||
/* No tailer byte while expecting it */
|
||||
#define QCAFRM_NOTAIL (QCAFRM_ERR_BASE - 2)
|
||||
|
||||
/* Frame length is invalid */
|
||||
#define QCAFRM_INVLEN (QCAFRM_ERR_BASE - 3)
|
||||
|
||||
/* Frame length is invalid */
|
||||
#define QCAFRM_INVFRAME (QCAFRM_ERR_BASE - 4)
|
||||
|
||||
/* Min/Max Ethernet MTU */
|
||||
#define QCAFRM_ETHMINMTU 46
|
||||
#define QCAFRM_ETHMAXMTU 1500
|
||||
|
||||
/* Min/Max frame lengths */
|
||||
#define QCAFRM_ETHMINLEN (QCAFRM_ETHMINMTU + ETH_HLEN)
|
||||
#define QCAFRM_ETHMAXLEN (QCAFRM_ETHMAXMTU + VLAN_ETH_HLEN)
|
||||
|
||||
/* QCA7K header len */
|
||||
#define QCAFRM_HEADER_LEN 8
|
||||
|
||||
/* QCA7K footer len */
|
||||
#define QCAFRM_FOOTER_LEN 2
|
||||
|
||||
/* QCA7K Framing. */
|
||||
#define QCAFRM_ERR_BASE -1000
|
||||
|
||||
enum qcafrm_state {
|
||||
QCAFRM_HW_LEN0 = 0x8000,
|
||||
QCAFRM_HW_LEN1 = QCAFRM_HW_LEN0 - 1,
|
||||
QCAFRM_HW_LEN2 = QCAFRM_HW_LEN1 - 1,
|
||||
QCAFRM_HW_LEN3 = QCAFRM_HW_LEN2 - 1,
|
||||
|
||||
/* Waiting first 0xAA of header */
|
||||
QCAFRM_WAIT_AA1 = QCAFRM_HW_LEN3 - 1,
|
||||
|
||||
/* Waiting second 0xAA of header */
|
||||
QCAFRM_WAIT_AA2 = QCAFRM_WAIT_AA1 - 1,
|
||||
|
||||
/* Waiting third 0xAA of header */
|
||||
QCAFRM_WAIT_AA3 = QCAFRM_WAIT_AA2 - 1,
|
||||
|
||||
/* Waiting fourth 0xAA of header */
|
||||
QCAFRM_WAIT_AA4 = QCAFRM_WAIT_AA3 - 1,
|
||||
|
||||
/* Waiting Byte 0-1 of length (litte endian) */
|
||||
QCAFRM_WAIT_LEN_BYTE0 = QCAFRM_WAIT_AA4 - 1,
|
||||
QCAFRM_WAIT_LEN_BYTE1 = QCAFRM_WAIT_AA4 - 2,
|
||||
|
||||
/* Reserved bytes */
|
||||
QCAFRM_WAIT_RSVD_BYTE1 = QCAFRM_WAIT_AA4 - 3,
|
||||
QCAFRM_WAIT_RSVD_BYTE2 = QCAFRM_WAIT_AA4 - 4,
|
||||
|
||||
/* The frame length is used as the state until
|
||||
* the end of the Ethernet frame
|
||||
* Waiting for first 0x55 of footer
|
||||
*/
|
||||
QCAFRM_WAIT_551 = 1,
|
||||
|
||||
/* Waiting for second 0x55 of footer */
|
||||
QCAFRM_WAIT_552 = QCAFRM_WAIT_551 - 1
|
||||
};
|
||||
|
||||
/* Structure to maintain the frame decoding during reception. */
|
||||
|
||||
struct qcafrm_handle {
|
||||
/* Current decoding state */
|
||||
enum qcafrm_state state;
|
||||
|
||||
/* Offset in buffer (borrowed for length too) */
|
||||
s16 offset;
|
||||
|
||||
/* Frame length as kept by this module */
|
||||
u16 len;
|
||||
};
|
||||
|
||||
u16 qcafrm_create_header(u8 *buf, u16 len);
|
||||
|
||||
u16 qcafrm_create_footer(u8 *buf);
|
||||
|
||||
static inline void qcafrm_fsm_init(struct qcafrm_handle *handle)
|
||||
{
|
||||
handle->state = QCAFRM_HW_LEN0;
|
||||
}
|
||||
|
||||
/* Gather received bytes and try to extract a full Ethernet frame
|
||||
* by following a simple state machine.
|
||||
*
|
||||
* Return: QCAFRM_GATHER No Ethernet frame fully received yet.
|
||||
* QCAFRM_NOHEAD Header expected but not found.
|
||||
* QCAFRM_INVLEN QCA7K frame length is invalid
|
||||
* QCAFRM_NOTAIL Footer expected but not found.
|
||||
* > 0 Number of byte in the fully received
|
||||
* Ethernet frame
|
||||
*/
|
||||
|
||||
s32 qcafrm_fsm_decode(struct qcafrm_handle *handle, u8 *buf, u16 buf_len, u8 recv_byte);
|
||||
|
||||
#endif /* _QCA_FRAMING_H */
|
993
drivers/net/ethernet/qualcomm/qca_spi.c
Normal file
993
drivers/net/ethernet/qualcomm/qca_spi.c
Normal file
|
@ -0,0 +1,993 @@
|
|||
/*
|
||||
* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
|
||||
* Copyright (c) 2014, I2SE GmbH
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software
|
||||
* for any purpose with or without fee is hereby granted, provided
|
||||
* that the above copyright notice and this permission notice appear
|
||||
* in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
|
||||
* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
|
||||
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/* This module implements the Qualcomm Atheros SPI protocol for
|
||||
* kernel-based SPI device; it is essentially an Ethernet-to-SPI
|
||||
* serial converter;
|
||||
*/
|
||||
|
||||
#include <linux/errno.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/if_arp.h>
|
||||
#include <linux/if_ether.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/moduleparam.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_net.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/version.h>
|
||||
|
||||
#include "qca_7k.h"
|
||||
#include "qca_debug.h"
|
||||
#include "qca_framing.h"
|
||||
#include "qca_spi.h"
|
||||
|
||||
#define MAX_DMA_BURST_LEN 5000
|
||||
|
||||
/* Modules parameters */
|
||||
#define QCASPI_CLK_SPEED_MIN 1000000
|
||||
#define QCASPI_CLK_SPEED_MAX 16000000
|
||||
#define QCASPI_CLK_SPEED 8000000
|
||||
static int qcaspi_clkspeed;
|
||||
module_param(qcaspi_clkspeed, int, 0);
|
||||
MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000.");
|
||||
|
||||
#define QCASPI_BURST_LEN_MIN 1
|
||||
#define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN
|
||||
static int qcaspi_burst_len = MAX_DMA_BURST_LEN;
|
||||
module_param(qcaspi_burst_len, int, 0);
|
||||
MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000.");
|
||||
|
||||
#define QCASPI_PLUGGABLE_MIN 0
|
||||
#define QCASPI_PLUGGABLE_MAX 1
|
||||
static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN;
|
||||
module_param(qcaspi_pluggable, int, 0);
|
||||
MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no).");
|
||||
|
||||
#define QCASPI_MTU QCAFRM_ETHMAXMTU
|
||||
#define QCASPI_TX_TIMEOUT (1 * HZ)
|
||||
#define QCASPI_QCA7K_REBOOT_TIME_MS 1000
|
||||
|
||||
static void
|
||||
start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause)
|
||||
{
|
||||
*intr_cause = 0;
|
||||
|
||||
qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0);
|
||||
qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause);
|
||||
netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause);
|
||||
}
|
||||
|
||||
static void
|
||||
end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause)
|
||||
{
|
||||
u16 intr_enable = (SPI_INT_CPU_ON |
|
||||
SPI_INT_PKT_AVLBL |
|
||||
SPI_INT_RDBUF_ERR |
|
||||
SPI_INT_WRBUF_ERR);
|
||||
|
||||
qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause);
|
||||
qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable);
|
||||
netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause);
|
||||
}
|
||||
|
||||
static u32
|
||||
qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len)
|
||||
{
|
||||
__be16 cmd;
|
||||
struct spi_message *msg = &qca->spi_msg2;
|
||||
struct spi_transfer *transfer = &qca->spi_xfer2[0];
|
||||
int ret;
|
||||
|
||||
cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
|
||||
transfer->tx_buf = &cmd;
|
||||
transfer->rx_buf = NULL;
|
||||
transfer->len = QCASPI_CMD_LEN;
|
||||
transfer = &qca->spi_xfer2[1];
|
||||
transfer->tx_buf = src;
|
||||
transfer->rx_buf = NULL;
|
||||
transfer->len = len;
|
||||
|
||||
ret = spi_sync(qca->spi_dev, msg);
|
||||
|
||||
if (ret || (msg->actual_length != QCASPI_CMD_LEN + len)) {
|
||||
qcaspi_spi_error(qca);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static u32
|
||||
qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len)
|
||||
{
|
||||
struct spi_message *msg = &qca->spi_msg1;
|
||||
struct spi_transfer *transfer = &qca->spi_xfer1;
|
||||
int ret;
|
||||
|
||||
transfer->tx_buf = src;
|
||||
transfer->rx_buf = NULL;
|
||||
transfer->len = len;
|
||||
|
||||
ret = spi_sync(qca->spi_dev, msg);
|
||||
|
||||
if (ret || (msg->actual_length != len)) {
|
||||
qcaspi_spi_error(qca);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static u32
|
||||
qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len)
|
||||
{
|
||||
struct spi_message *msg = &qca->spi_msg2;
|
||||
__be16 cmd;
|
||||
struct spi_transfer *transfer = &qca->spi_xfer2[0];
|
||||
int ret;
|
||||
|
||||
cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
|
||||
transfer->tx_buf = &cmd;
|
||||
transfer->rx_buf = NULL;
|
||||
transfer->len = QCASPI_CMD_LEN;
|
||||
transfer = &qca->spi_xfer2[1];
|
||||
transfer->tx_buf = NULL;
|
||||
transfer->rx_buf = dst;
|
||||
transfer->len = len;
|
||||
|
||||
ret = spi_sync(qca->spi_dev, msg);
|
||||
|
||||
if (ret || (msg->actual_length != QCASPI_CMD_LEN + len)) {
|
||||
qcaspi_spi_error(qca);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static u32
|
||||
qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len)
|
||||
{
|
||||
struct spi_message *msg = &qca->spi_msg1;
|
||||
struct spi_transfer *transfer = &qca->spi_xfer1;
|
||||
int ret;
|
||||
|
||||
transfer->tx_buf = NULL;
|
||||
transfer->rx_buf = dst;
|
||||
transfer->len = len;
|
||||
|
||||
ret = spi_sync(qca->spi_dev, msg);
|
||||
|
||||
if (ret || (msg->actual_length != len)) {
|
||||
qcaspi_spi_error(qca);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb)
|
||||
{
|
||||
u32 count;
|
||||
u32 written;
|
||||
u32 offset;
|
||||
u32 len;
|
||||
|
||||
len = skb->len;
|
||||
|
||||
qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len);
|
||||
if (qca->legacy_mode)
|
||||
qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
|
||||
|
||||
offset = 0;
|
||||
while (len) {
|
||||
count = len;
|
||||
if (count > qca->burst_len)
|
||||
count = qca->burst_len;
|
||||
|
||||
if (qca->legacy_mode) {
|
||||
written = qcaspi_write_legacy(qca,
|
||||
skb->data + offset,
|
||||
count);
|
||||
} else {
|
||||
written = qcaspi_write_burst(qca,
|
||||
skb->data + offset,
|
||||
count);
|
||||
}
|
||||
|
||||
if (written != count)
|
||||
return -1;
|
||||
|
||||
offset += count;
|
||||
len -= count;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_transmit(struct qcaspi *qca)
|
||||
{
|
||||
struct net_device_stats *n_stats = &qca->net_dev->stats;
|
||||
u16 available = 0;
|
||||
u32 pkt_len;
|
||||
u16 new_head;
|
||||
u16 packets = 0;
|
||||
|
||||
if (qca->txr.skb[qca->txr.head] == NULL)
|
||||
return 0;
|
||||
|
||||
qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available);
|
||||
|
||||
while (qca->txr.skb[qca->txr.head]) {
|
||||
pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN;
|
||||
|
||||
if (available < pkt_len) {
|
||||
if (packets == 0)
|
||||
qca->stats.write_buf_miss++;
|
||||
break;
|
||||
}
|
||||
|
||||
if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) {
|
||||
qca->stats.write_err++;
|
||||
return -1;
|
||||
}
|
||||
|
||||
packets++;
|
||||
n_stats->tx_packets++;
|
||||
n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len;
|
||||
available -= pkt_len;
|
||||
|
||||
/* remove the skb from the queue */
|
||||
/* XXX After inconsistent lock states netif_tx_lock()
|
||||
* has been replaced by netif_tx_lock_bh() and so on.
|
||||
*/
|
||||
netif_tx_lock_bh(qca->net_dev);
|
||||
dev_kfree_skb(qca->txr.skb[qca->txr.head]);
|
||||
qca->txr.skb[qca->txr.head] = NULL;
|
||||
qca->txr.size -= pkt_len;
|
||||
new_head = qca->txr.head + 1;
|
||||
if (new_head >= qca->txr.count)
|
||||
new_head = 0;
|
||||
qca->txr.head = new_head;
|
||||
if (netif_queue_stopped(qca->net_dev))
|
||||
netif_wake_queue(qca->net_dev);
|
||||
netif_tx_unlock_bh(qca->net_dev);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_receive(struct qcaspi *qca)
|
||||
{
|
||||
struct net_device *net_dev = qca->net_dev;
|
||||
struct net_device_stats *n_stats = &net_dev->stats;
|
||||
u16 available = 0;
|
||||
u32 bytes_read;
|
||||
u8 *cp;
|
||||
|
||||
/* Allocate rx SKB if we don't have one available. */
|
||||
if (!qca->rx_skb) {
|
||||
qca->rx_skb = netdev_alloc_skb(net_dev,
|
||||
net_dev->mtu + VLAN_ETH_HLEN);
|
||||
if (!qca->rx_skb) {
|
||||
netdev_dbg(net_dev, "out of RX resources\n");
|
||||
qca->stats.out_of_mem++;
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Read the packet size. */
|
||||
qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available);
|
||||
netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n",
|
||||
available);
|
||||
|
||||
if (available == 0) {
|
||||
netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available);
|
||||
|
||||
if (qca->legacy_mode)
|
||||
qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
|
||||
|
||||
while (available) {
|
||||
u32 count = available;
|
||||
|
||||
if (count > qca->burst_len)
|
||||
count = qca->burst_len;
|
||||
|
||||
if (qca->legacy_mode) {
|
||||
bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer,
|
||||
count);
|
||||
} else {
|
||||
bytes_read = qcaspi_read_burst(qca, qca->rx_buffer,
|
||||
count);
|
||||
}
|
||||
|
||||
netdev_dbg(net_dev, "available: %d, byte read: %d\n",
|
||||
available, bytes_read);
|
||||
|
||||
if (bytes_read) {
|
||||
available -= bytes_read;
|
||||
} else {
|
||||
qca->stats.read_err++;
|
||||
return -1;
|
||||
}
|
||||
|
||||
cp = qca->rx_buffer;
|
||||
|
||||
while ((bytes_read--) && (qca->rx_skb)) {
|
||||
s32 retcode;
|
||||
|
||||
retcode = qcafrm_fsm_decode(&qca->frm_handle,
|
||||
qca->rx_skb->data,
|
||||
skb_tailroom(qca->rx_skb),
|
||||
*cp);
|
||||
cp++;
|
||||
switch (retcode) {
|
||||
case QCAFRM_GATHER:
|
||||
case QCAFRM_NOHEAD:
|
||||
break;
|
||||
case QCAFRM_NOTAIL:
|
||||
netdev_dbg(net_dev, "no RX tail\n");
|
||||
n_stats->rx_errors++;
|
||||
n_stats->rx_dropped++;
|
||||
break;
|
||||
case QCAFRM_INVLEN:
|
||||
netdev_dbg(net_dev, "invalid RX length\n");
|
||||
n_stats->rx_errors++;
|
||||
n_stats->rx_dropped++;
|
||||
break;
|
||||
default:
|
||||
qca->rx_skb->dev = qca->net_dev;
|
||||
n_stats->rx_packets++;
|
||||
n_stats->rx_bytes += retcode;
|
||||
skb_put(qca->rx_skb, retcode);
|
||||
qca->rx_skb->protocol = eth_type_trans(
|
||||
qca->rx_skb, qca->rx_skb->dev);
|
||||
qca->rx_skb->ip_summed = CHECKSUM_UNNECESSARY;
|
||||
netif_rx_ni(qca->rx_skb);
|
||||
qca->rx_skb = netdev_alloc_skb(net_dev,
|
||||
net_dev->mtu + VLAN_ETH_HLEN);
|
||||
if (!qca->rx_skb) {
|
||||
netdev_dbg(net_dev, "out of RX resources\n");
|
||||
n_stats->rx_errors++;
|
||||
qca->stats.out_of_mem++;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Check that tx ring stores only so much bytes
|
||||
* that fit into the internal QCA buffer.
|
||||
*/
|
||||
|
||||
static int
|
||||
qcaspi_tx_ring_has_space(struct tx_ring *txr)
|
||||
{
|
||||
if (txr->skb[txr->tail])
|
||||
return 0;
|
||||
|
||||
return (txr->size + QCAFRM_ETHMAXLEN < QCASPI_HW_BUF_LEN) ? 1 : 0;
|
||||
}
|
||||
|
||||
/* Flush the tx ring. This function is only safe to
|
||||
* call from the qcaspi_spi_thread.
|
||||
*/
|
||||
|
||||
static void
|
||||
qcaspi_flush_tx_ring(struct qcaspi *qca)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* XXX After inconsistent lock states netif_tx_lock()
|
||||
* has been replaced by netif_tx_lock_bh() and so on.
|
||||
*/
|
||||
netif_tx_lock_bh(qca->net_dev);
|
||||
for (i = 0; i < TX_RING_MAX_LEN; i++) {
|
||||
if (qca->txr.skb[i]) {
|
||||
dev_kfree_skb(qca->txr.skb[i]);
|
||||
qca->txr.skb[i] = NULL;
|
||||
qca->net_dev->stats.tx_dropped++;
|
||||
}
|
||||
}
|
||||
qca->txr.tail = 0;
|
||||
qca->txr.head = 0;
|
||||
qca->txr.size = 0;
|
||||
netif_tx_unlock_bh(qca->net_dev);
|
||||
}
|
||||
|
||||
static void
|
||||
qcaspi_qca7k_sync(struct qcaspi *qca, int event)
|
||||
{
|
||||
u16 signature = 0;
|
||||
u16 spi_config;
|
||||
u16 wrbuf_space = 0;
|
||||
static u16 reset_count;
|
||||
|
||||
if (event == QCASPI_EVENT_CPUON) {
|
||||
/* Read signature twice, if not valid
|
||||
* go back to unknown state.
|
||||
*/
|
||||
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
||||
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
||||
if (signature != QCASPI_GOOD_SIGNATURE) {
|
||||
qca->sync = QCASPI_SYNC_UNKNOWN;
|
||||
netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n");
|
||||
} else {
|
||||
/* ensure that the WRBUF is empty */
|
||||
qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA,
|
||||
&wrbuf_space);
|
||||
if (wrbuf_space != QCASPI_HW_BUF_LEN) {
|
||||
netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n");
|
||||
qca->sync = QCASPI_SYNC_UNKNOWN;
|
||||
} else {
|
||||
netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n");
|
||||
qca->sync = QCASPI_SYNC_READY;
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
switch (qca->sync) {
|
||||
case QCASPI_SYNC_READY:
|
||||
/* Read signature, if not valid go to unknown state. */
|
||||
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
||||
if (signature != QCASPI_GOOD_SIGNATURE) {
|
||||
qca->sync = QCASPI_SYNC_UNKNOWN;
|
||||
netdev_dbg(qca->net_dev, "sync: bad signature, restart\n");
|
||||
/* don't reset right away */
|
||||
return;
|
||||
}
|
||||
break;
|
||||
case QCASPI_SYNC_UNKNOWN:
|
||||
/* Read signature, if not valid stay in unknown state */
|
||||
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
||||
if (signature != QCASPI_GOOD_SIGNATURE) {
|
||||
netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/* TODO: use GPIO to reset QCA7000 in legacy mode*/
|
||||
netdev_dbg(qca->net_dev, "sync: resetting device.\n");
|
||||
qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config);
|
||||
spi_config |= QCASPI_SLAVE_RESET_BIT;
|
||||
qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config);
|
||||
|
||||
qca->sync = QCASPI_SYNC_RESET;
|
||||
qca->stats.trig_reset++;
|
||||
reset_count = 0;
|
||||
break;
|
||||
case QCASPI_SYNC_RESET:
|
||||
reset_count++;
|
||||
netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n",
|
||||
reset_count);
|
||||
if (reset_count >= QCASPI_RESET_TIMEOUT) {
|
||||
/* reset did not seem to take place, try again */
|
||||
qca->sync = QCASPI_SYNC_UNKNOWN;
|
||||
qca->stats.reset_timeout++;
|
||||
netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n");
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_spi_thread(void *data)
|
||||
{
|
||||
struct qcaspi *qca = data;
|
||||
u16 intr_cause = 0;
|
||||
|
||||
netdev_info(qca->net_dev, "SPI thread created\n");
|
||||
while (!kthread_should_stop()) {
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
if ((qca->intr_req == qca->intr_svc) &&
|
||||
(qca->txr.skb[qca->txr.head] == NULL) &&
|
||||
(qca->sync == QCASPI_SYNC_READY))
|
||||
schedule();
|
||||
|
||||
set_current_state(TASK_RUNNING);
|
||||
|
||||
netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n",
|
||||
qca->intr_req - qca->intr_svc,
|
||||
qca->txr.skb[qca->txr.head]);
|
||||
|
||||
qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE);
|
||||
|
||||
if (qca->sync != QCASPI_SYNC_READY) {
|
||||
netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n",
|
||||
(unsigned int)qca->sync);
|
||||
netif_stop_queue(qca->net_dev);
|
||||
netif_carrier_off(qca->net_dev);
|
||||
qcaspi_flush_tx_ring(qca);
|
||||
msleep(QCASPI_QCA7K_REBOOT_TIME_MS);
|
||||
}
|
||||
|
||||
if (qca->intr_svc != qca->intr_req) {
|
||||
qca->intr_svc = qca->intr_req;
|
||||
start_spi_intr_handling(qca, &intr_cause);
|
||||
|
||||
if (intr_cause & SPI_INT_CPU_ON) {
|
||||
qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON);
|
||||
|
||||
/* not synced. */
|
||||
if (qca->sync != QCASPI_SYNC_READY)
|
||||
continue;
|
||||
|
||||
qca->stats.device_reset++;
|
||||
netif_wake_queue(qca->net_dev);
|
||||
netif_carrier_on(qca->net_dev);
|
||||
}
|
||||
|
||||
if (intr_cause & SPI_INT_RDBUF_ERR) {
|
||||
/* restart sync */
|
||||
netdev_dbg(qca->net_dev, "===> rdbuf error!\n");
|
||||
qca->stats.read_buf_err++;
|
||||
qca->sync = QCASPI_SYNC_UNKNOWN;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (intr_cause & SPI_INT_WRBUF_ERR) {
|
||||
/* restart sync */
|
||||
netdev_dbg(qca->net_dev, "===> wrbuf error!\n");
|
||||
qca->stats.write_buf_err++;
|
||||
qca->sync = QCASPI_SYNC_UNKNOWN;
|
||||
continue;
|
||||
}
|
||||
|
||||
/* can only handle other interrupts
|
||||
* if sync has occured
|
||||
*/
|
||||
if (qca->sync == QCASPI_SYNC_READY) {
|
||||
if (intr_cause & SPI_INT_PKT_AVLBL)
|
||||
qcaspi_receive(qca);
|
||||
}
|
||||
|
||||
end_spi_intr_handling(qca, intr_cause);
|
||||
}
|
||||
|
||||
if (qca->sync == QCASPI_SYNC_READY)
|
||||
qcaspi_transmit(qca);
|
||||
}
|
||||
set_current_state(TASK_RUNNING);
|
||||
netdev_info(qca->net_dev, "SPI thread exit\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static irqreturn_t
|
||||
qcaspi_intr_handler(int irq, void *data)
|
||||
{
|
||||
struct qcaspi *qca = data;
|
||||
|
||||
qca->intr_req++;
|
||||
if (qca->spi_thread &&
|
||||
qca->spi_thread->state != TASK_RUNNING)
|
||||
wake_up_process(qca->spi_thread);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
int
|
||||
qcaspi_netdev_open(struct net_device *dev)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
int ret = 0;
|
||||
|
||||
if (!qca)
|
||||
return -EINVAL;
|
||||
|
||||
qca->intr_req = 1;
|
||||
qca->intr_svc = 0;
|
||||
qca->sync = QCASPI_SYNC_UNKNOWN;
|
||||
qcafrm_fsm_init(&qca->frm_handle);
|
||||
|
||||
qca->spi_thread = kthread_run((void *)qcaspi_spi_thread,
|
||||
qca, "%s", dev->name);
|
||||
|
||||
if (IS_ERR(qca->spi_thread)) {
|
||||
netdev_err(dev, "%s: unable to start kernel thread.\n",
|
||||
QCASPI_DRV_NAME);
|
||||
return PTR_ERR(qca->spi_thread);
|
||||
}
|
||||
|
||||
ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0,
|
||||
dev->name, qca);
|
||||
if (ret) {
|
||||
netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n",
|
||||
QCASPI_DRV_NAME, qca->spi_dev->irq, ret);
|
||||
kthread_stop(qca->spi_thread);
|
||||
return ret;
|
||||
}
|
||||
|
||||
netif_start_queue(qca->net_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
qcaspi_netdev_close(struct net_device *dev)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
|
||||
netif_stop_queue(dev);
|
||||
|
||||
qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0);
|
||||
free_irq(qca->spi_dev->irq, qca);
|
||||
|
||||
kthread_stop(qca->spi_thread);
|
||||
qca->spi_thread = NULL;
|
||||
qcaspi_flush_tx_ring(qca);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static netdev_tx_t
|
||||
qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
{
|
||||
u32 frame_len;
|
||||
u8 *ptmp;
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
u16 new_tail;
|
||||
struct sk_buff *tskb;
|
||||
u8 pad_len = 0;
|
||||
|
||||
if (skb->len < QCAFRM_ETHMINLEN)
|
||||
pad_len = QCAFRM_ETHMINLEN - skb->len;
|
||||
|
||||
if (qca->txr.skb[qca->txr.tail]) {
|
||||
netdev_warn(qca->net_dev, "queue was unexpectedly full!\n");
|
||||
netif_stop_queue(qca->net_dev);
|
||||
qca->stats.ring_full++;
|
||||
return NETDEV_TX_BUSY;
|
||||
}
|
||||
|
||||
if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) ||
|
||||
(skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) {
|
||||
tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN,
|
||||
QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC);
|
||||
if (!tskb) {
|
||||
netdev_dbg(qca->net_dev, "could not allocate tx_buff\n");
|
||||
qca->stats.out_of_mem++;
|
||||
return NETDEV_TX_BUSY;
|
||||
}
|
||||
dev_kfree_skb(skb);
|
||||
skb = tskb;
|
||||
}
|
||||
|
||||
frame_len = skb->len + pad_len;
|
||||
|
||||
ptmp = skb_push(skb, QCAFRM_HEADER_LEN);
|
||||
qcafrm_create_header(ptmp, frame_len);
|
||||
|
||||
if (pad_len) {
|
||||
ptmp = skb_put(skb, pad_len);
|
||||
memset(ptmp, 0, pad_len);
|
||||
}
|
||||
|
||||
ptmp = skb_put(skb, QCAFRM_FOOTER_LEN);
|
||||
qcafrm_create_footer(ptmp);
|
||||
|
||||
netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n",
|
||||
skb->len);
|
||||
|
||||
qca->txr.size += skb->len + QCASPI_HW_PKT_LEN;
|
||||
|
||||
new_tail = qca->txr.tail + 1;
|
||||
if (new_tail >= qca->txr.count)
|
||||
new_tail = 0;
|
||||
|
||||
qca->txr.skb[qca->txr.tail] = skb;
|
||||
qca->txr.tail = new_tail;
|
||||
|
||||
if (!qcaspi_tx_ring_has_space(&qca->txr)) {
|
||||
netif_stop_queue(qca->net_dev);
|
||||
qca->stats.ring_full++;
|
||||
}
|
||||
|
||||
dev->trans_start = jiffies;
|
||||
|
||||
if (qca->spi_thread &&
|
||||
qca->spi_thread->state != TASK_RUNNING)
|
||||
wake_up_process(qca->spi_thread);
|
||||
|
||||
return NETDEV_TX_OK;
|
||||
}
|
||||
|
||||
static void
|
||||
qcaspi_netdev_tx_timeout(struct net_device *dev)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
|
||||
netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n",
|
||||
jiffies, jiffies - dev->trans_start);
|
||||
qca->net_dev->stats.tx_errors++;
|
||||
/* wake the queue if there is room */
|
||||
if (qcaspi_tx_ring_has_space(&qca->txr))
|
||||
netif_wake_queue(dev);
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_netdev_init(struct net_device *dev)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
|
||||
dev->mtu = QCASPI_MTU;
|
||||
dev->type = ARPHRD_ETHER;
|
||||
qca->clkspeed = qcaspi_clkspeed;
|
||||
qca->burst_len = qcaspi_burst_len;
|
||||
qca->spi_thread = NULL;
|
||||
qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN +
|
||||
QCAFRM_FOOTER_LEN + 4) * 4;
|
||||
|
||||
memset(&qca->stats, 0, sizeof(struct qcaspi_stats));
|
||||
|
||||
qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL);
|
||||
if (!qca->rx_buffer)
|
||||
return -ENOBUFS;
|
||||
|
||||
qca->rx_skb = netdev_alloc_skb(dev, qca->net_dev->mtu + VLAN_ETH_HLEN);
|
||||
if (!qca->rx_skb) {
|
||||
kfree(qca->rx_buffer);
|
||||
netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n");
|
||||
return -ENOBUFS;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
qcaspi_netdev_uninit(struct net_device *dev)
|
||||
{
|
||||
struct qcaspi *qca = netdev_priv(dev);
|
||||
|
||||
kfree(qca->rx_buffer);
|
||||
qca->buffer_size = 0;
|
||||
if (qca->rx_skb)
|
||||
dev_kfree_skb(qca->rx_skb);
|
||||
}
|
||||
|
||||
static int
|
||||
qcaspi_netdev_change_mtu(struct net_device *dev, int new_mtu)
|
||||
{
|
||||
if ((new_mtu < QCAFRM_ETHMINMTU) || (new_mtu > QCAFRM_ETHMAXMTU))
|
||||
return -EINVAL;
|
||||
|
||||
dev->mtu = new_mtu;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct net_device_ops qcaspi_netdev_ops = {
|
||||
.ndo_init = qcaspi_netdev_init,
|
||||
.ndo_uninit = qcaspi_netdev_uninit,
|
||||
.ndo_open = qcaspi_netdev_open,
|
||||
.ndo_stop = qcaspi_netdev_close,
|
||||
.ndo_start_xmit = qcaspi_netdev_xmit,
|
||||
.ndo_change_mtu = qcaspi_netdev_change_mtu,
|
||||
.ndo_set_mac_address = eth_mac_addr,
|
||||
.ndo_tx_timeout = qcaspi_netdev_tx_timeout,
|
||||
.ndo_validate_addr = eth_validate_addr,
|
||||
};
|
||||
|
||||
static void
|
||||
qcaspi_netdev_setup(struct net_device *dev)
|
||||
{
|
||||
struct qcaspi *qca = NULL;
|
||||
|
||||
ether_setup(dev);
|
||||
|
||||
dev->netdev_ops = &qcaspi_netdev_ops;
|
||||
qcaspi_set_ethtool_ops(dev);
|
||||
dev->watchdog_timeo = QCASPI_TX_TIMEOUT;
|
||||
dev->flags = IFF_MULTICAST;
|
||||
dev->tx_queue_len = 100;
|
||||
|
||||
qca = netdev_priv(dev);
|
||||
memset(qca, 0, sizeof(struct qcaspi));
|
||||
|
||||
memset(&qca->spi_xfer1, 0, sizeof(struct spi_transfer));
|
||||
memset(&qca->spi_xfer2, 0, sizeof(struct spi_transfer) * 2);
|
||||
|
||||
spi_message_init(&qca->spi_msg1);
|
||||
spi_message_add_tail(&qca->spi_xfer1, &qca->spi_msg1);
|
||||
|
||||
spi_message_init(&qca->spi_msg2);
|
||||
spi_message_add_tail(&qca->spi_xfer2[0], &qca->spi_msg2);
|
||||
spi_message_add_tail(&qca->spi_xfer2[1], &qca->spi_msg2);
|
||||
|
||||
memset(&qca->txr, 0, sizeof(qca->txr));
|
||||
qca->txr.count = TX_RING_MAX_LEN;
|
||||
}
|
||||
|
||||
static const struct of_device_id qca_spi_of_match[] = {
|
||||
{ .compatible = "qca,qca7000" },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, qca_spi_of_match);
|
||||
|
||||
static int
|
||||
qca_spi_probe(struct spi_device *spi_device)
|
||||
{
|
||||
struct qcaspi *qca = NULL;
|
||||
struct net_device *qcaspi_devs = NULL;
|
||||
u8 legacy_mode = 0;
|
||||
u16 signature;
|
||||
const char *mac;
|
||||
|
||||
if (!spi_device->dev.of_node) {
|
||||
dev_err(&spi_device->dev, "Missing device tree\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
legacy_mode = of_property_read_bool(spi_device->dev.of_node,
|
||||
"qca,legacy-mode");
|
||||
|
||||
if (qcaspi_clkspeed == 0) {
|
||||
if (spi_device->max_speed_hz)
|
||||
qcaspi_clkspeed = spi_device->max_speed_hz;
|
||||
else
|
||||
qcaspi_clkspeed = QCASPI_CLK_SPEED;
|
||||
}
|
||||
|
||||
if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) ||
|
||||
(qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) {
|
||||
dev_info(&spi_device->dev, "Invalid clkspeed: %d\n",
|
||||
qcaspi_clkspeed);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) ||
|
||||
(qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) {
|
||||
dev_info(&spi_device->dev, "Invalid burst len: %d\n",
|
||||
qcaspi_burst_len);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) ||
|
||||
(qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) {
|
||||
dev_info(&spi_device->dev, "Invalid pluggable: %d\n",
|
||||
qcaspi_pluggable);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
dev_info(&spi_device->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n",
|
||||
QCASPI_DRV_VERSION,
|
||||
qcaspi_clkspeed,
|
||||
qcaspi_burst_len,
|
||||
qcaspi_pluggable);
|
||||
|
||||
spi_device->mode = SPI_MODE_3;
|
||||
spi_device->max_speed_hz = qcaspi_clkspeed;
|
||||
if (spi_setup(spi_device) < 0) {
|
||||
dev_err(&spi_device->dev, "Unable to setup SPI device\n");
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi));
|
||||
if (!qcaspi_devs)
|
||||
return -ENOMEM;
|
||||
|
||||
qcaspi_netdev_setup(qcaspi_devs);
|
||||
|
||||
qca = netdev_priv(qcaspi_devs);
|
||||
if (!qca) {
|
||||
free_netdev(qcaspi_devs);
|
||||
dev_err(&spi_device->dev, "Fail to retrieve private structure\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
qca->net_dev = qcaspi_devs;
|
||||
qca->spi_dev = spi_device;
|
||||
qca->legacy_mode = legacy_mode;
|
||||
|
||||
mac = of_get_mac_address(spi_device->dev.of_node);
|
||||
|
||||
if (mac)
|
||||
ether_addr_copy(qca->net_dev->dev_addr, mac);
|
||||
|
||||
if (!is_valid_ether_addr(qca->net_dev->dev_addr)) {
|
||||
eth_hw_addr_random(qca->net_dev);
|
||||
dev_info(&spi_device->dev, "Using random MAC address: %pM\n",
|
||||
qca->net_dev->dev_addr);
|
||||
}
|
||||
|
||||
netif_carrier_off(qca->net_dev);
|
||||
|
||||
if (!qcaspi_pluggable) {
|
||||
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
||||
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
||||
|
||||
if (signature != QCASPI_GOOD_SIGNATURE) {
|
||||
dev_err(&spi_device->dev, "Invalid signature (0x%04X)\n",
|
||||
signature);
|
||||
free_netdev(qcaspi_devs);
|
||||
return -EFAULT;
|
||||
}
|
||||
}
|
||||
|
||||
if (register_netdev(qcaspi_devs)) {
|
||||
dev_info(&spi_device->dev, "Unable to register net device %s\n",
|
||||
qcaspi_devs->name);
|
||||
free_netdev(qcaspi_devs);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
spi_set_drvdata(spi_device, qcaspi_devs);
|
||||
|
||||
qcaspi_init_device_debugfs(qca);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
qca_spi_remove(struct spi_device *spi_device)
|
||||
{
|
||||
struct net_device *qcaspi_devs = spi_get_drvdata(spi_device);
|
||||
struct qcaspi *qca = netdev_priv(qcaspi_devs);
|
||||
|
||||
qcaspi_remove_device_debugfs(qca);
|
||||
|
||||
unregister_netdev(qcaspi_devs);
|
||||
free_netdev(qcaspi_devs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct spi_device_id qca_spi_id[] = {
|
||||
{ "qca7000", 0 },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, qca_spi_id);
|
||||
|
||||
static struct spi_driver qca_spi_driver = {
|
||||
.driver = {
|
||||
.name = QCASPI_DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = qca_spi_of_match,
|
||||
},
|
||||
.id_table = qca_spi_id,
|
||||
.probe = qca_spi_probe,
|
||||
.remove = qca_spi_remove,
|
||||
};
|
||||
module_spi_driver(qca_spi_driver);
|
||||
|
||||
MODULE_DESCRIPTION("Qualcomm Atheros SPI Driver");
|
||||
MODULE_AUTHOR("Qualcomm Atheros Communications");
|
||||
MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
MODULE_VERSION(QCASPI_DRV_VERSION);
|
114
drivers/net/ethernet/qualcomm/qca_spi.h
Normal file
114
drivers/net/ethernet/qualcomm/qca_spi.h
Normal file
|
@ -0,0 +1,114 @@
|
|||
/*
|
||||
* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
|
||||
* Copyright (c) 2014, I2SE GmbH
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software
|
||||
* for any purpose with or without fee is hereby granted, provided
|
||||
* that the above copyright notice and this permission notice appear
|
||||
* in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
|
||||
* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
|
||||
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/* Qualcomm Atheros SPI register definition.
|
||||
*
|
||||
* This module is designed to define the Qualcomm Atheros SPI register
|
||||
* placeholders;
|
||||
*/
|
||||
|
||||
#ifndef _QCA_SPI_H
|
||||
#define _QCA_SPI_H
|
||||
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include "qca_framing.h"
|
||||
|
||||
#define QCASPI_DRV_VERSION "0.2.7-i"
|
||||
#define QCASPI_DRV_NAME "qcaspi"
|
||||
|
||||
#define QCASPI_GOOD_SIGNATURE 0xAA55
|
||||
|
||||
#define TX_RING_MAX_LEN 10
|
||||
#define TX_RING_MIN_LEN 2
|
||||
|
||||
/* sync related constants */
|
||||
#define QCASPI_SYNC_UNKNOWN 0
|
||||
#define QCASPI_SYNC_RESET 1
|
||||
#define QCASPI_SYNC_READY 2
|
||||
|
||||
#define QCASPI_RESET_TIMEOUT 10
|
||||
|
||||
/* sync events */
|
||||
#define QCASPI_EVENT_UPDATE 0
|
||||
#define QCASPI_EVENT_CPUON 1
|
||||
|
||||
struct tx_ring {
|
||||
struct sk_buff *skb[TX_RING_MAX_LEN];
|
||||
u16 head;
|
||||
u16 tail;
|
||||
u16 size;
|
||||
u16 count;
|
||||
};
|
||||
|
||||
struct qcaspi_stats {
|
||||
u64 trig_reset;
|
||||
u64 device_reset;
|
||||
u64 reset_timeout;
|
||||
u64 read_err;
|
||||
u64 write_err;
|
||||
u64 read_buf_err;
|
||||
u64 write_buf_err;
|
||||
u64 out_of_mem;
|
||||
u64 write_buf_miss;
|
||||
u64 ring_full;
|
||||
u64 spi_err;
|
||||
};
|
||||
|
||||
struct qcaspi {
|
||||
struct net_device *net_dev;
|
||||
struct spi_device *spi_dev;
|
||||
struct task_struct *spi_thread;
|
||||
|
||||
struct tx_ring txr;
|
||||
struct qcaspi_stats stats;
|
||||
|
||||
struct spi_message spi_msg1;
|
||||
struct spi_message spi_msg2;
|
||||
struct spi_transfer spi_xfer1;
|
||||
struct spi_transfer spi_xfer2[2];
|
||||
|
||||
u8 *rx_buffer;
|
||||
u32 buffer_size;
|
||||
u8 sync;
|
||||
|
||||
struct qcafrm_handle frm_handle;
|
||||
struct sk_buff *rx_skb;
|
||||
|
||||
unsigned int intr_req;
|
||||
unsigned int intr_svc;
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
struct dentry *device_root;
|
||||
#endif
|
||||
|
||||
/* user configurable options */
|
||||
u32 clkspeed;
|
||||
u8 legacy_mode;
|
||||
u16 burst_len;
|
||||
};
|
||||
|
||||
int qcaspi_netdev_open(struct net_device *dev);
|
||||
int qcaspi_netdev_close(struct net_device *dev);
|
||||
|
||||
#endif /* _QCA_SPI_H */
|
Loading…
Reference in a new issue