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powerpc/dts: fix lbc lack of error interrupt 

P1020, P1021, P1022, P1023 when the lbc get error, the error
interrupt will be triggered. The corresponding interrupt is
internal IRQ0. So system have to process the lbc IRQ0 interrupt.

The corresponding lbc general interrupt is internal IRQ3.

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
[scottwood@freescale.com: bracketed individual list elements]
Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Wang Dongsheng 2014-01-07 14:26:42 +08:00 committed by Scott Wood
parent be2019816e
commit 297649b9f5
4 changed files with 8 additions and 4 deletions
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3
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
View File

@ -36,7 +36,8 @@
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
interrupts = <19 2 0 0>;
interrupts = <19 2 0 0>,
<16 2 0 0>;
};
/* controller at 0x9000 */

3
arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
View File

@ -36,7 +36,8 @@
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
interrupts = <19 2 0 0>;
interrupts = <19 2 0 0>,
<16 2 0 0>;
};
/* controller at 0x9000 */

3
arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
View File

@ -40,7 +40,8 @@
* pin muxing when the DIU is enabled.
*/
compatible = "fsl,p1022-elbc", "fsl,elbc";
interrupts = <19 2 0 0>;
interrupts = <19 2 0 0>,
<16 2 0 0>;
};
/* controller at 0x9000 */

3
arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
View File

@ -36,7 +36,8 @@
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
interrupts = <19 2 0 0>;
interrupts = <19 2 0 0>,
<16 2 0 0>;
};
/* controller at 0xa000 */