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net/mlx5: Remove not-implemented IPsec capabilities
Clean a capabilities enum to remove not-implemented bits. Link: https://lore.kernel.org/r/1044bb7b779107ff38e48e3f6553421104f3f819.1649232994.git.leonro@nvidia.com Reviewed-by: Raed Salem <raeds@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
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2 changed files with 5 additions and 10 deletions
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@ -51,10 +51,8 @@ u32 mlx5_ipsec_device_caps(struct mlx5_core_dev *mdev)
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MLX5_CAP_IPSEC(mdev, ipsec_crypto_esp_aes_gcm_128_decrypt))
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caps |= MLX5_ACCEL_IPSEC_CAP_ESP;
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if (MLX5_CAP_IPSEC(mdev, ipsec_esn)) {
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if (MLX5_CAP_IPSEC(mdev, ipsec_esn))
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caps |= MLX5_ACCEL_IPSEC_CAP_ESN;
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caps |= MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN;
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}
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/* We can accommodate up to 2^24 different IPsec objects
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* because we use up to 24 bit in flow table metadata
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@ -113,13 +113,10 @@ struct mlx5_accel_esp_xfrm {
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enum mlx5_accel_ipsec_cap {
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MLX5_ACCEL_IPSEC_CAP_DEVICE = 1 << 0,
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MLX5_ACCEL_IPSEC_CAP_REQUIRED_METADATA = 1 << 1,
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MLX5_ACCEL_IPSEC_CAP_ESP = 1 << 2,
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MLX5_ACCEL_IPSEC_CAP_IPV6 = 1 << 3,
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MLX5_ACCEL_IPSEC_CAP_LSO = 1 << 4,
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MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER = 1 << 5,
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MLX5_ACCEL_IPSEC_CAP_ESN = 1 << 6,
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MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN = 1 << 7,
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MLX5_ACCEL_IPSEC_CAP_ESP = 1 << 1,
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MLX5_ACCEL_IPSEC_CAP_IPV6 = 1 << 2,
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MLX5_ACCEL_IPSEC_CAP_LSO = 1 << 3,
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MLX5_ACCEL_IPSEC_CAP_ESN = 1 << 4,
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};
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#ifdef CONFIG_MLX5_EN_IPSEC
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