mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-28 07:13:34 +00:00
Merge branch 'drm-fixes-4.9' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Just a few bug fixes for 4.9. The big one is Mario's prime fencing fix. * 'drm-fixes-4.9' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu:fix vpost_needed routine drm/amdgpu/powerplay: drop a redundant NULL check drm/amdgpu: Attach exclusive fence to prime exported bo's. (v5)
This commit is contained in:
commit
29ed197333
5 changed files with 28 additions and 24 deletions
|
@ -459,6 +459,7 @@ struct amdgpu_bo {
|
|||
u64 metadata_flags;
|
||||
void *metadata;
|
||||
u32 metadata_size;
|
||||
unsigned prime_shared_count;
|
||||
/* list of all virtual address to which this bo
|
||||
* is associated to
|
||||
*/
|
||||
|
|
|
@ -132,7 +132,7 @@ static int amdgpu_bo_list_set(struct amdgpu_device *adev,
|
|||
entry->priority = min(info[i].bo_priority,
|
||||
AMDGPU_BO_LIST_MAX_PRIORITY);
|
||||
entry->tv.bo = &entry->robj->tbo;
|
||||
entry->tv.shared = true;
|
||||
entry->tv.shared = !entry->robj->prime_shared_count;
|
||||
|
||||
if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_GDS)
|
||||
gds_obj = entry->robj;
|
||||
|
|
|
@ -658,12 +658,10 @@ static bool amdgpu_vpost_needed(struct amdgpu_device *adev)
|
|||
return false;
|
||||
|
||||
if (amdgpu_passthrough(adev)) {
|
||||
/* for FIJI: In whole GPU pass-through virtualization case
|
||||
* old smc fw won't clear some registers (e.g. MEM_SIZE, BIOS_SCRATCH)
|
||||
* so amdgpu_card_posted return false and driver will incorrectly skip vPost.
|
||||
* but if we force vPost do in pass-through case, the driver reload will hang.
|
||||
* whether doing vPost depends on amdgpu_card_posted if smc version is above
|
||||
* 00160e00 for FIJI.
|
||||
/* for FIJI: In whole GPU pass-through virtualization case, after VM reboot
|
||||
* some old smc fw still need driver do vPost otherwise gpu hang, while
|
||||
* those smc fw version above 22.15 doesn't have this flaw, so we force
|
||||
* vpost executed for smc version below 22.15
|
||||
*/
|
||||
if (adev->asic_type == CHIP_FIJI) {
|
||||
int err;
|
||||
|
@ -674,22 +672,11 @@ static bool amdgpu_vpost_needed(struct amdgpu_device *adev)
|
|||
return true;
|
||||
|
||||
fw_ver = *((uint32_t *)adev->pm.fw->data + 69);
|
||||
if (fw_ver >= 0x00160e00)
|
||||
return !amdgpu_card_posted(adev);
|
||||
if (fw_ver < 0x00160e00)
|
||||
return true;
|
||||
}
|
||||
} else {
|
||||
/* in bare-metal case, amdgpu_card_posted return false
|
||||
* after system reboot/boot, and return true if driver
|
||||
* reloaded.
|
||||
* we shouldn't do vPost after driver reload otherwise GPU
|
||||
* could hang.
|
||||
*/
|
||||
if (amdgpu_card_posted(adev))
|
||||
return false;
|
||||
}
|
||||
|
||||
/* we assume vPost is neede for all other cases */
|
||||
return true;
|
||||
return !amdgpu_card_posted(adev);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -74,20 +74,36 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
|
|||
if (ret)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
bo->prime_shared_count = 1;
|
||||
return &bo->gem_base;
|
||||
}
|
||||
|
||||
int amdgpu_gem_prime_pin(struct drm_gem_object *obj)
|
||||
{
|
||||
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
|
||||
int ret = 0;
|
||||
long ret = 0;
|
||||
|
||||
ret = amdgpu_bo_reserve(bo, false);
|
||||
if (unlikely(ret != 0))
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* Wait for all shared fences to complete before we switch to future
|
||||
* use of exclusive fence on this prime shared bo.
|
||||
*/
|
||||
ret = reservation_object_wait_timeout_rcu(bo->tbo.resv, true, false,
|
||||
MAX_SCHEDULE_TIMEOUT);
|
||||
if (unlikely(ret < 0)) {
|
||||
DRM_DEBUG_PRIME("Fence wait failed: %li\n", ret);
|
||||
amdgpu_bo_unreserve(bo);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* pin buffer into GTT */
|
||||
ret = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT, NULL);
|
||||
if (likely(ret == 0))
|
||||
bo->prime_shared_count++;
|
||||
|
||||
amdgpu_bo_unreserve(bo);
|
||||
return ret;
|
||||
}
|
||||
|
@ -102,6 +118,8 @@ void amdgpu_gem_prime_unpin(struct drm_gem_object *obj)
|
|||
return;
|
||||
|
||||
amdgpu_bo_unpin(bo);
|
||||
if (bo->prime_shared_count)
|
||||
bo->prime_shared_count--;
|
||||
amdgpu_bo_unreserve(bo);
|
||||
}
|
||||
|
||||
|
|
|
@ -1469,8 +1469,6 @@ static int smu7_get_evv_voltages(struct pp_hwmgr *hwmgr)
|
|||
table_info->vddgfx_lookup_table, vv_id, &sclk)) {
|
||||
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
|
||||
PHM_PlatformCaps_ClockStretcher)) {
|
||||
if (table_info == NULL)
|
||||
return -EINVAL;
|
||||
sclk_table = table_info->vdd_dep_on_sclk;
|
||||
|
||||
for (j = 1; j < sclk_table->count; j++) {
|
||||
|
|
Loading…
Reference in a new issue