From 2a55c9a7ff2a863f05a9b9c8519ef81737d4a3ef Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 30 Dec 2010 11:53:48 +1000 Subject: [PATCH] drm/nvc0: reserve only subc 0 for kernel use Current 3D driver expects this behaviour. While this could be changed, there's no compelling reason to reserve more than one subchannel for the DRM. If we ever need to use an object other then M2MF, we can just re-bind subchannel 0 as required. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nouveau_channel.c | 22 ++++++++++++++-------- drivers/gpu/drm/nouveau/nouveau_fence.c | 2 +- 2 files changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index 4d2f19420922..a57a1d2f3a11 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c @@ -446,14 +446,20 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data, else init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_GART; - init->subchan[0].handle = NvM2MF; - if (dev_priv->card_type < NV_50) - init->subchan[0].grclass = 0x0039; - else - init->subchan[0].grclass = 0x5039; - init->subchan[1].handle = NvSw; - init->subchan[1].grclass = NV_SW; - init->nr_subchan = 2; + if (dev_priv->card_type < NV_C0) { + init->subchan[0].handle = NvM2MF; + if (dev_priv->card_type < NV_50) + init->subchan[0].grclass = 0x0039; + else + init->subchan[0].grclass = 0x5039; + init->subchan[1].handle = NvSw; + init->subchan[1].grclass = NV_SW; + init->nr_subchan = 2; + } else { + init->subchan[0].handle = 0x9039; + init->subchan[0].grclass = 0x9039; + init->nr_subchan = 1; + } /* Named memory object area */ ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem, diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index 88b2f29ca3e4..221b8462ea37 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fence.c +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c @@ -165,7 +165,7 @@ nouveau_fence_emit(struct nouveau_fence *fence) if (dev_priv->card_type < NV_C0) BEGIN_RING(chan, NvSubSw, 0x0050, 1); else - BEGIN_NVC0(chan, 2, NvSubSw, 0x0050, 1); + BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0050, 1); } else { BEGIN_RING(chan, NvSubSw, 0x0150, 1); }