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spi/imx: merge type SPI_IMX_VER_0_7 into SPI_IMX_VER_0_4
The only difference between SPI_IMX_VER_0_7 and SPI_IMX_VER_0_4 is .config function. The patch uses cpu_is_mx35 (to be removed) as the temporary solution to consolidate functions spi_imx0_4_config and spi_imx0_7_config into mx31_config. As a result, type SPI_IMX_VER_0_7 can be merged into SPI_IMX_VER_0_4. It also renames function spi_imx0_4_reset to mx31_reset to keep consistency with other function naming. A couple of redundant macros, MX3_CSPISTAT and MX3_CSPISTAT_RR, together with the useless type SPI_IMX_VER_0_5 also get cleaned up. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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66de757c58
commit
2a64a90a2c
2 changed files with 19 additions and 56 deletions
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@ -161,10 +161,7 @@ config SPI_IMX_VER_0_0
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def_bool y if SOC_IMX21 || SOC_IMX27
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config SPI_IMX_VER_0_4
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def_bool y if SOC_IMX31
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config SPI_IMX_VER_0_7
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def_bool y if ARCH_MX25 || SOC_IMX35 || SOC_IMX51 || SOC_IMX53
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def_bool y if ARCH_MX25 || SOC_IMX31 || SOC_IMX35 || SOC_IMX51 || SOC_IMX53
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config SPI_IMX_VER_2_3
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def_bool y if SOC_IMX51 || SOC_IMX53
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@ -45,9 +45,6 @@
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#define MXC_CSPIINT 0x0c
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#define MXC_RESET 0x1c
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#define MX3_CSPISTAT 0x14
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#define MX3_CSPISTAT_RR (1 << 3)
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/* generic defines to abstract from the different register layouts */
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#define MXC_INT_RR (1 << 0) /* Receive data ready interrupt */
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#define MXC_INT_TE (1 << 1) /* Transmit FIFO empty interrupt */
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@ -63,8 +60,6 @@ enum spi_imx_devtype {
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SPI_IMX_VER_IMX1,
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SPI_IMX_VER_0_0,
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SPI_IMX_VER_0_4,
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SPI_IMX_VER_0_5,
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SPI_IMX_VER_0_7,
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SPI_IMX_VER_2_3,
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};
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@ -343,7 +338,7 @@ static void __maybe_unused mx31_trigger(struct spi_imx_data *spi_imx)
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writel(reg, spi_imx->base + MXC_CSPICTRL);
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}
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static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx,
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static int __maybe_unused mx31_config(struct spi_imx_data *spi_imx,
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struct spi_imx_config *config)
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{
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unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
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@ -352,7 +347,12 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx,
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
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MX31_CSPICTRL_DR_SHIFT;
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reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT;
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if (cpu_is_mx35()) {
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reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT;
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reg |= MX31_CSPICTRL_SSCTL;
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} else {
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reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT;
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}
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if (config->mode & SPI_CPHA)
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reg |= MX31_CSPICTRL_PHA;
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@ -361,33 +361,9 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx,
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if (config->mode & SPI_CS_HIGH)
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reg |= MX31_CSPICTRL_SSPOL;
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if (cs < 0)
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reg |= (cs + 32) << MX31_CSPICTRL_CS_SHIFT;
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writel(reg, spi_imx->base + MXC_CSPICTRL);
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return 0;
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}
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static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx,
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struct spi_imx_config *config)
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{
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unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
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int cs = spi_imx->chipselect[config->cs];
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
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MX31_CSPICTRL_DR_SHIFT;
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reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT;
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reg |= MX31_CSPICTRL_SSCTL;
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if (config->mode & SPI_CPHA)
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reg |= MX31_CSPICTRL_PHA;
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if (config->mode & SPI_CPOL)
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reg |= MX31_CSPICTRL_POL;
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if (config->mode & SPI_CS_HIGH)
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reg |= MX31_CSPICTRL_SSPOL;
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if (cs < 0)
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reg |= (cs + 32) << MX35_CSPICTRL_CS_SHIFT;
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reg |= (cs + 32) <<
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(cpu_is_mx35() ? MX35_CSPICTRL_CS_SHIFT :
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MX31_CSPICTRL_CS_SHIFT);
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writel(reg, spi_imx->base + MXC_CSPICTRL);
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@ -399,10 +375,10 @@ static int __maybe_unused mx31_rx_available(struct spi_imx_data *spi_imx)
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return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR;
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}
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static void __maybe_unused spi_imx0_4_reset(struct spi_imx_data *spi_imx)
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static void __maybe_unused mx31_reset(struct spi_imx_data *spi_imx)
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{
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/* drain receive buffer */
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while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR)
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while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR)
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readl(spi_imx->base + MXC_CSPIRXDATA);
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}
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@ -563,20 +539,10 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] = {
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#ifdef CONFIG_SPI_IMX_VER_0_4
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[SPI_IMX_VER_0_4] = {
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.intctrl = mx31_intctrl,
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.config = spi_imx0_4_config,
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.config = mx31_config,
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.trigger = mx31_trigger,
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.rx_available = mx31_rx_available,
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.reset = spi_imx0_4_reset,
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.fifosize = 8,
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},
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#endif
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#ifdef CONFIG_SPI_IMX_VER_0_7
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[SPI_IMX_VER_0_7] = {
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.intctrl = mx31_intctrl,
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.config = spi_imx0_7_config,
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.trigger = mx31_trigger,
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.rx_available = mx31_rx_available,
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.reset = spi_imx0_4_reset,
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.reset = mx31_reset,
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.fifosize = 8,
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},
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#endif
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@ -732,7 +698,7 @@ static struct platform_device_id spi_imx_devtype[] = {
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.driver_data = SPI_IMX_VER_0_0,
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}, {
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.name = "imx25-cspi",
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.driver_data = SPI_IMX_VER_0_7,
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.driver_data = SPI_IMX_VER_0_4,
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}, {
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.name = "imx27-cspi",
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.driver_data = SPI_IMX_VER_0_0,
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@ -741,16 +707,16 @@ static struct platform_device_id spi_imx_devtype[] = {
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.driver_data = SPI_IMX_VER_0_4,
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}, {
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.name = "imx35-cspi",
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.driver_data = SPI_IMX_VER_0_7,
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.driver_data = SPI_IMX_VER_0_4,
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}, {
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.name = "imx51-cspi",
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.driver_data = SPI_IMX_VER_0_7,
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.driver_data = SPI_IMX_VER_0_4,
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}, {
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.name = "imx51-ecspi",
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.driver_data = SPI_IMX_VER_2_3,
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}, {
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.name = "imx53-cspi",
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.driver_data = SPI_IMX_VER_0_7,
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.driver_data = SPI_IMX_VER_0_4,
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}, {
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.name = "imx53-ecspi",
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.driver_data = SPI_IMX_VER_2_3,
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