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selftests/powerpc/pmu: Add macro to extract mmcr0/mmcr1 fields

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Add macro and utility functions to fetch individual fields from Monitor
Mode Control Register 0(MMCR0) and Monitor Mode Control Register
1(MMCR1) PMU register.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220127072012.662451-8-kjain@linux.ibm.com
This commit is contained in:
Athira Rajeev 2022-01-27 12:49:59 +05:30 committed by Michael Ellerman
parent 79c4e6aba8
commit 2b49e64106
1 changed files with 64 additions and 0 deletions
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64
tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
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@ -12,6 +12,10 @@
#define PERF_POWER9_MASK 0x7f8ffffffffffff
#define PERF_POWER10_MASK 0x7ffffffffffffff
#define MMCR0_FC56 0x00000010UL /* freeze counters 5 and 6 */
#define MMCR0_PMCCEXT 0x00000200UL /* PMCCEXT control */
#define MMCR1_RSQ 0x200000000000ULL /* radix scope qual field */
extern int ev_mask_pmcxsel, ev_shift_pmcxsel;
extern int ev_mask_marked, ev_shift_marked;
extern int ev_mask_comb, ev_shift_comb;
@ -48,6 +52,66 @@ int collect_samples(void *sample_buff);
u64 *get_intr_regs(struct event *event, void *sample_buff);
u64 get_reg_value(u64 *intr_regs, char *register_name);
static inline int get_mmcr0_fc56(u64 mmcr0, int pmc)
{
return (mmcr0 & MMCR0_FC56);
}
static inline int get_mmcr0_pmccext(u64 mmcr0, int pmc)
{
return (mmcr0 & MMCR0_PMCCEXT);
}
static inline int get_mmcr0_pmao(u64 mmcr0, int pmc)
{
return ((mmcr0 >> 7) & 0x1);
}
static inline int get_mmcr0_cc56run(u64 mmcr0, int pmc)
{
return ((mmcr0 >> 8) & 0x1);
}
static inline int get_mmcr0_pmcjce(u64 mmcr0, int pmc)
{
return ((mmcr0 >> 14) & 0x1);
}
static inline int get_mmcr0_pmc1ce(u64 mmcr0, int pmc)
{
return ((mmcr0 >> 15) & 0x1);
}
static inline int get_mmcr0_pmae(u64 mmcr0, int pmc)
{
return ((mmcr0 >> 27) & 0x1);
}
static inline int get_mmcr1_pmcxsel(u64 mmcr1, int pmc)
{
return ((mmcr1 >> ((24 - (((pmc) - 1) * 8))) & 0xff));
}
static inline int get_mmcr1_unit(u64 mmcr1, int pmc)
{
return ((mmcr1 >> ((60 - (4 * ((pmc) - 1))))) & 0xf);
}
static inline int get_mmcr1_comb(u64 mmcr1, int pmc)
{
return ((mmcr1 >> (38 - ((pmc - 1) * 2))) & 0x3);
}
static inline int get_mmcr1_cache(u64 mmcr1, int pmc)
{
return ((mmcr1 >> 46) & 0x3);
}
static inline int get_mmcr1_rsq(u64 mmcr1, int pmc)
{
return mmcr1 & MMCR1_RSQ;
}
static inline int get_mmcr2_fcs(u64 mmcr2, int pmc)
{
return ((mmcr2 & (1ull << (63 - (((pmc) - 1) * 9)))) >> (63 - (((pmc) - 1) * 9)));