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sh-pfc: r8a7779: Remove GPIO data

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GPIOs are now handled by a separate driver, remove GPIO data from the
SoC information structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Laurent Pinchart 2013-03-10 04:02:15 +01:00 committed by Simon Horman
parent 37a72d074d
commit 2b4b588299
1 changed files with 1 additions and 57 deletions
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58
drivers/pinctrl/sh-pfc/pfc-r8a7779.c
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@ -85,18 +85,12 @@
}
#define _GP_DATA(bank, pin, name, sfx) \
PINMUX_DATA(name##_DATA, name##_FN, name##_IN, name##_OUT)
#define _GP_INOUTSEL(bank, pin, name, sfx) name##_IN, name##_OUT
#define _GP_INDT(bank, pin, name, sfx) name##_DATA
PINMUX_DATA(name##_DATA, name##_FN)
#define GP_ALL(str) CPU_ALL_PORT(_GP_PORT_ALL, str)
#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused)
#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused)
#define GP_INOUTSEL(bank) PORT_GP_32_REV(bank, _GP_INOUTSEL, unused)
#define GP_INDT(bank) PORT_GP_32_REV(bank, _GP_INDT, unused)
#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
FN_##ipsr, FN_##fn)
@ -108,14 +102,6 @@ enum {
GP_ALL(DATA), /* GP_0_0_DATA -> GP_6_8_DATA */
PINMUX_DATA_END,
PINMUX_INPUT_BEGIN,
GP_ALL(IN), /* GP_0_0_IN -> GP_6_8_IN */
PINMUX_INPUT_END,
PINMUX_OUTPUT_BEGIN,
GP_ALL(OUT), /* GP_0_0_OUT -> GP_6_8_OUT */
PINMUX_OUTPUT_END,
PINMUX_FUNCTION_BEGIN,
GP_ALL(FN), /* GP_0_0_FN -> GP_6_8_FN */
@ -3549,45 +3535,6 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
/* SEL_I2C1 [2] */
FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, FN_SEL_I2C1_3 }
},
{ PINMUX_CFG_REG("INOUTSEL0", 0xffc40004, 32, 1) { GP_INOUTSEL(0) } },
{ PINMUX_CFG_REG("INOUTSEL1", 0xffc41004, 32, 1) { GP_INOUTSEL(1) } },
{ PINMUX_CFG_REG("INOUTSEL2", 0xffc42004, 32, 1) { GP_INOUTSEL(2) } },
{ PINMUX_CFG_REG("INOUTSEL3", 0xffc43004, 32, 1) { GP_INOUTSEL(3) } },
{ PINMUX_CFG_REG("INOUTSEL4", 0xffc44004, 32, 1) { GP_INOUTSEL(4) } },
{ PINMUX_CFG_REG("INOUTSEL5", 0xffc45004, 32, 1) { GP_INOUTSEL(5) } },
{ PINMUX_CFG_REG("INOUTSEL6", 0xffc46004, 32, 1) {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0,
0, 0,
0, 0,
GP_6_8_IN, GP_6_8_OUT,
GP_6_7_IN, GP_6_7_OUT,
GP_6_6_IN, GP_6_6_OUT,
GP_6_5_IN, GP_6_5_OUT,
GP_6_4_IN, GP_6_4_OUT,
GP_6_3_IN, GP_6_3_OUT,
GP_6_2_IN, GP_6_2_OUT,
GP_6_1_IN, GP_6_1_OUT,
GP_6_0_IN, GP_6_0_OUT, }
},
{ },
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("INDT0", 0xffc40008, 32) { GP_INDT(0) } },
{ PINMUX_DATA_REG("INDT1", 0xffc41008, 32) { GP_INDT(1) } },
{ PINMUX_DATA_REG("INDT2", 0xffc42008, 32) { GP_INDT(2) } },
{ PINMUX_DATA_REG("INDT3", 0xffc43008, 32) { GP_INDT(3) } },
{ PINMUX_DATA_REG("INDT4", 0xffc44008, 32) { GP_INDT(4) } },
{ PINMUX_DATA_REG("INDT5", 0xffc45008, 32) { GP_INDT(5) } },
{ PINMUX_DATA_REG("INDT6", 0xffc46008, 32) {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, GP_6_8_DATA,
GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA,
GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA }
},
{ },
};
@ -3596,8 +3543,6 @@ const struct sh_pfc_soc_info r8a7779_pinmux_info = {
.unlock_reg = 0xfffc0000, /* PMMR */
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.pins = pinmux_pins,
@ -3608,7 +3553,6 @@ const struct sh_pfc_soc_info r8a7779_pinmux_info = {
.nr_functions = ARRAY_SIZE(pinmux_functions),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.gpio_data = pinmux_data,
.gpio_data_size = ARRAY_SIZE(pinmux_data),