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net: phy: add generic UniMAC MDIO bus driver
Add a generic UniMAC MDIO bus driver and its Device Tree binding, which can be used by the BCMGENET driver as-is, and the upcoming Starfighter 2 Ethernet switch MDIO bus controller. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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* Broadcom UniMAC MDIO bus controller
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Required properties:
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- compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2",
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"brcm,genet-mdio-v3", "brcm,genet-mdio-v4" or "brcm,unimac-mdio"
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- reg: address and length of the regsiter set for the device, first one is the
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base register, and the second one is optional and for indirect accesses to
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larger than 16-bits MDIO transactions
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- reg-names: name(s) of the register must be "mdio" and optional "mdio_indir_rw"
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- #size-cells: must be 1
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- #address-cells: must be 0
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Optional properties:
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- interrupts: must be one if the interrupt is shared with the Ethernet MAC or
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Ethernet switch this MDIO block is integrated from, or must be two, if there
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are two separate interrupts, first one must be "mdio done" and second must be
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for "mdio error"
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- interrupt-names: must be "mdio_done_error" when there is a share interrupt fed
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to this hardware block, or must be "mdio_done" for the first interrupt and
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"mdio_error" for the second when there are separate interrupts
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Child nodes of this MDIO bus controller node are standard Ethernet PHY device
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nodes as described in Documentation/devicetree/bindings/net/phy.txt
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Example:
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mdio@403c0 {
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compatible = "brcm,unimac-mdio";
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reg = <0x403c0 0x8 0x40300 0x18>;
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reg-names = "mdio", "mdio_indir_rw";
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#size-cells = <1>;
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#address-cells = <0>;
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...
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phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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};
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@ -205,6 +205,14 @@ config MDIO_BUS_MUX_MMIOREG
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Currently, only 8-bit registers are supported.
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config MDIO_BCM_UNIMAC
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tristate "Broadcom UniMAC MDIO bus controller"
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help
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This module provides a driver for the Broadcom UniMAC MDIO busses.
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This hardware can be found in the Broadcom GENET Ethernet MAC
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controllers as well as some Broadcom Ethernet switches such as the
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Starfighter 2 switches.
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endif # PHYLIB
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config MICREL_KS8995MA
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@ -34,3 +34,4 @@ obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += mdio-mux-mmioreg.o
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obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.o
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obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o
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obj-$(CONFIG_AMD_XGBE_PHY) += amd-xgbe-phy.o
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obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o
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212
drivers/net/phy/mdio-bcm-unimac.c
Normal file
212
drivers/net/phy/mdio-bcm-unimac.c
Normal file
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/*
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* Broadcom UniMAC MDIO bus controller driver
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*
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* Copyright (C) 2014, Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/of_mdio.h>
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#define MDIO_CMD 0x00
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#define MDIO_START_BUSY (1 << 29)
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#define MDIO_READ_FAIL (1 << 28)
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#define MDIO_RD (2 << 26)
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#define MDIO_WR (1 << 26)
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#define MDIO_PMD_SHIFT 21
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#define MDIO_PMD_MASK 0x1F
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#define MDIO_REG_SHIFT 16
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#define MDIO_REG_MASK 0x1F
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#define MDIO_CFG 0x04
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#define MDIO_C22 (1 << 0)
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#define MDIO_C45 0
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#define MDIO_CLK_DIV_SHIFT 4
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#define MDIO_CLK_DIV_MASK 0x3F
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#define MDIO_SUPP_PREAMBLE (1 << 12)
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struct unimac_mdio_priv {
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struct mii_bus *mii_bus;
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void __iomem *base;
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};
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static inline void unimac_mdio_start(struct unimac_mdio_priv *priv)
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{
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u32 reg;
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reg = __raw_readl(priv->base + MDIO_CMD);
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reg |= MDIO_START_BUSY;
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__raw_writel(reg, priv->base + MDIO_CMD);
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}
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static inline unsigned int unimac_mdio_busy(struct unimac_mdio_priv *priv)
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{
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return __raw_readl(priv->base + MDIO_CMD) & MDIO_START_BUSY;
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}
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static int unimac_mdio_read(struct mii_bus *bus, int phy_id, int reg)
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{
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struct unimac_mdio_priv *priv = bus->priv;
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unsigned int timeout = 1000;
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u32 cmd;
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/* Prepare the read operation */
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cmd = MDIO_RD | (phy_id << MDIO_PMD_SHIFT) | (reg << MDIO_REG_SHIFT);
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__raw_writel(cmd, priv->base + MDIO_CMD);
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/* Start MDIO transaction */
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unimac_mdio_start(priv);
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do {
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if (!unimac_mdio_busy(priv))
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break;
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usleep_range(1000, 2000);
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} while (timeout--);
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if (!timeout)
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return -ETIMEDOUT;
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cmd = __raw_readl(priv->base + MDIO_CMD);
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if (cmd & MDIO_READ_FAIL)
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return -EIO;
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return cmd & 0xffff;
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}
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static int unimac_mdio_write(struct mii_bus *bus, int phy_id,
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int reg, u16 val)
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{
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struct unimac_mdio_priv *priv = bus->priv;
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unsigned int timeout = 1000;
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u32 cmd;
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/* Prepare the write operation */
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cmd = MDIO_WR | (phy_id << MDIO_PMD_SHIFT) |
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(reg << MDIO_REG_SHIFT) | (0xffff & val);
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__raw_writel(cmd, priv->base + MDIO_CMD);
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unimac_mdio_start(priv);
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do {
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if (!unimac_mdio_busy(priv))
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break;
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usleep_range(1000, 2000);
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} while (timeout--);
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if (!timeout)
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return -ETIMEDOUT;
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return 0;
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}
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static int unimac_mdio_probe(struct platform_device *pdev)
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{
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struct unimac_mdio_priv *priv;
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struct device_node *np;
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struct mii_bus *bus;
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struct resource *r;
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int ret;
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np = pdev->dev.of_node;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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/* Just ioremap, as this MDIO block is usually integrated into an
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* Ethernet MAC controller register range
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*/
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priv->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
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if (!priv->base) {
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dev_err(&pdev->dev, "failed to remap register\n");
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return -ENOMEM;
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}
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priv->mii_bus = mdiobus_alloc();
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if (!priv->mii_bus)
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return -ENOMEM;
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bus = priv->mii_bus;
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bus->priv = priv;
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bus->name = "unimac MII bus";
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bus->parent = &pdev->dev;
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bus->read = unimac_mdio_read;
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bus->write = unimac_mdio_write;
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
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bus->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);
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if (!bus->irq) {
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ret = -ENOMEM;
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goto out_mdio_free;
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}
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ret = of_mdiobus_register(bus, np);
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if (ret) {
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dev_err(&pdev->dev, "MDIO bus registration failed\n");
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goto out_mdio_irq;
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}
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platform_set_drvdata(pdev, priv);
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dev_info(&pdev->dev, "Broadcom UniMAC MDIO bus at 0x%p\n", priv->base);
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return 0;
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out_mdio_irq:
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kfree(bus->irq);
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out_mdio_free:
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mdiobus_free(bus);
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return ret;
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}
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static int unimac_mdio_remove(struct platform_device *pdev)
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{
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struct unimac_mdio_priv *priv = platform_get_drvdata(pdev);
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mdiobus_unregister(priv->mii_bus);
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kfree(priv->mii_bus->irq);
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mdiobus_free(priv->mii_bus);
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return 0;
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}
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static struct of_device_id unimac_mdio_ids[] = {
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{ .compatible = "brcm,genet-mdio-v4", },
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{ .compatible = "brcm,genet-mdio-v3", },
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{ .compatible = "brcm,genet-mdio-v2", },
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{ .compatible = "brcm,genet-mdio-v1", },
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{ .compatible = "brcm,unimac-mdio", },
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};
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static struct platform_driver unimac_mdio_driver = {
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.driver = {
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.name = "unimac-mdio",
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.owner = THIS_MODULE,
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.of_match_table = unimac_mdio_ids,
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},
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.probe = unimac_mdio_probe,
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.remove = unimac_mdio_remove,
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};
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module_platform_driver(unimac_mdio_driver);
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MODULE_AUTHOR("Broadcom Corporation");
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MODULE_DESCRIPTION("Broadcom UniMAC MDIO bus controller");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:unimac-mdio");
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