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arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
[ Upstream commit 93f2a11580
]
The GCC_LPASS_Q6_AXI_CLK and GCC_LPASS_SWAY_CLK clocks may not be
touched on a typical UEFI based SDM845 device, but when the kernel is
built with CONFIG_SDM_LPASSCC_845 this happens, unless they are marked
as protected-clocks in the DT.
This was done for the MTP and the Pocophone, but not for DB845c and the
Lenovo Yoga C630 - causing these to fail to boot if the LPASS clock
controller is enabled (which it typically isn't).
Tested-by: Vinod Koul <vkoul@kernel.org> #on db845c
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20201222001103.3112306-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
92c40ed0ab
commit
2cb208ba0f
2 changed files with 6 additions and 2 deletions
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@ -337,7 +337,9 @@ &cdsp_pas {
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&gcc {
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protected-clocks = <GCC_QSPI_CORE_CLK>,
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<GCC_QSPI_CORE_CLK_SRC>,
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
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<GCC_LPASS_Q6_AXI_CLK>,
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<GCC_LPASS_SWAY_CLK>;
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};
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&pm8998_gpio {
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@ -232,7 +232,9 @@ &apps_smmu {
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&gcc {
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protected-clocks = <GCC_QSPI_CORE_CLK>,
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<GCC_QSPI_CORE_CLK_SRC>,
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
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<GCC_LPASS_Q6_AXI_CLK>,
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<GCC_LPASS_SWAY_CLK>;
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};
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&i2c1 {
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