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PCI: Align bridge I/O windows as required by downstream devices & bridges
An upstream bridge's I/O window must be at least as aligned as any downstream device or bridge requires. In particular, if the upstream bridge supports 1K alignment but a downstream bridge requires 4K alignment, the upstream window must also be 4K aligned. Therefore, do not reduce the required alignment ("min_align") based on the upstream bridge's capabilities. Reported-by: Wei Yang <weiyang@linux.vnet.ibm.com> Suggested-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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1 changed files with 2 additions and 5 deletions
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@ -749,12 +749,12 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
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struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
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resource_size_t size = 0, size0 = 0, size1 = 0;
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resource_size_t children_add_size = 0;
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resource_size_t min_align, io_align, align;
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resource_size_t min_align, align;
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if (!b_res)
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return;
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io_align = min_align = window_alignment(bus, IORESOURCE_IO);
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min_align = window_alignment(bus, IORESOURCE_IO);
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list_for_each_entry(dev, &bus->devices, bus_list) {
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int i;
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@ -781,9 +781,6 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
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}
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}
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if (min_align > io_align)
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min_align = io_align;
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size0 = calculate_iosize(size, min_size, size1,
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resource_size(b_res), min_align);
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if (children_add_size > add_size)
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