drm/amdgpu: add encode tests for vcn
Add encode ring and ib tests. Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Leo Liu
Alex Deucher
parent
95d0906f85
commit
2d531d81d0
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@ -112,6 +112,15 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
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return r;
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}
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ring = &adev->vcn.ring_enc[0];
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rq = &ring->sched.sched_rq[AMD_SCHED_PRIORITY_NORMAL];
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r = amd_sched_entity_init(&ring->sched, &adev->vcn.entity_enc,
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rq, amdgpu_sched_jobs);
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if (r != 0) {
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DRM_ERROR("Failed setting up VCN enc run queue.\n");
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return r;
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}
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return 0;
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}
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@ -121,6 +130,8 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev)
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amd_sched_entity_fini(&adev->vcn.ring_dec.sched, &adev->vcn.entity_dec);
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amd_sched_entity_fini(&adev->vcn.ring_enc[0].sched, &adev->vcn.entity_enc);
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amdgpu_bo_free_kernel(&adev->vcn.vcpu_bo,
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&adev->vcn.gpu_addr,
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(void **)&adev->vcn.cpu_addr);
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@ -423,3 +434,195 @@ int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
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error:
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return r;
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}
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static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
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struct dma_fence **fence)
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{
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const unsigned ib_size_dw = 1024;
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struct amdgpu_job *job;
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struct amdgpu_ib *ib;
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struct dma_fence *f = NULL;
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uint64_t dummy;
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int i, r;
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r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);
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if (r)
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return r;
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ib = &job->ibs[0];
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dummy = ib->gpu_addr + 1024;
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/* stitch together an VCN enc create msg */
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ib->length_dw = 0;
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ib->ptr[ib->length_dw++] = 0x0000000c; /* len */
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ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */
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ib->ptr[ib->length_dw++] = handle;
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ib->ptr[ib->length_dw++] = 0x00000040; /* len */
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ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */
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ib->ptr[ib->length_dw++] = 0x00000000;
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ib->ptr[ib->length_dw++] = 0x00000042;
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ib->ptr[ib->length_dw++] = 0x0000000a;
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ib->ptr[ib->length_dw++] = 0x00000001;
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ib->ptr[ib->length_dw++] = 0x00000080;
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ib->ptr[ib->length_dw++] = 0x00000060;
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ib->ptr[ib->length_dw++] = 0x00000100;
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ib->ptr[ib->length_dw++] = 0x00000100;
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ib->ptr[ib->length_dw++] = 0x0000000c;
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ib->ptr[ib->length_dw++] = 0x00000000;
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ib->ptr[ib->length_dw++] = 0x00000000;
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ib->ptr[ib->length_dw++] = 0x00000000;
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ib->ptr[ib->length_dw++] = 0x00000000;
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ib->ptr[ib->length_dw++] = 0x00000000;
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ib->ptr[ib->length_dw++] = 0x00000014; /* len */
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ib->ptr[ib->length_dw++] = 0x05000005; /* feedback buffer */
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ib->ptr[ib->length_dw++] = upper_32_bits(dummy);
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ib->ptr[ib->length_dw++] = dummy;
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ib->ptr[ib->length_dw++] = 0x00000001;
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for (i = ib->length_dw; i < ib_size_dw; ++i)
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ib->ptr[i] = 0x0;
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r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
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job->fence = dma_fence_get(f);
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if (r)
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goto err;
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amdgpu_job_free(job);
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if (fence)
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*fence = dma_fence_get(f);
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dma_fence_put(f);
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return 0;
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err:
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amdgpu_job_free(job);
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return r;
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}
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static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
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bool direct, struct dma_fence **fence)
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{
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const unsigned ib_size_dw = 1024;
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struct amdgpu_job *job;
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struct amdgpu_ib *ib;
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struct dma_fence *f = NULL;
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int i, r;
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r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);
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if (r)
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return r;
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ib = &job->ibs[0];
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/* stitch together an VCN enc destroy msg */
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ib->length_dw = 0;
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ib->ptr[ib->length_dw++] = 0x0000000c; /* len */
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ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */
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ib->ptr[ib->length_dw++] = handle;
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ib->ptr[ib->length_dw++] = 0x00000020; /* len */
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ib->ptr[ib->length_dw++] = 0x00000002; /* task info */
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ib->ptr[ib->length_dw++] = 0xffffffff; /* next task info, set to 0xffffffff if no */
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ib->ptr[ib->length_dw++] = 0x00000001; /* destroy session */
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ib->ptr[ib->length_dw++] = 0x00000000;
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ib->ptr[ib->length_dw++] = 0x00000000;
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ib->ptr[ib->length_dw++] = 0xffffffff; /* feedback is not needed, set to 0xffffffff and firmware will not output feedback */
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ib->ptr[ib->length_dw++] = 0x00000000;
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ib->ptr[ib->length_dw++] = 0x00000008; /* len */
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ib->ptr[ib->length_dw++] = 0x02000001; /* destroy cmd */
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for (i = ib->length_dw; i < ib_size_dw; ++i)
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ib->ptr[i] = 0x0;
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if (direct) {
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r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
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job->fence = dma_fence_get(f);
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if (r)
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goto err;
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amdgpu_job_free(job);
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} else {
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r = amdgpu_job_submit(job, ring, &ring->adev->vcn.entity_enc,
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AMDGPU_FENCE_OWNER_UNDEFINED, &f);
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if (r)
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goto err;
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}
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if (fence)
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*fence = dma_fence_get(f);
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dma_fence_put(f);
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return 0;
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err:
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amdgpu_job_free(job);
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return r;
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}
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int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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uint32_t rptr = amdgpu_ring_get_rptr(ring);
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unsigned i;
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int r;
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r = amdgpu_ring_alloc(ring, 16);
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if (r) {
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DRM_ERROR("amdgpu: vcn enc failed to lock ring %d (%d).\n",
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ring->idx, r);
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return r;
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}
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amdgpu_ring_write(ring, VCE_CMD_END);
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amdgpu_ring_commit(ring);
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for (i = 0; i < adev->usec_timeout; i++) {
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if (amdgpu_ring_get_rptr(ring) != rptr)
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break;
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DRM_UDELAY(1);
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}
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if (i < adev->usec_timeout) {
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DRM_INFO("ring test on %d succeeded in %d usecs\n",
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ring->idx, i);
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} else {
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DRM_ERROR("amdgpu: ring %d test failed\n",
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ring->idx);
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r = -ETIMEDOUT;
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}
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return r;
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}
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int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
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{
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struct dma_fence *fence = NULL;
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long r;
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r = amdgpu_vcn_enc_get_create_msg(ring, 1, NULL);
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if (r) {
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DRM_ERROR("amdgpu: failed to get create msg (%ld).\n", r);
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goto error;
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}
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r = amdgpu_vcn_enc_get_destroy_msg(ring, 1, true, &fence);
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if (r) {
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DRM_ERROR("amdgpu: failed to get destroy ib (%ld).\n", r);
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goto error;
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}
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r = dma_fence_wait_timeout(fence, false, timeout);
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if (r == 0) {
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DRM_ERROR("amdgpu: IB test timed out.\n");
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r = -ETIMEDOUT;
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} else if (r < 0) {
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DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
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} else {
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DRM_INFO("ib test on ring %d succeeded\n", ring->idx);
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r = 0;
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}
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error:
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dma_fence_put(fence);
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return r;
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}
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@ -32,4 +32,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring);
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void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring);
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int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout);
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int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring);
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int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout);
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#endif
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