drm/mgag200: Store values (not bits) in struct mgag200_pll_values
The fields in struct mgag200_pll_values currently hold the bits of each register. Store the PLL values instead and let the PLL-update code figure out the bits for each register. Until now, the compute function either stored plain values or register bits in struct mgag200_pll_values. The rsp update function used the values as-is. This made it very hard to correctly interpret the stored values (e.g., for logging or debugging). With the cleanup, the stored values now have a clear meaning. v2: * add a bit more context in the commit message (Sam) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-7-tzimmermann@suse.de
This commit is contained in:
Thomas Zimmermann
parent
d9d992238a
commit
2dd040946e
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@ -123,7 +123,7 @@ static int mgag200_compute_pixpll_values_g200(struct mga_device *mdev, long cloc
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const int in_div_max = 6;
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const int feed_div_min = 7;
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const int feed_div_max = 127;
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u8 testm, testn;
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u8 testp, testm, testn;
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u8 n = 0, m = 0, p, s;
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long f_vco;
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long computed;
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@ -141,10 +141,11 @@ static int mgag200_compute_pixpll_values_g200(struct mga_device *mdev, long cloc
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clock = p_clk_min >> 3;
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f_vco = clock;
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for (p = 0;
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p <= post_div_max && f_vco < p_clk_min;
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p = (p << 1) + 1, f_vco <<= 1)
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for (testp = 0;
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testp <= post_div_max && f_vco < p_clk_min;
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testp = (testp << 1) + 1, f_vco <<= 1)
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;
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p = testp + 1;
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delta = clock;
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@ -157,12 +158,12 @@ static int mgag200_compute_pixpll_values_g200(struct mga_device *mdev, long cloc
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tmp_delta = computed - f_vco;
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if (tmp_delta < delta) {
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delta = tmp_delta;
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m = testm;
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n = testn;
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m = testm + 1;
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n = testn + 1;
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}
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}
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}
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f_vco = ref_clk * (n + 1) / (m + 1);
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f_vco = ref_clk * n / m;
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if (f_vco < 100000)
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s = 0;
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else if (f_vco < 140000)
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@ -186,11 +187,17 @@ static int mgag200_compute_pixpll_values_g200(struct mga_device *mdev, long cloc
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static void mgag200_set_pixpll_g200(struct mga_device *mdev,
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const struct mgag200_pll_values *pixpllc)
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{
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unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
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u8 xpixpllcm, xpixpllcn, xpixpllcp;
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xpixpllcm = pixpllc->m;
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xpixpllcn = pixpllc->n;
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xpixpllcp = pixpllc->p | (pixpllc->s << 3);
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pixpllcm = pixpllc->m - 1;
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pixpllcn = pixpllc->n - 1;
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pixpllcp = pixpllc->p - 1;
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pixpllcs = pixpllc->s;
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xpixpllcm = pixpllcm;
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xpixpllcn = pixpllcn;
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xpixpllcp = (pixpllcs << 3) | pixpllcp;
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WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
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@ -238,9 +245,9 @@ static int mgag200_compute_pixpll_values_g200se(struct mga_device *mdev, long cl
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tmpdelta = clock - computed;
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if (tmpdelta < delta) {
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delta = tmpdelta;
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m = testm - 1;
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n = testn - 1;
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p = testp - 1;
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m = testm;
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n = testn;
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p = testp;
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}
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}
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}
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@ -278,22 +285,19 @@ static int mgag200_compute_pixpll_values_g200se(struct mga_device *mdev, long cl
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if (tmpdelta < delta) {
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delta = tmpdelta;
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m = testm - 1;
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n = testn - 1;
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p = testp - 1;
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m = testm;
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n = testn;
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p = testp;
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}
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}
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}
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}
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fvv = pllreffreq * (n + 1) / (m + 1);
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fvv = pllreffreq * n / m;
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fvv = (fvv - 800000) / 50000;
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if (fvv > 15)
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fvv = 15;
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p |= (fvv << 4);
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m |= 0x80;
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s = fvv << 1;
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clock = clock / 2;
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}
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@ -315,11 +319,17 @@ static void mgag200_set_pixpll_g200se(struct mga_device *mdev,
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const struct mgag200_pll_values *pixpllc)
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{
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u32 unique_rev_id = mdev->model.g200se.unique_rev_id;
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unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
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u8 xpixpllcm, xpixpllcn, xpixpllcp;
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xpixpllcm = pixpllc->m;
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xpixpllcn = pixpllc->n;
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xpixpllcp = pixpllc->p | (pixpllc->s << 3);
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pixpllcm = pixpllc->m - 1;
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pixpllcn = pixpllc->n - 1;
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pixpllcp = pixpllc->p - 1;
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pixpllcs = pixpllc->s;
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xpixpllcm = pixpllcm | ((pixpllcn & BIT(8)) >> 1);
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xpixpllcn = pixpllcn;
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xpixpllcp = (pixpllcs << 3) | pixpllcp;
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WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
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@ -348,7 +358,6 @@ static int mgag200_compute_pixpll_values_g200wb(struct mga_device *mdev, long cl
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delta = 0xffffffff;
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if (mdev->type == G200_EW3) {
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vcomax = 800000;
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vcomin = 400000;
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pllreffreq = 25000;
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@ -371,19 +380,16 @@ static int mgag200_compute_pixpll_values_g200wb(struct mga_device *mdev, long cl
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tmpdelta = clock - computed;
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if (tmpdelta < delta) {
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delta = tmpdelta;
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m = ((testn & 0x100) >> 1) |
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(testm);
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n = (testn & 0xFF);
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p = ((testn & 0x600) >> 3) |
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(testp2 << 3) |
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(testp);
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m = testm + 1;
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n = testn + 1;
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p = testp + 1;
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s = testp2;
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}
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}
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}
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}
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}
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} else {
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vcomax = 550000;
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vcomin = 150000;
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pllreffreq = 48000;
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@ -404,10 +410,10 @@ static int mgag200_compute_pixpll_values_g200wb(struct mga_device *mdev, long cl
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tmpdelta = clock - computed;
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if (tmpdelta < delta) {
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delta = tmpdelta;
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n = testn - 1;
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m = (testm - 1) |
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((n >> 1) & 0x80);
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p = testp - 1;
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n = testn;
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m = testm;
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p = testp;
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s = 0;
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}
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}
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}
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@ -425,13 +431,19 @@ static int mgag200_compute_pixpll_values_g200wb(struct mga_device *mdev, long cl
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static void mgag200_set_pixpll_g200wb(struct mga_device *mdev,
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const struct mgag200_pll_values *pixpllc)
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{
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unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
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u8 xpixpllcm, xpixpllcn, xpixpllcp, tmp;
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int i, j, tmpcount, vcount;
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bool pll_locked = false;
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xpixpllcm = pixpllc->m;
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xpixpllcn = pixpllc->n;
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xpixpllcp = pixpllc->p | (pixpllc->s << 3);
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pixpllcm = pixpllc->m - 1;
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pixpllcn = pixpllc->n - 1;
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pixpllcp = pixpllc->p - 1;
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pixpllcs = pixpllc->s;
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xpixpllcm = ((pixpllcn & BIT(8)) >> 1) | pixpllcm;
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xpixpllcn = pixpllcn;
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xpixpllcp = ((pixpllcn & GENMASK(10, 9)) >> 3) | (pixpllcs << 3) | pixpllcp;
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WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
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@ -564,9 +576,9 @@ static int mgag200_compute_pixpll_values_g200ev(struct mga_device *mdev, long cl
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tmpdelta = clock - computed;
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if (tmpdelta < delta) {
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delta = tmpdelta;
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n = testn - 1;
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m = testm - 1;
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p = testp - 1;
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n = testn;
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m = testm;
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p = testp;
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}
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}
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}
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@ -583,11 +595,17 @@ static int mgag200_compute_pixpll_values_g200ev(struct mga_device *mdev, long cl
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static void mgag200_set_pixpll_g200ev(struct mga_device *mdev,
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const struct mgag200_pll_values *pixpllc)
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{
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unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
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u8 xpixpllcm, xpixpllcn, xpixpllcp, tmp;
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xpixpllcm = pixpllc->m;
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xpixpllcn = pixpllc->n;
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xpixpllcp = pixpllc->p | (pixpllc->s << 3);
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pixpllcm = pixpllc->m - 1;
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pixpllcn = pixpllc->n - 1;
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pixpllcp = pixpllc->p - 1;
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pixpllcs = pixpllc->s;
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xpixpllcm = pixpllcm;
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xpixpllcn = pixpllcn;
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xpixpllcp = (pixpllcs << 3) | pixpllcp;
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WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
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@ -675,9 +693,9 @@ static int mgag200_compute_pixpll_values_g200eh(struct mga_device *mdev, long cl
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tmpdelta = clock - computed;
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if (tmpdelta < delta) {
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delta = tmpdelta;
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n = testn;
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m = testm;
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p = testp;
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n = testn + 1;
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m = testm + 1;
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p = testp + 1;
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}
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if (delta == 0)
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break;
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@ -709,12 +727,10 @@ static int mgag200_compute_pixpll_values_g200eh(struct mga_device *mdev, long cl
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tmpdelta = clock - computed;
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if (tmpdelta < delta) {
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delta = tmpdelta;
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n = testn - 1;
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m = (testm - 1);
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p = testp - 1;
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n = testn;
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m = testm;
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p = testp;
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}
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if ((clock * testp) >= 600000)
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p |= 0x80;
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}
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}
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}
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@ -731,13 +747,19 @@ static int mgag200_compute_pixpll_values_g200eh(struct mga_device *mdev, long cl
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static void mgag200_set_pixpll_g200eh(struct mga_device *mdev,
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const struct mgag200_pll_values *pixpllc)
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{
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unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
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u8 xpixpllcm, xpixpllcn, xpixpllcp, tmp;
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int i, j, tmpcount, vcount;
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bool pll_locked = false;
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xpixpllcm = pixpllc->m;
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xpixpllcn = pixpllc->n;
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xpixpllcp = pixpllc->p | (pixpllc->s << 3);
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pixpllcm = pixpllc->m - 1;
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pixpllcn = pixpllc->n - 1;
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pixpllcp = pixpllc->p - 1;
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pixpllcs = pixpllc->s;
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xpixpllcm = ((pixpllcn & BIT(8)) >> 1) | pixpllcm;
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xpixpllcn = pixpllcn;
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xpixpllcp = (pixpllcs << 3) | pixpllcp;
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WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
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@ -830,9 +852,10 @@ static int mgag200_compute_pixpll_values_g200er(struct mga_device *mdev, long cl
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tmpdelta = clock - computed;
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if (tmpdelta < delta) {
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delta = tmpdelta;
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m = testm | (testo << 3);
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n = testn;
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p = testr | (testr << 3);
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m = (testm | (testo << 3)) + 1;
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n = testn + 1;
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p = testr + 1;
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s = testr;
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}
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}
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}
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@ -850,11 +873,17 @@ static int mgag200_compute_pixpll_values_g200er(struct mga_device *mdev, long cl
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static void mgag200_set_pixpll_g200er(struct mga_device *mdev,
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const struct mgag200_pll_values *pixpllc)
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{
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unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
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u8 xpixpllcm, xpixpllcn, xpixpllcp, tmp;
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xpixpllcm = pixpllc->m;
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xpixpllcn = pixpllc->n;
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xpixpllcp = pixpllc->p | (pixpllc->s << 3);
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pixpllcm = pixpllc->m - 1;
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pixpllcn = pixpllc->n - 1;
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pixpllcp = pixpllc->p - 1;
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pixpllcs = pixpllc->s;
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xpixpllcm = pixpllcm;
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xpixpllcn = pixpllcn;
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xpixpllcp = (pixpllcs << 3) | pixpllcp;
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WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
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