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crypto: qat - use pre-allocated buffers in datapath
[ Upstream commite0831e7af4
] In order to do DMAs, the QAT device requires that the scatterlist structures are mapped and translated into a format that the firmware can understand. This is defined as the composition of a scatter gather list (SGL) descriptor header, the struct qat_alg_buf_list, plus a variable number of flat buffer descriptors, the struct qat_alg_buf. The allocation and mapping of these data structures is done each time a request is received from the skcipher and aead APIs. In an OOM situation, this behaviour might lead to a dead-lock if an allocation fails. Based on the conversation in [1], increase the size of the aead and skcipher request contexts to include an SGL descriptor that can handle a maximum of 4 flat buffers. If requests exceed 4 entries buffers, memory is allocated dynamically. [1] https://lore.kernel.org/linux-crypto/20200722072932.GA27544@gondor.apana.org.au/ Cc: stable@vger.kernel.org Fixes:d370cec321
("crypto: qat - Intel(R) QAT crypto interface") Reported-by: Mikulas Patocka <mpatocka@redhat.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Marco Chiappero <marco.chiappero@intel.com> Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
b2549e3e57
commit
2e5490ba38
2 changed files with 61 additions and 27 deletions
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@ -46,19 +46,6 @@
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static DEFINE_MUTEX(algs_lock);
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static unsigned int active_devs;
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struct qat_alg_buf {
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u32 len;
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u32 resrvd;
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u64 addr;
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} __packed;
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struct qat_alg_buf_list {
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u64 resrvd;
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u32 num_bufs;
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u32 num_mapped_bufs;
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struct qat_alg_buf bufers[];
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} __packed __aligned(64);
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/* Common content descriptor */
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struct qat_alg_cd {
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union {
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@ -693,7 +680,10 @@ static void qat_alg_free_bufl(struct qat_crypto_instance *inst,
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bl->bufers[i].len, DMA_BIDIRECTIONAL);
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dma_unmap_single(dev, blp, sz, DMA_TO_DEVICE);
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kfree(bl);
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if (!qat_req->buf.sgl_src_valid)
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kfree(bl);
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if (blp != blpout) {
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/* If out of place operation dma unmap only data */
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int bufless = blout->num_bufs - blout->num_mapped_bufs;
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@ -704,7 +694,9 @@ static void qat_alg_free_bufl(struct qat_crypto_instance *inst,
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DMA_BIDIRECTIONAL);
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}
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dma_unmap_single(dev, blpout, sz_out, DMA_TO_DEVICE);
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kfree(blout);
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if (!qat_req->buf.sgl_dst_valid)
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kfree(blout);
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}
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}
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@ -721,15 +713,24 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
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dma_addr_t blp = DMA_MAPPING_ERROR;
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dma_addr_t bloutp = DMA_MAPPING_ERROR;
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struct scatterlist *sg;
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size_t sz_out, sz = struct_size(bufl, bufers, n + 1);
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size_t sz_out, sz = struct_size(bufl, bufers, n);
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int node = dev_to_node(&GET_DEV(inst->accel_dev));
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if (unlikely(!n))
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return -EINVAL;
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bufl = kzalloc_node(sz, GFP_ATOMIC,
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dev_to_node(&GET_DEV(inst->accel_dev)));
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if (unlikely(!bufl))
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return -ENOMEM;
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qat_req->buf.sgl_src_valid = false;
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qat_req->buf.sgl_dst_valid = false;
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if (n > QAT_MAX_BUFF_DESC) {
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bufl = kzalloc_node(sz, GFP_ATOMIC, node);
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if (unlikely(!bufl))
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return -ENOMEM;
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} else {
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bufl = &qat_req->buf.sgl_src.sgl_hdr;
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memset(bufl, 0, sizeof(struct qat_alg_buf_list));
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qat_req->buf.sgl_src_valid = true;
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}
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for_each_sg(sgl, sg, n, i)
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bufl->bufers[i].addr = DMA_MAPPING_ERROR;
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@ -760,12 +761,18 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
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struct qat_alg_buf *bufers;
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n = sg_nents(sglout);
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sz_out = struct_size(buflout, bufers, n + 1);
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sz_out = struct_size(buflout, bufers, n);
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sg_nctr = 0;
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buflout = kzalloc_node(sz_out, GFP_ATOMIC,
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dev_to_node(&GET_DEV(inst->accel_dev)));
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if (unlikely(!buflout))
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goto err_in;
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if (n > QAT_MAX_BUFF_DESC) {
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buflout = kzalloc_node(sz_out, GFP_ATOMIC, node);
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if (unlikely(!buflout))
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goto err_in;
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} else {
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buflout = &qat_req->buf.sgl_dst.sgl_hdr;
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memset(buflout, 0, sizeof(struct qat_alg_buf_list));
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qat_req->buf.sgl_dst_valid = true;
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}
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bufers = buflout->bufers;
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for_each_sg(sglout, sg, n, i)
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@ -810,7 +817,9 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
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dma_unmap_single(dev, buflout->bufers[i].addr,
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buflout->bufers[i].len,
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DMA_BIDIRECTIONAL);
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kfree(buflout);
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if (!qat_req->buf.sgl_dst_valid)
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kfree(buflout);
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err_in:
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if (!dma_mapping_error(dev, blp))
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@ -823,7 +832,8 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
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bufl->bufers[i].len,
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DMA_BIDIRECTIONAL);
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kfree(bufl);
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if (!qat_req->buf.sgl_src_valid)
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kfree(bufl);
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dev_err(dev, "Failed to map buf for dma\n");
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return -ENOMEM;
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@ -21,6 +21,26 @@ struct qat_crypto_instance {
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atomic_t refctr;
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};
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#define QAT_MAX_BUFF_DESC 4
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struct qat_alg_buf {
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u32 len;
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u32 resrvd;
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u64 addr;
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} __packed;
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struct qat_alg_buf_list {
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u64 resrvd;
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u32 num_bufs;
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u32 num_mapped_bufs;
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struct qat_alg_buf bufers[];
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} __packed;
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struct qat_alg_fixed_buf_list {
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struct qat_alg_buf_list sgl_hdr;
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struct qat_alg_buf descriptors[QAT_MAX_BUFF_DESC];
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} __packed __aligned(64);
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struct qat_crypto_request_buffs {
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struct qat_alg_buf_list *bl;
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dma_addr_t blp;
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@ -28,6 +48,10 @@ struct qat_crypto_request_buffs {
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dma_addr_t bloutp;
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size_t sz;
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size_t sz_out;
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bool sgl_src_valid;
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bool sgl_dst_valid;
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struct qat_alg_fixed_buf_list sgl_src;
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struct qat_alg_fixed_buf_list sgl_dst;
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};
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struct qat_crypto_request;
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